commit abfdf928d81d968a04f5b40c48e38f796c14d1b3
author Gabor Greif <ggreif@gmail.com> Tue Aug 26 22:36:50 2008 +0000
committer Gabor Greif <ggreif@gmail.com> Tue Aug 26 22:36:50 2008 +0000
tree a0336e1f1d256e326af5f66735a640bea3d6573b
parent 655c1dc63d0cf94c522c9fc9357b2817a7fd4d0c

disallow direct access to SDValue::ResNo, provide a getter instead

llvm-svn: 55394

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 1908a05..fc83998 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -2511,7 +2511,7 @@
            "Flag must be set. Depend on flag being set in LowerRET");
     Chain = DAG.getNode(PPCISD::TAILCALL,
                         Op.Val->getVTList(), &Ops[0], Ops.size());
-    return SDValue(Chain.Val, Op.ResNo);
+    return SDValue(Chain.Val, Op.getResNo());
   }
 
   Chain = DAG.getNode(CallOpc, NodeTys, &Ops[0], Ops.size());
@@ -2548,7 +2548,7 @@
   ResultVals.push_back(Chain);
   SDValue Res = DAG.getMergeValues(Op.Val->getVTList(), &ResultVals[0],
                                      ResultVals.size());
-  return Res.getValue(Op.ResNo);
+  return Res.getValue(Op.getResNo());
 }
 
 SDValue PPCTargetLowering::LowerRET(SDValue Op, SelectionDAG &DAG,