| commit | ac2b02643b2d555fa79f8baff5a478f5a33118e7 | [log] [tgz] |
|---|---|---|
| author | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | Mon Dec 11 15:23:20 2017 +0000 |
| committer | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | Mon Dec 11 15:23:20 2017 +0000 |
| tree | d0284048e9f518ae84324ca7605f2551ebfe20ca | |
| parent | f3436d7dab460b926b6794603d53c5ede9d1e464 [diff] [blame] |
[AMDGPU][MC][GFX9] Corrected encoding of ttmp registers, disabled tba/tma See bugs 35494 and 35559: https://bugs.llvm.org/show_bug.cgi?id=35494 https://bugs.llvm.org/show_bug.cgi?id=35559 Reviewers: vpykhtin, artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D41007 llvm-svn: 320375
diff --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h index c487fe9..18a91356 100644 --- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h +++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
@@ -111,7 +111,12 @@ MCOperand decodeSDWASrc16(unsigned Val) const; MCOperand decodeSDWASrc32(unsigned Val) const; MCOperand decodeSDWAVopcDst(unsigned Val) const; -}; + + int getTTmpIdx(unsigned Val) const; + + bool isVI() const; + bool isGFX9() const; + }; //===----------------------------------------------------------------------===// // AMDGPUSymbolizer