[LLDB][MIPS] Fix floating point handling in case of thread step-out

Patch by Nitesh Jain.

Summary: These patch fix thread step-out for hard and soft float.

Reviewers: jaydeep, bhushan, clayborg
Differential Revision: http://reviews.llvm.org/D20416

llvm-svn: 270564
diff --git a/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp b/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
index 7f963c9..383cbb1 100644
--- a/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ b/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -33,6 +33,7 @@
 #include "llvm/ADT/StringRef.h"
 #include "llvm/Support/ARMBuildAttributes.h"
 #include "llvm/Support/MathExtras.h"
+#include "llvm/Support/MipsABIFlags.h"
 
 #define CASE_AND_STREAM(s, def, width)                  \
     case def: s->Printf("%-*s", width, #def); break;
@@ -1706,8 +1707,39 @@
 
                         if (section_size && (set_data (data, sheader.sh_offset, section_size) == section_size))
                         {
-                            lldb::offset_t ase_offset = 12; // MIPS ABI Flags Version: 0
-                            arch_flags |= data.GetU32 (&ase_offset);
+                            // MIPS ASE Mask is at offset 12 in MIPS.abiflags section
+                            lldb::offset_t offset = 12; // MIPS ABI Flags Version: 0
+                            arch_flags |= data.GetU32 (&offset);
+
+                            // The floating point ABI is at offset 7
+                            offset = 7;
+                            switch (data.GetU8 (&offset))
+                            {
+                                case llvm::Mips::Val_GNU_MIPS_ABI_FP_ANY :
+                                    arch_flags |= lldb_private::ArchSpec::eMIPS_ABI_FP_ANY;
+                                    break;
+                                case llvm::Mips::Val_GNU_MIPS_ABI_FP_DOUBLE :
+                                    arch_flags |= lldb_private::ArchSpec::eMIPS_ABI_FP_DOUBLE;
+                                    break;
+                                case llvm::Mips::Val_GNU_MIPS_ABI_FP_SINGLE :
+                                    arch_flags |= lldb_private::ArchSpec::eMIPS_ABI_FP_SINGLE;
+                                    break;
+                                case llvm::Mips::Val_GNU_MIPS_ABI_FP_SOFT :
+                                    arch_flags |= lldb_private::ArchSpec::eMIPS_ABI_FP_SOFT;
+                                    break;
+                                case llvm::Mips::Val_GNU_MIPS_ABI_FP_OLD_64 :
+                                    arch_flags |= lldb_private::ArchSpec::eMIPS_ABI_FP_OLD_64;
+                                    break;
+                                case llvm::Mips::Val_GNU_MIPS_ABI_FP_XX :
+                                    arch_flags |= lldb_private::ArchSpec::eMIPS_ABI_FP_XX;
+                                    break;
+                                case llvm::Mips::Val_GNU_MIPS_ABI_FP_64 :
+                                    arch_flags |= lldb_private::ArchSpec::eMIPS_ABI_FP_64;
+                                    break;
+                                case llvm::Mips::Val_GNU_MIPS_ABI_FP_64A :
+                                    arch_flags |= lldb_private::ArchSpec::eMIPS_ABI_FP_64A;
+                                    break;
+                            }
                         }
                     }
                     // Settings appropriate ArchSpec ABI Flags