[WebAssembly] Add AsmString strings for most instructions.
Mangling type information into MachineInstr opcode names was a temporary
measure, and it's starting to get hairy. At the same time, the MC instruction
printer wants to use AsmString strings for printing. This patch takes the
first step, starting the process of adding AsmStrings for instructions.
llvm-svn: 252203
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrMemory.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrMemory.td
index 75c0fe2..f7180a0 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrMemory.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrMemory.td
@@ -24,35 +24,49 @@
// Basic load.
def LOAD_I32 : I<(outs I32:$dst), (ins I32:$addr),
- [(set I32:$dst, (load I32:$addr))]>;
+ [(set I32:$dst, (load I32:$addr))],
+ "i32.load $dst, $addr">;
def LOAD_I64 : I<(outs I64:$dst), (ins I32:$addr),
- [(set I64:$dst, (load I32:$addr))]>;
+ [(set I64:$dst, (load I32:$addr))],
+ "i64.load $dst, $addr">;
def LOAD_F32 : I<(outs F32:$dst), (ins I32:$addr),
- [(set F32:$dst, (load I32:$addr))]>;
+ [(set F32:$dst, (load I32:$addr))],
+ "f32.load $dst, $addr">;
def LOAD_F64 : I<(outs F64:$dst), (ins I32:$addr),
- [(set F64:$dst, (load I32:$addr))]>;
+ [(set F64:$dst, (load I32:$addr))],
+ "f64.load $dst, $addr">;
// Extending load.
def LOAD8_S_I32 : I<(outs I32:$dst), (ins I32:$addr),
- [(set I32:$dst, (sextloadi8 I32:$addr))]>;
+ [(set I32:$dst, (sextloadi8 I32:$addr))],
+ "i32.load8_s $dst, $addr">;
def LOAD8_U_I32 : I<(outs I32:$dst), (ins I32:$addr),
- [(set I32:$dst, (zextloadi8 I32:$addr))]>;
+ [(set I32:$dst, (zextloadi8 I32:$addr))],
+ "i32.load8_u $dst, $addr">;
def LOAD16_S_I32 : I<(outs I32:$dst), (ins I32:$addr),
- [(set I32:$dst, (sextloadi16 I32:$addr))]>;
+ [(set I32:$dst, (sextloadi16 I32:$addr))],
+ "i32.load16_s $dst, $addr">;
def LOAD16_U_I32 : I<(outs I32:$dst), (ins I32:$addr),
- [(set I32:$dst, (zextloadi16 I32:$addr))]>;
+ [(set I32:$dst, (zextloadi16 I32:$addr))],
+ "i32.load16_u $dst, $addr">;
def LOAD8_S_I64 : I<(outs I64:$dst), (ins I32:$addr),
- [(set I64:$dst, (sextloadi8 I32:$addr))]>;
+ [(set I64:$dst, (sextloadi8 I32:$addr))],
+ "i64.load8_s $dst, $addr">;
def LOAD8_U_I64 : I<(outs I64:$dst), (ins I32:$addr),
- [(set I64:$dst, (zextloadi8 I32:$addr))]>;
+ [(set I64:$dst, (zextloadi8 I32:$addr))],
+ "i64.load8_u $dst, $addr">;
def LOAD16_S_I64 : I<(outs I64:$dst), (ins I32:$addr),
- [(set I64:$dst, (sextloadi16 I32:$addr))]>;
+ [(set I64:$dst, (sextloadi16 I32:$addr))],
+ "i64.load16_s $dst, $addr">;
def LOAD16_U_I64 : I<(outs I64:$dst), (ins I32:$addr),
- [(set I64:$dst, (zextloadi16 I32:$addr))]>;
+ [(set I64:$dst, (zextloadi16 I32:$addr))],
+ "i64.load16_u $dst, $addr">;
def LOAD32_S_I64 : I<(outs I64:$dst), (ins I32:$addr),
- [(set I64:$dst, (sextloadi32 I32:$addr))]>;
+ [(set I64:$dst, (sextloadi32 I32:$addr))],
+ "i64.load32_s $dst, $addr">;
def LOAD32_U_I64 : I<(outs I64:$dst), (ins I32:$addr),
- [(set I64:$dst, (zextloadi32 I32:$addr))]>;
+ [(set I64:$dst, (zextloadi32 I32:$addr))],
+ "i64.load32_u $dst, $addr">;
// "Don't care" extending load become zero-extending load.
def : Pat<(i32 (extloadi8 I32:$addr)), (LOAD8_U_I32 $addr)>;
@@ -64,38 +78,51 @@
// Basic store.
// Note: WebAssembly inverts SelectionDAG's usual operand order.
def STORE_I32 : I<(outs), (ins I32:$addr, I32:$val),
- [(store i32:$val, I32:$addr)]>;
+ [(store i32:$val, I32:$addr)],
+ "i32.store $addr, $val">;
def STORE_I64 : I<(outs), (ins I32:$addr, I64:$val),
- [(store i64:$val, I32:$addr)]>;
+ [(store i64:$val, I32:$addr)],
+ "i64.store $addr, $val">;
def STORE_F32 : I<(outs), (ins I32:$addr, F32:$val),
- [(store f32:$val, I32:$addr)]>;
+ [(store f32:$val, I32:$addr)],
+ "i64.store $addr, $val">;
def STORE_F64 : I<(outs), (ins I32:$addr, F64:$val),
- [(store f64:$val, I32:$addr)]>;
+ [(store f64:$val, I32:$addr)],
+ "i64.store $addr, $val">;
// Truncating store.
def STORE8_I32 : I<(outs), (ins I32:$addr, I32:$val),
- [(truncstorei8 I32:$val, I32:$addr)]>;
+ [(truncstorei8 I32:$val, I32:$addr)],
+ "i32.store8 $addr, $val">;
def STORE16_I32 : I<(outs), (ins I32:$addr, I32:$val),
- [(truncstorei16 I32:$val, I32:$addr)]>;
+ [(truncstorei16 I32:$val, I32:$addr)],
+ "i32.store16 $addr, $val">;
def STORE8_I64 : I<(outs), (ins I32:$addr, I64:$val),
- [(truncstorei8 I64:$val, I32:$addr)]>;
+ [(truncstorei8 I64:$val, I32:$addr)],
+ "i64.store8 $addr, $val">;
def STORE16_I64 : I<(outs), (ins I32:$addr, I64:$val),
- [(truncstorei16 I64:$val, I32:$addr)]>;
+ [(truncstorei16 I64:$val, I32:$addr)],
+ "i64.store16 $addr, $val">;
def STORE32_I64 : I<(outs), (ins I32:$addr, I64:$val),
- [(truncstorei32 I64:$val, I32:$addr)]>;
+ [(truncstorei32 I64:$val, I32:$addr)],
+ "i64.store32 $addr, $val">;
// Memory size.
def memory_size_I32 : I<(outs I32:$dst), (ins),
- [(set I32:$dst, (int_wasm_memory_size))]>,
+ [(set I32:$dst, (int_wasm_memory_size))],
+ "i32.memory_size $dst">,
Requires<[HasAddr32]>;
def memory_size_I64 : I<(outs I64:$dst), (ins),
- [(set I64:$dst, (int_wasm_memory_size))]>,
+ [(set I64:$dst, (int_wasm_memory_size))],
+ "i64.memory_size $dst">,
Requires<[HasAddr64]>;
// Grow memory.
def grow_memory_I32 : I<(outs), (ins I32:$delta),
- [(int_wasm_grow_memory I32:$delta)]>,
+ [(int_wasm_grow_memory I32:$delta)],
+ "i32.grow_memory $delta">,
Requires<[HasAddr32]>;
def grow_memory_I64 : I<(outs), (ins I64:$delta),
- [(int_wasm_grow_memory I64:$delta)]>,
+ [(int_wasm_grow_memory I64:$delta)],
+ "i64.grow_memory $delta">,
Requires<[HasAddr64]>;