commit af38a8fed6c51303febfd8c423ed425bef25f9ac
author Simon Dardis <simon.dardis@mips.com> Tue Jun 19 16:05:44 2018 +0000
committer Simon Dardis <simon.dardis@mips.com> Tue Jun 19 16:05:44 2018 +0000
tree 266c62810ac99a99a8f55a38d77eb5cd00327b77
parent 6b8fa63871c45bdcb8eb3f454b05c4250e8c0b49

[mips] Mark microMIPS64 as being unsupported.

There are no provided instruction definitions for this architecture.

Reviewers: smaksimovic, atanasyan, abeserminji

Differential Revision: https://reviews.llvm.org/D48320

llvm-svn: 335057

llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp

diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index 2ed3ff8..fb22071 100644
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -521,6 +521,9 @@
 
     if (getSTI().getCPU() == "mips64r6" && inMicroMipsMode())
       report_fatal_error("microMIPS64R6 is not supported", false);
+
+    if (!isABI_O32() && inMicroMipsMode())
+      report_fatal_error("microMIPS64 is not supported", false);
   }
 
   /// True if all of $fcc0 - $fcc7 exist for the current ISA.