diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index cbeda67..ba0a08b 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -1323,6 +1323,11 @@
     KnownZero |= (~InMask) & Mask;
     return;
   }
+  case ISD::FGETSIGN:
+    // All bits are zero except the low bit.
+    KnownZero = MVT::getIntVTBitMask(Op.getValueType()) ^ 1;
+    return;
+  
   case ISD::ADD: {
     // If either the LHS or the RHS are Zero, the result is zero.
     ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
@@ -3703,6 +3708,7 @@
   case ISD::FDIV:   return "fdiv";
   case ISD::FREM:   return "frem";
   case ISD::FCOPYSIGN: return "fcopysign";
+  case ISD::FGETSIGN:  return "fgetsign";
 
   case ISD::SETCC:       return "setcc";
   case ISD::SELECT:      return "select";