[WebAssembly] Fix fast-isel optimization of branch conditions.
LLVM doesn't guarantee anything about the high bits of a register holding
an i1 value at the IR level, so don't translate LLVM IR i1 values directly
into WebAssembly conditional branch operands. WebAssembly's conditional
branches do demand all 32 bits be valid.
Fixes PR38019.
llvm-svn: 336138
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
index 7b5eab4..566ef68 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
@@ -419,7 +419,7 @@
return getRegForValue(ICmp->getOperand(0));
}
- if (BinaryOperator::isNot(V)) {
+ if (BinaryOperator::isNot(V) && V->getType()->isIntegerTy(32)) {
Not = true;
return getRegForValue(BinaryOperator::getNotArgument(V));
}