[CostModel][X86] Include the cost of 256-bit upper subvector extract/insertion in AVX1 v4i64 MUL
Matches other MUL/ADD/SUB 256-bit case on AVX1
llvm-svn: 291149
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index a5958f5..719f7e7 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -556,9 +556,9 @@
// A v4i64 multiply is custom lowered as two split v2i64 vectors that then
// are lowered as a series of long multiplies(3), shifts(3) and adds(2)
// Because we believe v4i64 to be a legal type, we must also include the
- // split factor of two in the cost table. Therefore, the cost here is 16
+ // extract+insert in the cost table. Therefore, the cost here is 18
// instead of 8.
- { ISD::MUL, MVT::v4i64, 16 },
+ { ISD::MUL, MVT::v4i64, 18 },
};
// Look for AVX1 lowering tricks.
diff --git a/llvm/test/Analysis/CostModel/X86/arith.ll b/llvm/test/Analysis/CostModel/X86/arith.ll
index 7319efb..b7a615f 100644
--- a/llvm/test/Analysis/CostModel/X86/arith.ll
+++ b/llvm/test/Analysis/CostModel/X86/arith.ll
@@ -436,7 +436,7 @@
%A = mul <2 x i64> undef, undef
; SSSE3: cost of 16 {{.*}} %B = mul
; SSE42: cost of 16 {{.*}} %B = mul
- ; AVX: cost of 16 {{.*}} %B = mul
+ ; AVX: cost of 18 {{.*}} %B = mul
; AVX2: cost of 8 {{.*}} %B = mul
; AVX512F: cost of 8 {{.*}} %B = mul
; AVX512BW: cost of 8 {{.*}} %B = mul
@@ -444,7 +444,7 @@
%B = mul <4 x i64> undef, undef
; SSSE3: cost of 32 {{.*}} %C = mul
; SSE42: cost of 32 {{.*}} %C = mul
- ; AVX: cost of 32 {{.*}} %C = mul
+ ; AVX: cost of 36 {{.*}} %C = mul
; AVX2: cost of 16 {{.*}} %C = mul
; AVX512F: cost of 8 {{.*}} %C = mul
; AVX512BW: cost of 8 {{.*}} %C = mul