commit b0921ca9e116317df45d4dead32c42da6c99f172
author Dan Gohman <dan433584@gmail.com> Sat Dec 05 19:24:17 2015 +0000
committer Dan Gohman <dan433584@gmail.com> Sat Dec 05 19:24:17 2015 +0000
tree 1269a782f1ea4f82cc1523f91b73be70dee0c7e9
parent ebb23545de42993e89b7c385ac0ddc7c2476abbb

[WebAssembly] Call TargetPassConfig base class functions in overriding functions.

llvm-svn: 254855

llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp

diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
index b546992..917dfac 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
@@ -146,14 +146,20 @@
 }
 
 bool WebAssemblyPassConfig::addInstSelector() {
+  (void)TargetPassConfig::addInstSelector();
   addPass(
       createWebAssemblyISelDag(getWebAssemblyTargetMachine(), getOptLevel()));
   return false;
 }
 
-bool WebAssemblyPassConfig::addILPOpts() { return true; }
+bool WebAssemblyPassConfig::addILPOpts() {
+  (void)TargetPassConfig::addILPOpts();
+  return true;
+}
 
 void WebAssemblyPassConfig::addPreRegAlloc() {
+  TargetPassConfig::addPreRegAlloc();
+
   // Prepare store instructions for register stackifying.
   addPass(createWebAssemblyStoreResults());
 
@@ -173,9 +179,13 @@
 
   // Run the register coloring pass to reduce the total number of registers.
   addPass(createWebAssemblyRegColoring());
+
+  TargetPassConfig::addPostRegAlloc();
 }
 
 void WebAssemblyPassConfig::addPreEmitPass() {
+  TargetPassConfig::addPreEmitPass();
+    
   // Put the CFG in structured form; insert BLOCK and LOOP markers.
   addPass(createWebAssemblyCFGStackify());