commit b15000736c4f8a16f7db67b65e9ae20e25bc13e7
author Evan Cheng <evan.cheng@apple.com> Thu Nov 09 17:55:04 2006 +0000
committer Evan Cheng <evan.cheng@apple.com> Thu Nov 09 17:55:04 2006 +0000
tree d0690717f14f7bf1aad7949840a407cb7666ac6e
parent f1606b80f11f4a8dafabd618921e3568f092a2df

Rename ISD::MemOpAddrMode to ISD::MemIndexedMode

llvm-svn: 31595

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index bd04a80..a850e47 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -853,7 +853,7 @@
 /// can be legally represented as pre-indexed load / store address.
 bool PPCTargetLowering::getPreIndexedAddressParts(SDNode *N, SDOperand &Base,
                                                   SDOperand &Offset,
-                                                  ISD::MemOpAddrMode &AM,
+                                                  ISD::MemIndexedMode &AM,
                                                   SelectionDAG &DAG) {
   return false;
   

llvm/lib/Target/PowerPC/PPCISelLowering.h

diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h
index 87b938a..cb4dc47 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.h
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h
@@ -182,7 +182,7 @@
     /// can be legally represented as pre-indexed load / store address.
     virtual bool getPreIndexedAddressParts(SDNode *N, SDOperand &Base,
                                            SDOperand &Offset,
-                                           ISD::MemOpAddrMode &AM,
+                                           ISD::MemIndexedMode &AM,
                                            SelectionDAG &DAG);
     
     /// SelectAddressRegReg - Given the specified addressed, check to see if it