constify the TargetMachine being passed through the Mips subtarget
creation.
llvm-svn: 218169
diff --git a/llvm/lib/Target/Mips/Mips16ISelLowering.cpp b/llvm/lib/Target/Mips/Mips16ISelLowering.cpp
index 3e00e73..dbefd32 100644
--- a/llvm/lib/Target/Mips/Mips16ISelLowering.cpp
+++ b/llvm/lib/Target/Mips/Mips16ISelLowering.cpp
@@ -120,7 +120,7 @@
{"truncf", "__mips16_call_stub_sf_1"},
};
-Mips16TargetLowering::Mips16TargetLowering(MipsTargetMachine &TM,
+Mips16TargetLowering::Mips16TargetLowering(const MipsTargetMachine &TM,
const MipsSubtarget &STI)
: MipsTargetLowering(TM, STI) {
@@ -153,7 +153,7 @@
}
const MipsTargetLowering *
-llvm::createMips16TargetLowering(MipsTargetMachine &TM,
+llvm::createMips16TargetLowering(const MipsTargetMachine &TM,
const MipsSubtarget &STI) {
return new Mips16TargetLowering(TM, STI);
}
diff --git a/llvm/lib/Target/Mips/Mips16ISelLowering.h b/llvm/lib/Target/Mips/Mips16ISelLowering.h
index 042f6af..47ae652 100644
--- a/llvm/lib/Target/Mips/Mips16ISelLowering.h
+++ b/llvm/lib/Target/Mips/Mips16ISelLowering.h
@@ -19,7 +19,7 @@
namespace llvm {
class Mips16TargetLowering : public MipsTargetLowering {
public:
- explicit Mips16TargetLowering(MipsTargetMachine &TM,
+ explicit Mips16TargetLowering(const MipsTargetMachine &TM,
const MipsSubtarget &STI);
bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AddrSpace,
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index 19efa6e..0dfc5d7 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -209,7 +209,7 @@
}
}
-MipsTargetLowering::MipsTargetLowering(MipsTargetMachine &TM,
+MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM,
const MipsSubtarget &STI)
: TargetLowering(TM, new MipsTargetObjectFile()), Subtarget(STI) {
// Mips does not have i1 type, so use i32 for
@@ -409,7 +409,7 @@
isMicroMips = Subtarget.inMicroMipsMode();
}
-const MipsTargetLowering *MipsTargetLowering::create(MipsTargetMachine &TM,
+const MipsTargetLowering *MipsTargetLowering::create(const MipsTargetMachine &TM,
const MipsSubtarget &STI) {
if (STI.inMips16Mode())
return llvm::createMips16TargetLowering(TM, STI);
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.h b/llvm/lib/Target/Mips/MipsISelLowering.h
index e921816..3d0512d 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.h
+++ b/llvm/lib/Target/Mips/MipsISelLowering.h
@@ -214,10 +214,10 @@
class MipsTargetLowering : public TargetLowering {
bool isMicroMips;
public:
- explicit MipsTargetLowering(MipsTargetMachine &TM,
+ explicit MipsTargetLowering(const MipsTargetMachine &TM,
const MipsSubtarget &STI);
- static const MipsTargetLowering *create(MipsTargetMachine &TM,
+ static const MipsTargetLowering *create(const MipsTargetMachine &TM,
const MipsSubtarget &STI);
/// createFastISel - This method returns a target specific FastISel object,
@@ -602,9 +602,11 @@
/// Create MipsTargetLowering objects.
const MipsTargetLowering *
- createMips16TargetLowering(MipsTargetMachine &TM, const MipsSubtarget &STI);
+ createMips16TargetLowering(const MipsTargetMachine &TM,
+ const MipsSubtarget &STI);
const MipsTargetLowering *
- createMipsSETargetLowering(MipsTargetMachine &TM, const MipsSubtarget &STI);
+ createMipsSETargetLowering(const MipsTargetMachine &TM,
+ const MipsSubtarget &STI);
namespace Mips {
FastISel *createFastISel(FunctionLoweringInfo &funcInfo,
diff --git a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
index c1bbf61..1bf21cb 100644
--- a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
@@ -35,7 +35,7 @@
"stores to their single precision "
"counterparts"));
-MipsSETargetLowering::MipsSETargetLowering(MipsTargetMachine &TM,
+MipsSETargetLowering::MipsSETargetLowering(const MipsTargetMachine &TM,
const MipsSubtarget &STI)
: MipsTargetLowering(TM, STI) {
// Set up the register classes
@@ -228,7 +228,7 @@
}
const MipsTargetLowering *
-llvm::createMipsSETargetLowering(MipsTargetMachine &TM,
+llvm::createMipsSETargetLowering(const MipsTargetMachine &TM,
const MipsSubtarget &STI) {
return new MipsSETargetLowering(TM, STI);
}
diff --git a/llvm/lib/Target/Mips/MipsSEISelLowering.h b/llvm/lib/Target/Mips/MipsSEISelLowering.h
index 3cd66f9..1cf6eeb 100644
--- a/llvm/lib/Target/Mips/MipsSEISelLowering.h
+++ b/llvm/lib/Target/Mips/MipsSEISelLowering.h
@@ -20,7 +20,7 @@
namespace llvm {
class MipsSETargetLowering : public MipsTargetLowering {
public:
- explicit MipsSETargetLowering(MipsTargetMachine &TM,
+ explicit MipsSETargetLowering(const MipsTargetMachine &TM,
const MipsSubtarget &STI);
/// \brief Enable MSA support for the given integer type and Register
diff --git a/llvm/lib/Target/Mips/MipsSubtarget.cpp b/llvm/lib/Target/Mips/MipsSubtarget.cpp
index 11fa4f5..e684cc9 100644
--- a/llvm/lib/Target/Mips/MipsSubtarget.cpp
+++ b/llvm/lib/Target/Mips/MipsSubtarget.cpp
@@ -104,7 +104,7 @@
MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool little,
- MipsTargetMachine *_TM)
+ const MipsTargetMachine *_TM)
: MipsGenSubtargetInfo(TT, CPU, FS), MipsArchVersion(Mips32),
MipsABI(UnknownABI), IsLittle(little), IsSingleFloat(false),
IsFPXX(false), NoABICalls(false), IsFP64bit(false), UseOddSPReg(true),
diff --git a/llvm/lib/Target/Mips/MipsSubtarget.h b/llvm/lib/Target/Mips/MipsSubtarget.h
index 4967e7b..62ffdd2 100644
--- a/llvm/lib/Target/Mips/MipsSubtarget.h
+++ b/llvm/lib/Target/Mips/MipsSubtarget.h
@@ -141,7 +141,7 @@
// as from the command line
enum {NoOverride, Mips16Override, NoMips16Override} OverrideMode;
- MipsTargetMachine *TM;
+ const MipsTargetMachine *TM;
Triple TargetTriple;
@@ -168,7 +168,8 @@
/// This constructor initializes the data members to match that
/// of the specified triple.
MipsSubtarget(const std::string &TT, const std::string &CPU,
- const std::string &FS, bool little, MipsTargetMachine *TM);
+ const std::string &FS, bool little,
+ const MipsTargetMachine *TM);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.