commit b22186adf033d0579a0c8d8875526d642730f363
author Brian Gaeke <gaeke@uiuc.edu> Wed Feb 11 20:47:34 2004 +0000
committer Brian Gaeke <gaeke@uiuc.edu> Wed Feb 11 20:47:34 2004 +0000
tree 479aa2bcdb0b7319e202517f1cb9cc5d6c2e49fc
parent 0302beeb09e18ce9224f58176e58a747f150519a

MachineInstr::getOpCode() --> getOpcode() in SPARC back-end.

llvm-svn: 11335

llvm/lib/Target/Sparc/EmitAssembly.cpp

diff --git a/llvm/lib/Target/Sparc/EmitAssembly.cpp b/llvm/lib/Target/Sparc/EmitAssembly.cpp
index 277da69..af86e05 100644
--- a/llvm/lib/Target/Sparc/EmitAssembly.cpp
+++ b/llvm/lib/Target/Sparc/EmitAssembly.cpp
@@ -566,7 +566,7 @@
 inline bool
 SparcAsmPrinter::OpIsBranchTargetLabel(const MachineInstr *MI,
                                        unsigned int opNum) {
-  switch (MI->getOpCode()) {
+  switch (MI->getOpcode()) {
   case V9::JMPLCALLr:
   case V9::JMPLCALLi:
   case V9::JMPLRETr:
@@ -580,9 +580,9 @@
 inline bool
 SparcAsmPrinter::OpIsMemoryAddressBase(const MachineInstr *MI,
                                        unsigned int opNum) {
-  if (Target.getInstrInfo().isLoad(MI->getOpCode()))
+  if (Target.getInstrInfo().isLoad(MI->getOpcode()))
     return (opNum == 0);
-  else if (Target.getInstrInfo().isStore(MI->getOpCode()))
+  else if (Target.getInstrInfo().isStore(MI->getOpcode()))
     return (opNum == 1);
   else
     return false;
@@ -601,15 +601,15 @@
   const MachineOperand& mop = MI->getOperand(opNum);
   
   if (OpIsBranchTargetLabel(MI, opNum)) {
-    PrintOp1PlusOp2(mop, MI->getOperand(opNum+1), MI->getOpCode());
+    PrintOp1PlusOp2(mop, MI->getOperand(opNum+1), MI->getOpcode());
     return 2;
   } else if (OpIsMemoryAddressBase(MI, opNum)) {
     toAsm << "[";
-    PrintOp1PlusOp2(mop, MI->getOperand(opNum+1), MI->getOpCode());
+    PrintOp1PlusOp2(mop, MI->getOperand(opNum+1), MI->getOpcode());
     toAsm << "]";
     return 2;
   } else {
-    printOneOperand(mop, MI->getOpCode());
+    printOneOperand(mop, MI->getOpcode());
     return 1;
   }
 }
@@ -691,7 +691,7 @@
 }
 
 void SparcAsmPrinter::emitMachineInst(const MachineInstr *MI) {
-  unsigned Opcode = MI->getOpCode();
+  unsigned Opcode = MI->getOpcode();
 
   if (Target.getInstrInfo().isDummyPhiInstr(Opcode))
     return;  // IGNORE PHI NODES