commit b3dd381a73de227ebec89c0e0d2da3703b1392a0
author Matt Arsenault <Matthew.Arsenault@amd.com> Sat Aug 24 22:14:41 2019 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Sat Aug 24 22:14:41 2019 +0000
tree f5032fbbde7f45ec51b202d67fa3a18b081c23b7
parent c4dd1d1873f0510d82eb7ef46bb05336ad28ef83

AMDGPU: Introduce a flag to disable mul24 intrinsic formation

llvm-svn: 369856

llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
index b750c6b..1840f71 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
@@ -55,6 +55,12 @@
   cl::ReallyHidden,
   cl::init(true));
 
+static cl::opt<bool> UseMul24Intrin(
+  "amdgpu-codegenprepare-mul24",
+  cl::desc("Introduce mul24 intrinsics in AMDGPUCodeGenPrepare"),
+  cl::ReallyHidden,
+  cl::init(true));
+
 class AMDGPUCodeGenPrepare : public FunctionPass,
                              public InstVisitor<AMDGPUCodeGenPrepare, bool> {
   const GCNSubtarget *ST = nullptr;
@@ -879,7 +885,7 @@
       DA->isUniform(&I) && promoteUniformOpToI32(I))
     return true;
 
-  if (replaceMulWithMul24(I))
+  if (UseMul24Intrin && replaceMulWithMul24(I))
     return true;
 
   bool Changed = false;