Revert r218778 while investigating buldbot breakage.
"Move the complex address expression out of DIVariable and into an extra"
llvm-svn: 218782
diff --git a/llvm/test/Analysis/GlobalsModRef/pr12351.ll b/llvm/test/Analysis/GlobalsModRef/pr12351.ll
index c221f4c..1c5ac43 100644
--- a/llvm/test/Analysis/GlobalsModRef/pr12351.ll
+++ b/llvm/test/Analysis/GlobalsModRef/pr12351.ll
@@ -26,8 +26,8 @@
define void @bar2(i32* %foo) {
store i32 0, i32* %foo, align 4
- tail call void @llvm.dbg.value(metadata !{}, i64 0, metadata !{}, metadata !{})
+ tail call void @llvm.dbg.value(metadata !{}, i64 0, metadata !{})
ret void
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
diff --git a/llvm/test/Assembler/2010-02-05-FunctionLocalMetadataBecomesNull.ll b/llvm/test/Assembler/2010-02-05-FunctionLocalMetadataBecomesNull.ll
index b3af2cf..13d9824 100644
--- a/llvm/test/Assembler/2010-02-05-FunctionLocalMetadataBecomesNull.ll
+++ b/llvm/test/Assembler/2010-02-05-FunctionLocalMetadataBecomesNull.ll
@@ -12,7 +12,7 @@
define i32 @main() nounwind readonly {
%diff1 = alloca i64 ; <i64*> [#uses=2]
- call void @llvm.dbg.declare(metadata !{i64* %diff1}, metadata !0, metadata !{})
+ call void @llvm.dbg.declare(metadata !{i64* %diff1}, metadata !0)
store i64 72, i64* %diff1, align 8
%v1 = load %struct.test** @TestArrayPtr, align 8 ; <%struct.test*> [#uses=1]
%v2 = ptrtoint %struct.test* %v1 to i64 ; <i64> [#uses=1]
@@ -21,7 +21,7 @@
ret i32 4
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!7 = metadata !{metadata !1}
!6 = metadata !{i32 786449, metadata !8, i32 12, metadata !"clang version 3.0 (trunk 131941)", i1 true, metadata !"", i32 0, metadata !9, metadata !9, metadata !7, null, null, metadata !""} ; [ DW_TAG_compile_unit ]
diff --git a/llvm/test/Assembler/functionlocal-metadata.ll b/llvm/test/Assembler/functionlocal-metadata.ll
index 2657f2d..a19179c 100644
--- a/llvm/test/Assembler/functionlocal-metadata.ll
+++ b/llvm/test/Assembler/functionlocal-metadata.ll
@@ -3,33 +3,33 @@
define void @Foo(i32 %a, i32 %b) {
entry:
- call void @llvm.dbg.value(metadata !{ i32* %1 }, i64 16, metadata !2, metadata !{})
-; CHECK: call void @llvm.dbg.value(metadata !{i32* %1}, i64 16, metadata ![[ID2:[0-9]+]], metadata {{.*}})
+ call void @llvm.dbg.value(metadata !{ i32* %1 }, i64 16, metadata !2)
+; CHECK: call void @llvm.dbg.value(metadata !{i32* %1}, i64 16, metadata ![[ID2:[0-9]+]])
%0 = add i32 %a, 1 ; <i32> [#uses=1]
%two = add i32 %b, %0 ; <i32> [#uses=0]
%1 = alloca i32 ; <i32*> [#uses=1]
- call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !{i32* %1}, metadata !{})
-; CHECK: call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !{i32* %1}, metadata {{.*}})
- call void @llvm.dbg.declare(metadata !{i32 %two}, metadata !{i32 %0}, metadata !{})
-; CHECK: call void @llvm.dbg.declare(metadata !{i32 %two}, metadata !{i32 %0}, metadata {{.*}})
- call void @llvm.dbg.declare(metadata !{i32 %0}, metadata !{i32* %1, i32 %0}, metadata !{})
-; CHECK: call void @llvm.dbg.declare(metadata !{i32 %0}, metadata !{i32* %1, i32 %0}, metadata {{.*}})
- call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !{i32 %b, i32 %0}, metadata !{})
-; CHECK: call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !{i32 %b, i32 %0}, metadata {{.*}})
- call void @llvm.dbg.declare(metadata !{i32 %a}, metadata !{i32 %a, metadata !"foo"}, metadata !{})
-; CHECK: call void @llvm.dbg.declare(metadata !{i32 %a}, metadata !{i32 %a, metadata !"foo"}, metadata {{.*}})
- call void @llvm.dbg.declare(metadata !{i32 %b}, metadata !{metadata !0, i32 %two}, metadata !{})
-; CHECK: call void @llvm.dbg.declare(metadata !{i32 %b}, metadata !{metadata ![[ID0:[0-9]+]], i32 %two}, metadata {{.*}})
+ call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !{i32* %1})
+; CHECK: metadata !{i32* %1}, metadata !{i32* %1}
+ call void @llvm.dbg.declare(metadata !{i32 %two}, metadata !{i32 %0})
+; CHECK: metadata !{i32 %two}, metadata !{i32 %0}
+ call void @llvm.dbg.declare(metadata !{i32 %0}, metadata !{i32* %1, i32 %0})
+; CHECK: metadata !{i32 %0}, metadata !{i32* %1, i32 %0}
+ call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !{i32 %b, i32 %0})
+; CHECK: metadata !{i32* %1}, metadata !{i32 %b, i32 %0}
+ call void @llvm.dbg.declare(metadata !{i32 %a}, metadata !{i32 %a, metadata !"foo"})
+; CHECK: metadata !{i32 %a}, metadata !{i32 %a, metadata !"foo"}
+ call void @llvm.dbg.declare(metadata !{i32 %b}, metadata !{metadata !0, i32 %two})
+; CHECK: metadata !{i32 %b}, metadata !{metadata ![[ID0:[0-9]+]], i32 %two}
- call void @llvm.dbg.value(metadata !{ i32 %a }, i64 0, metadata !1, metadata !{})
-; CHECK: call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata ![[ID1:[0-9]+]], metadata {{.*}})
- call void @llvm.dbg.value(metadata !{ i32 %0 }, i64 25, metadata !0, metadata !{})
-; CHECK: call void @llvm.dbg.value(metadata !{i32 %0}, i64 25, metadata ![[ID0]], metadata {{.*}})
- call void @llvm.dbg.value(metadata !{ i32* %1 }, i64 16, metadata !3, metadata !{})
-; CHECK: call void @llvm.dbg.value(metadata !{i32* %1}, i64 16, metadata ![[ID3:[0-9]+]], metadata {{.*}})
- call void @llvm.dbg.value(metadata !3, i64 12, metadata !2, metadata !{})
-; CHECK: call void @llvm.dbg.value(metadata ![[ID3]], i64 12, metadata ![[ID2]], metadata {{.*}})
+ call void @llvm.dbg.value(metadata !{ i32 %a }, i64 0, metadata !1)
+; CHECK: metadata !{i32 %a}, i64 0, metadata ![[ID1:[0-9]+]]
+ call void @llvm.dbg.value(metadata !{ i32 %0 }, i64 25, metadata !0)
+; CHECK: metadata !{i32 %0}, i64 25, metadata ![[ID0]]
+ call void @llvm.dbg.value(metadata !{ i32* %1 }, i64 16, metadata !3)
+; CHECK: call void @llvm.dbg.value(metadata !{i32* %1}, i64 16, metadata ![[ID3:[0-9]+]])
+ call void @llvm.dbg.value(metadata !3, i64 12, metadata !2)
+; CHECK: metadata ![[ID3]], i64 12, metadata ![[ID2]]
ret void, !foo !0, !bar !1
; CHECK: ret void, !foo ![[FOO:[0-9]+]], !bar ![[BAR:[0-9]+]]
@@ -43,8 +43,8 @@
!3 = metadata !{metadata !"foo"}
!4 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!foo = !{ !0 }
!bar = !{ !1 }
diff --git a/llvm/test/CodeGen/AArch64/aarch64-2014-08-11-MachineCombinerCrash.ll b/llvm/test/CodeGen/AArch64/aarch64-2014-08-11-MachineCombinerCrash.ll
index a1eed7b..d52703f 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-2014-08-11-MachineCombinerCrash.ll
+++ b/llvm/test/CodeGen/AArch64/aarch64-2014-08-11-MachineCombinerCrash.ll
@@ -16,7 +16,7 @@
%add53 = add nsw i64 %n1, 0, !dbg !52
%add55 = add nsw i64 %n1, 0, !dbg !53
%mul63 = mul nsw i64 %add53, -20995, !dbg !54
- tail call void @llvm.dbg.value(metadata !{i64 %mul63}, i64 0, metadata !30, metadata !{}), !dbg !55
+ tail call void @llvm.dbg.value(metadata !{i64 %mul63}, i64 0, metadata !30), !dbg !55
%mul65 = mul nsw i64 %add55, -3196, !dbg !56
%add67 = add nsw i64 0, %mul65, !dbg !57
%add80 = add i64 0, 1024, !dbg !58
@@ -35,7 +35,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata) #1
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/CodeGen/AArch64/arm64-2011-03-17-AsmPrinterCrash.ll b/llvm/test/CodeGen/AArch64/arm64-2011-03-17-AsmPrinterCrash.ll
index dd5dfb7..2b083d8 100644
--- a/llvm/test/CodeGen/AArch64/arm64-2011-03-17-AsmPrinterCrash.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-2011-03-17-AsmPrinterCrash.ll
@@ -11,12 +11,12 @@
unreachable
if.else295: ; preds = %entry
- call void @llvm.dbg.declare(metadata !{i32* %do_tab_convert}, metadata !16, metadata !{}), !dbg !18
+ call void @llvm.dbg.declare(metadata !{i32* %do_tab_convert}, metadata !16), !dbg !18
store i32 0, i32* %do_tab_convert, align 4, !dbg !19
unreachable
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.gv = !{!0}
!llvm.dbg.sp = !{!1, !7, !10, !11, !12}
diff --git a/llvm/test/CodeGen/ARM/2009-10-16-Scope.ll b/llvm/test/CodeGen/ARM/2009-10-16-Scope.ll
index c27b3e5..570fcf9 100644
--- a/llvm/test/CodeGen/ARM/2009-10-16-Scope.ll
+++ b/llvm/test/CodeGen/ARM/2009-10-16-Scope.ll
@@ -9,7 +9,7 @@
br label %do.body, !dbg !0
do.body: ; preds = %entry
- call void @llvm.dbg.declare(metadata !{i32* %count_}, metadata !4, metadata !{})
+ call void @llvm.dbg.declare(metadata !{i32* %count_}, metadata !4)
%conv = ptrtoint i32* %count_ to i32, !dbg !0 ; <i32> [#uses=1]
%call = call i32 @foo(i32 %conv) ssp, !dbg !0 ; <i32> [#uses=0]
br label %do.end, !dbg !0
@@ -18,7 +18,7 @@
ret void, !dbg !7
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
declare i32 @foo(i32) ssp
diff --git a/llvm/test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll b/llvm/test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll
index 9da47be..35739d7 100644
--- a/llvm/test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll
+++ b/llvm/test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll
@@ -5,12 +5,12 @@
define hidden i32 @__addvsi3(i32 %a, i32 %b) nounwind {
entry:
- tail call void @llvm.dbg.value(metadata !{i32 %b}, i64 0, metadata !0, metadata !{})
+ tail call void @llvm.dbg.value(metadata !{i32 %b}, i64 0, metadata !0)
%0 = add nsw i32 %b, %a, !dbg !9 ; <i32> [#uses=1]
ret i32 %0, !dbg !11
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!3}
!llvm.module.flags = !{!15}
diff --git a/llvm/test/CodeGen/ARM/2010-06-25-Thumb2ITInvalidIterator.ll b/llvm/test/CodeGen/ARM/2010-06-25-Thumb2ITInvalidIterator.ll
index a367ecb..a53200e 100644
--- a/llvm/test/CodeGen/ARM/2010-06-25-Thumb2ITInvalidIterator.ll
+++ b/llvm/test/CodeGen/ARM/2010-06-25-Thumb2ITInvalidIterator.ll
@@ -7,16 +7,16 @@
define void @x0(i8* nocapture %buf, i32 %nbytes) nounwind optsize {
entry:
- tail call void @llvm.dbg.value(metadata !{i8* %buf}, i64 0, metadata !0, metadata !{}), !dbg !15
- tail call void @llvm.dbg.value(metadata !{i32 %nbytes}, i64 0, metadata !8, metadata !{}), !dbg !16
+ tail call void @llvm.dbg.value(metadata !{i8* %buf}, i64 0, metadata !0), !dbg !15
+ tail call void @llvm.dbg.value(metadata !{i32 %nbytes}, i64 0, metadata !8), !dbg !16
%tmp = load i32* @length, !dbg !17 ; <i32> [#uses=3]
%cmp = icmp eq i32 %tmp, -1, !dbg !17 ; <i1> [#uses=1]
%cmp.not = xor i1 %cmp, true ; <i1> [#uses=1]
%cmp3 = icmp ult i32 %tmp, %nbytes, !dbg !17 ; <i1> [#uses=1]
%or.cond = and i1 %cmp.not, %cmp3 ; <i1> [#uses=1]
- tail call void @llvm.dbg.value(metadata !{i32 %tmp}, i64 0, metadata !8, metadata !{}), !dbg !17
+ tail call void @llvm.dbg.value(metadata !{i32 %tmp}, i64 0, metadata !8), !dbg !17
%nbytes.addr.0 = select i1 %or.cond, i32 %tmp, i32 %nbytes ; <i32> [#uses=1]
- tail call void @llvm.dbg.value(metadata !18, i64 0, metadata !10, metadata !{}), !dbg !19
+ tail call void @llvm.dbg.value(metadata !18, i64 0, metadata !10), !dbg !19
br label %while.cond, !dbg !20
while.cond: ; preds = %while.body, %entry
@@ -42,7 +42,7 @@
declare i32 @x1() optsize
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.lv.fn = !{!0, !8, !10, !12}
!llvm.dbg.gv = !{!14}
diff --git a/llvm/test/CodeGen/ARM/2010-08-04-StackVariable.ll b/llvm/test/CodeGen/ARM/2010-08-04-StackVariable.ll
index 13baf25..1e86c50 100644
--- a/llvm/test/CodeGen/ARM/2010-08-04-StackVariable.ll
+++ b/llvm/test/CodeGen/ARM/2010-08-04-StackVariable.ll
@@ -6,8 +6,8 @@
define i32 @_Z3fooi4SVal(i32 %i, %struct.SVal* noalias %location) nounwind ssp {
entry:
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !23, metadata !{}), !dbg !24
- call void @llvm.dbg.value(metadata !{%struct.SVal* %location}, i64 0, metadata !25, metadata !{}), !dbg !24
+ call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !23), !dbg !24
+ call void @llvm.dbg.value(metadata !{%struct.SVal* %location}, i64 0, metadata !25), !dbg !24
%0 = icmp ne i32 %i, 0, !dbg !27 ; <i1> [#uses=1]
br i1 %0, label %bb, label %bb1, !dbg !27
@@ -34,7 +34,7 @@
define linkonce_odr void @_ZN4SValC1Ev(%struct.SVal* %this) nounwind ssp align 2 {
entry:
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.value(metadata !{%struct.SVal* %this}, i64 0, metadata !31, metadata !{}), !dbg !34
+ call void @llvm.dbg.value(metadata !{%struct.SVal* %this}, i64 0, metadata !31), !dbg !34
%0 = getelementptr inbounds %struct.SVal* %this, i32 0, i32 0, !dbg !34 ; <i8**> [#uses=1]
store i8* null, i8** %0, align 8, !dbg !34
%1 = getelementptr inbounds %struct.SVal* %this, i32 0, i32 1, !dbg !34 ; <i32*> [#uses=1]
@@ -45,14 +45,14 @@
ret void, !dbg !35
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define i32 @main() nounwind ssp {
entry:
%0 = alloca %struct.SVal ; <%struct.SVal*> [#uses=3]
%v = alloca %struct.SVal ; <%struct.SVal*> [#uses=4]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.declare(metadata !{%struct.SVal* %v}, metadata !38, metadata !{}), !dbg !41
+ call void @llvm.dbg.declare(metadata !{%struct.SVal* %v}, metadata !38), !dbg !41
call void @_ZN4SValC1Ev(%struct.SVal* %v) nounwind, !dbg !41
%1 = getelementptr inbounds %struct.SVal* %v, i32 0, i32 1, !dbg !42 ; <i32*> [#uses=1]
store i32 1, i32* %1, align 8, !dbg !42
@@ -65,14 +65,14 @@
%7 = load i32* %6, align 8, !dbg !43 ; <i32> [#uses=1]
store i32 %7, i32* %5, align 8, !dbg !43
%8 = call i32 @_Z3fooi4SVal(i32 2, %struct.SVal* noalias %0) nounwind, !dbg !43 ; <i32> [#uses=0]
- call void @llvm.dbg.value(metadata !{i32 %8}, i64 0, metadata !44, metadata !{}), !dbg !43
+ call void @llvm.dbg.value(metadata !{i32 %8}, i64 0, metadata !44), !dbg !43
br label %return, !dbg !45
return: ; preds = %entry
ret i32 0, !dbg !45
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!3}
!llvm.module.flags = !{!49}
diff --git a/llvm/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll b/llvm/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll
index 9a8642a..902c9cbb 100644
--- a/llvm/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll
+++ b/llvm/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll
@@ -30,47 +30,47 @@
define zeroext i8 @get1(i8 zeroext %a) nounwind optsize {
entry:
- tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !10, metadata !{}), !dbg !30
+ tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !10), !dbg !30
%0 = load i8* @x1, align 4, !dbg !30
- tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !11, metadata !{}), !dbg !30
+ tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !11), !dbg !30
store i8 %a, i8* @x1, align 4, !dbg !30
ret i8 %0, !dbg !31
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
define zeroext i8 @get2(i8 zeroext %a) nounwind optsize {
entry:
- tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !18, metadata !{}), !dbg !32
+ tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !18), !dbg !32
%0 = load i8* @x2, align 4, !dbg !32
- tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !19, metadata !{}), !dbg !32
+ tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !19), !dbg !32
store i8 %a, i8* @x2, align 4, !dbg !32
ret i8 %0, !dbg !33
}
define zeroext i8 @get3(i8 zeroext %a) nounwind optsize {
entry:
- tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !21, metadata !{}), !dbg !34
+ tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !21), !dbg !34
%0 = load i8* @x3, align 4, !dbg !34
- tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !22, metadata !{}), !dbg !34
+ tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !22), !dbg !34
store i8 %a, i8* @x3, align 4, !dbg !34
ret i8 %0, !dbg !35
}
define zeroext i8 @get4(i8 zeroext %a) nounwind optsize {
entry:
- tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !24, metadata !{}), !dbg !36
+ tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !24), !dbg !36
%0 = load i8* @x4, align 4, !dbg !36
- tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !25, metadata !{}), !dbg !36
+ tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !25), !dbg !36
store i8 %a, i8* @x4, align 4, !dbg !36
ret i8 %0, !dbg !37
}
define zeroext i8 @get5(i8 zeroext %a) nounwind optsize {
entry:
- tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !27, metadata !{}), !dbg !38
+ tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !27), !dbg !38
%0 = load i8* @x5, align 4, !dbg !38
- tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !28, metadata !{}), !dbg !38
+ tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !28), !dbg !38
store i8 %a, i8* @x5, align 4, !dbg !38
ret i8 %0, !dbg !39
}
diff --git a/llvm/test/CodeGen/ARM/2011-08-02-MergedGlobalDbg.ll b/llvm/test/CodeGen/ARM/2011-08-02-MergedGlobalDbg.ll
index 243b5ad..6f7c081 100644
--- a/llvm/test/CodeGen/ARM/2011-08-02-MergedGlobalDbg.ll
+++ b/llvm/test/CodeGen/ARM/2011-08-02-MergedGlobalDbg.ll
@@ -29,46 +29,46 @@
@x5 = global i32 0, align 4
define i32 @get1(i32 %a) nounwind optsize ssp {
- tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !10, metadata !{}), !dbg !30
+ tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !10), !dbg !30
%1 = load i32* @x1, align 4, !dbg !31
- tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !11, metadata !{}), !dbg !31
+ tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !11), !dbg !31
store i32 %a, i32* @x1, align 4, !dbg !31
ret i32 %1, !dbg !31
}
define i32 @get2(i32 %a) nounwind optsize ssp {
- tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !13, metadata !{}), !dbg !32
+ tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !13), !dbg !32
%1 = load i32* @x2, align 4, !dbg !33
- tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !14, metadata !{}), !dbg !33
+ tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !14), !dbg !33
store i32 %a, i32* @x2, align 4, !dbg !33
ret i32 %1, !dbg !33
}
define i32 @get3(i32 %a) nounwind optsize ssp {
- tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !16, metadata !{}), !dbg !34
+ tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !16), !dbg !34
%1 = load i32* @x3, align 4, !dbg !35
- tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !17, metadata !{}), !dbg !35
+ tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !17), !dbg !35
store i32 %a, i32* @x3, align 4, !dbg !35
ret i32 %1, !dbg !35
}
define i32 @get4(i32 %a) nounwind optsize ssp {
- tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !19, metadata !{}), !dbg !36
+ tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !19), !dbg !36
%1 = load i32* @x4, align 4, !dbg !37
- tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !20, metadata !{}), !dbg !37
+ tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !20), !dbg !37
store i32 %a, i32* @x4, align 4, !dbg !37
ret i32 %1, !dbg !37
}
define i32 @get5(i32 %a) nounwind optsize ssp {
- tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !27, metadata !{}), !dbg !38
+ tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !27), !dbg !38
%1 = load i32* @x5, align 4, !dbg !39
- tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !28, metadata !{}), !dbg !39
+ tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !28), !dbg !39
store i32 %a, i32* @x5, align 4, !dbg !39
ret i32 %1, !dbg !39
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!49}
diff --git a/llvm/test/CodeGen/ARM/coalesce-dbgvalue.ll b/llvm/test/CodeGen/ARM/coalesce-dbgvalue.ll
index 6f44dee..606c9bc 100644
--- a/llvm/test/CodeGen/ARM/coalesce-dbgvalue.ll
+++ b/llvm/test/CodeGen/ARM/coalesce-dbgvalue.ll
@@ -27,11 +27,11 @@
for.body2: ; preds = %for.cond1
store i32 %storemerge11, i32* @b, align 4, !dbg !26
- tail call void @llvm.dbg.value(metadata !27, i64 0, metadata !11, metadata !{}), !dbg !28
+ tail call void @llvm.dbg.value(metadata !27, i64 0, metadata !11), !dbg !28
%0 = load i64* @a, align 8, !dbg !29
%xor = xor i64 %0, %e.1.ph, !dbg !29
%conv3 = trunc i64 %xor to i32, !dbg !29
- tail call void @llvm.dbg.value(metadata !{i32 %conv3}, i64 0, metadata !10, metadata !{}), !dbg !29
+ tail call void @llvm.dbg.value(metadata !{i32 %conv3}, i64 0, metadata !10), !dbg !29
%tobool4 = icmp eq i32 %conv3, 0, !dbg !29
br i1 %tobool4, label %land.end, label %land.rhs, !dbg !29
@@ -69,7 +69,7 @@
declare i32 @fn3(...) #1
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
+declare void @llvm.dbg.value(metadata, i64, metadata) #2
attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
diff --git a/llvm/test/CodeGen/ARM/debug-info-arg.ll b/llvm/test/CodeGen/ARM/debug-info-arg.ll
index 362a69e..ebe2e93 100644
--- a/llvm/test/CodeGen/ARM/debug-info-arg.ll
+++ b/llvm/test/CodeGen/ARM/debug-info-arg.ll
@@ -7,13 +7,13 @@
%struct.tag_s = type { i32, i32, i32 }
define void @foo(%struct.tag_s* nocapture %this, %struct.tag_s* %c, i64 %x, i64 %y, %struct.tag_s* nocapture %ptr1, %struct.tag_s* nocapture %ptr2) nounwind ssp {
- tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %this}, i64 0, metadata !5, metadata !{}), !dbg !20
- tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %c}, i64 0, metadata !13, metadata !{}), !dbg !21
- tail call void @llvm.dbg.value(metadata !{i64 %x}, i64 0, metadata !14, metadata !{}), !dbg !22
- tail call void @llvm.dbg.value(metadata !{i64 %y}, i64 0, metadata !17, metadata !{}), !dbg !23
+ tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %this}, i64 0, metadata !5), !dbg !20
+ tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %c}, i64 0, metadata !13), !dbg !21
+ tail call void @llvm.dbg.value(metadata !{i64 %x}, i64 0, metadata !14), !dbg !22
+ tail call void @llvm.dbg.value(metadata !{i64 %y}, i64 0, metadata !17), !dbg !23
;CHECK: @DEBUG_VALUE: foo:y <- [R7+8]
- tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %ptr1}, i64 0, metadata !18, metadata !{}), !dbg !24
- tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %ptr2}, i64 0, metadata !19, metadata !{}), !dbg !25
+ tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %ptr1}, i64 0, metadata !18), !dbg !24
+ tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %ptr2}, i64 0, metadata !19), !dbg !25
%1 = icmp eq %struct.tag_s* %c, null, !dbg !26
br i1 %1, label %3, label %2, !dbg !26
@@ -27,7 +27,7 @@
declare void @foobar(i64, i64)
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!33}
diff --git a/llvm/test/CodeGen/ARM/debug-info-blocks.ll b/llvm/test/CodeGen/ARM/debug-info-blocks.ll
index c11c530..2b1513c 100644
--- a/llvm/test/CodeGen/ARM/debug-info-blocks.ll
+++ b/llvm/test/CodeGen/ARM/debug-info-blocks.ll
@@ -19,11 +19,11 @@
@"OBJC_IVAR_$_MyWork._data" = external hidden global i32, section "__DATA, __objc_const", align 4
@"\01L_OBJC_SELECTOR_REFERENCES_222" = external hidden global i8*, section "__DATA, __objc_selrefs, literal_pointers, no_dead_strip"
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
declare i8* @objc_msgSend(i8*, i8*, ...)
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
@@ -31,22 +31,22 @@
%1 = alloca %0*, align 4
%bounds = alloca %struct.CR, align 4
%data = alloca %struct.CR, align 4
- call void @llvm.dbg.value(metadata !{i8* %.block_descriptor}, i64 0, metadata !27, metadata !{}), !dbg !129
+ call void @llvm.dbg.value(metadata !{i8* %.block_descriptor}, i64 0, metadata !27), !dbg !129
store %0* %loadedMydata, %0** %1, align 4
- call void @llvm.dbg.declare(metadata !{%0** %1}, metadata !130, metadata !{}), !dbg !131
+ call void @llvm.dbg.declare(metadata !{%0** %1}, metadata !130), !dbg !131
%2 = bitcast %struct.CR* %bounds to %1*
%3 = getelementptr %1* %2, i32 0, i32 0
store [4 x i32] %bounds.coerce0, [4 x i32]* %3
- call void @llvm.dbg.declare(metadata !{%struct.CR* %bounds}, metadata !132, metadata !{}), !dbg !133
+ call void @llvm.dbg.declare(metadata !{%struct.CR* %bounds}, metadata !132), !dbg !133
%4 = bitcast %struct.CR* %data to %1*
%5 = getelementptr %1* %4, i32 0, i32 0
store [4 x i32] %data.coerce0, [4 x i32]* %5
- call void @llvm.dbg.declare(metadata !{%struct.CR* %data}, metadata !134, metadata !{}), !dbg !135
+ call void @llvm.dbg.declare(metadata !{%struct.CR* %data}, metadata !134), !dbg !135
%6 = bitcast i8* %.block_descriptor to %2*
%7 = getelementptr inbounds %2* %6, i32 0, i32 6
- call void @llvm.dbg.declare(metadata !{%2* %6}, metadata !136, metadata !163), !dbg !137
- call void @llvm.dbg.declare(metadata !{%2* %6}, metadata !138, metadata !164), !dbg !137
- call void @llvm.dbg.declare(metadata !{%2* %6}, metadata !139, metadata !165), !dbg !140
+ call void @llvm.dbg.declare(metadata !{%2* %6}, metadata !136), !dbg !137
+ call void @llvm.dbg.declare(metadata !{%2* %6}, metadata !138), !dbg !137
+ call void @llvm.dbg.declare(metadata !{%2* %6}, metadata !139), !dbg !140
%8 = load %0** %1, align 4, !dbg !141
%9 = load i8** @"\01L_OBJC_SELECTOR_REFERENCES_13", !dbg !141
%10 = bitcast %0* %8 to i8*, !dbg !141
@@ -231,10 +231,10 @@
!133 = metadata !{i32 609, i32 175, metadata !23, null}
!134 = metadata !{i32 786689, metadata !23, metadata !"data", metadata !24, i32 67109473, metadata !108, i32 0, null} ; [ DW_TAG_arg_variable ]
!135 = metadata !{i32 609, i32 190, metadata !23, null}
-!136 = metadata !{i32 786688, metadata !23, metadata !"mydata", metadata !24, i32 604, metadata !50, i32 0, null} ;; [ DW_TAG_auto_variable ]
+!136 = metadata !{i32 786688, metadata !23, metadata !"mydata", metadata !24, i32 604, metadata !50, i32 0, null, metadata !163} ; [ DW_TAG_auto_variable ]
!137 = metadata !{i32 604, i32 49, metadata !23, null}
-!138 = metadata !{i32 786688, metadata !23, metadata !"self", metadata !40, i32 604, metadata !90, i32 0, null} ;; [ DW_TAG_auto_variable ]
-!139 = metadata !{i32 786688, metadata !23, metadata !"semi", metadata !24, i32 607, metadata !125, i32 0, null} ;; [ DW_TAG_auto_variable ]
+!138 = metadata !{i32 786688, metadata !23, metadata !"self", metadata !40, i32 604, metadata !90, i32 0, null, metadata !164} ; [ DW_TAG_auto_variable ]
+!139 = metadata !{i32 786688, metadata !23, metadata !"semi", metadata !24, i32 607, metadata !125, i32 0, null, metadata !165} ; [ DW_TAG_auto_variable ]
!140 = metadata !{i32 607, i32 30, metadata !23, null}
!141 = metadata !{i32 610, i32 17, metadata !142, null}
!142 = metadata !{i32 786443, metadata !152, metadata !23, i32 609, i32 200, i32 94} ; [ DW_TAG_lexical_block ]
@@ -258,6 +258,6 @@
!160 = metadata !{metadata !"header.h", metadata !"/Volumes/Sandbox/llvm"}
!161 = metadata !{metadata !"header2.h", metadata !"/Volumes/Sandbox/llvm"}
!162 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
-!163 = metadata !{i32 786690, i64 34, i64 20, i64 6, i64 34, i64 4, i64 6, i64 34, i64 24} ; [DW_OP_plus 20 DW_OP_deref DW_OP_plus 4 DW_OP_deref DW_OP_plus 24]
-!164 = metadata !{i32 786690, i64 34, i64 24} ; [DW_OP_plus 24]
-!165 = metadata !{i32 786690, i64 34, i64 28} ; [DW_OP_plus 28]
+!163 = metadata !{i64 1, i64 20, i64 2, i64 1, i64 4, i64 2, i64 1, i64 24}
+!164 = metadata !{i64 1, i64 24}
+!165 = metadata !{i64 1, i64 28}
diff --git a/llvm/test/CodeGen/ARM/debug-info-branch-folding.ll b/llvm/test/CodeGen/ARM/debug-info-branch-folding.ll
index 52937ba..f2a51d6 100644
--- a/llvm/test/CodeGen/ARM/debug-info-branch-folding.ll
+++ b/llvm/test/CodeGen/ARM/debug-info-branch-folding.ll
@@ -20,9 +20,9 @@
for.body9: ; preds = %for.body9, %entry
%add19 = fadd <4 x float> undef, <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00>, !dbg !39
- tail call void @llvm.dbg.value(metadata !{<4 x float> %add19}, i64 0, metadata !27, metadata !{}), !dbg !39
+ tail call void @llvm.dbg.value(metadata !{<4 x float> %add19}, i64 0, metadata !27), !dbg !39
%add20 = fadd <4 x float> undef, <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00>, !dbg !39
- tail call void @llvm.dbg.value(metadata !{<4 x float> %add20}, i64 0, metadata !28, metadata !{}), !dbg !39
+ tail call void @llvm.dbg.value(metadata !{<4 x float> %add20}, i64 0, metadata !28), !dbg !39
br i1 %cond, label %for.end54, label %for.body9, !dbg !44
for.end54: ; preds = %for.body9
@@ -37,7 +37,7 @@
declare i32 @printf(i8* nocapture, ...) nounwind
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.module.flags = !{!56}
!llvm.dbg.cu = !{!2}
diff --git a/llvm/test/CodeGen/ARM/debug-info-d16-reg.ll b/llvm/test/CodeGen/ARM/debug-info-d16-reg.ll
index 4270421..84fb57e 100644
--- a/llvm/test/CodeGen/ARM/debug-info-d16-reg.ll
+++ b/llvm/test/CodeGen/ARM/debug-info-d16-reg.ll
@@ -12,9 +12,9 @@
define i32 @inlineprinter(i8* %ptr, double %val, i8 zeroext %c) nounwind optsize {
entry:
- tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !19, metadata !{}), !dbg !26
- tail call void @llvm.dbg.value(metadata !{double %val}, i64 0, metadata !20, metadata !{}), !dbg !26
- tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !21, metadata !{}), !dbg !26
+ tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !19), !dbg !26
+ tail call void @llvm.dbg.value(metadata !{double %val}, i64 0, metadata !20), !dbg !26
+ tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !21), !dbg !26
%0 = zext i8 %c to i32, !dbg !27
%1 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %val, i32 %0) nounwind, !dbg !27
ret i32 0, !dbg !29
@@ -22,9 +22,9 @@
define i32 @printer(i8* %ptr, double %val, i8 zeroext %c) nounwind optsize noinline {
entry:
- tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !16, metadata !{}), !dbg !30
- tail call void @llvm.dbg.value(metadata !{double %val}, i64 0, metadata !17, metadata !{}), !dbg !30
- tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !18, metadata !{}), !dbg !30
+ tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !16), !dbg !30
+ tail call void @llvm.dbg.value(metadata !{double %val}, i64 0, metadata !17), !dbg !30
+ tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !18), !dbg !30
%0 = zext i8 %c to i32, !dbg !31
%1 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %val, i32 %0) nounwind, !dbg !31
ret i32 0, !dbg !33
@@ -32,22 +32,22 @@
declare i32 @printf(i8* nocapture, ...) nounwind
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
define i32 @main(i32 %argc, i8** nocapture %argv) nounwind optsize {
entry:
- tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !22, metadata !{}), !dbg !34
- tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !23, metadata !{}), !dbg !34
+ tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !22), !dbg !34
+ tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !23), !dbg !34
%0 = sitofp i32 %argc to double, !dbg !35
%1 = fadd double %0, 5.555552e+05, !dbg !35
- tail call void @llvm.dbg.value(metadata !{double %1}, i64 0, metadata !24, metadata !{}), !dbg !35
+ tail call void @llvm.dbg.value(metadata !{double %1}, i64 0, metadata !24), !dbg !35
%2 = tail call i32 @puts(i8* getelementptr inbounds ([6 x i8]* @.str1, i32 0, i32 0)) nounwind, !dbg !36
%3 = getelementptr inbounds i8* bitcast (i32 (i32, i8**)* @main to i8*), i32 %argc, !dbg !37
%4 = trunc i32 %argc to i8, !dbg !37
%5 = add i8 %4, 97, !dbg !37
- tail call void @llvm.dbg.value(metadata !{i8* %3}, i64 0, metadata !19, metadata !{}) nounwind, !dbg !38
- tail call void @llvm.dbg.value(metadata !{double %1}, i64 0, metadata !20, metadata !{}) nounwind, !dbg !38
- tail call void @llvm.dbg.value(metadata !{i8 %5}, i64 0, metadata !21, metadata !{}) nounwind, !dbg !38
+ tail call void @llvm.dbg.value(metadata !{i8* %3}, i64 0, metadata !19) nounwind, !dbg !38
+ tail call void @llvm.dbg.value(metadata !{double %1}, i64 0, metadata !20) nounwind, !dbg !38
+ tail call void @llvm.dbg.value(metadata !{i8 %5}, i64 0, metadata !21) nounwind, !dbg !38
%6 = zext i8 %5 to i32, !dbg !39
%7 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i8* %3, double %1, i32 %6) nounwind, !dbg !39
%8 = tail call i32 @printer(i8* %3, double %1, i8 zeroext %5) nounwind, !dbg !40
diff --git a/llvm/test/CodeGen/ARM/debug-info-qreg.ll b/llvm/test/CodeGen/ARM/debug-info-qreg.ll
index cd2b999..b7f8812 100644
--- a/llvm/test/CodeGen/ARM/debug-info-qreg.ll
+++ b/llvm/test/CodeGen/ARM/debug-info-qreg.ll
@@ -26,7 +26,7 @@
br i1 undef, label %for.end54, label %for.body9, !dbg !44
for.end54: ; preds = %for.body9
- tail call void @llvm.dbg.value(metadata !{<4 x float> %add19}, i64 0, metadata !27, metadata !{}), !dbg !39
+ tail call void @llvm.dbg.value(metadata !{<4 x float> %add19}, i64 0, metadata !27), !dbg !39
%tmp115 = extractelement <4 x float> %add19, i32 1
%conv6.i75 = fpext float %tmp115 to double, !dbg !45
%call.i82 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([13 x i8]* @.str, i32 0, i32 0), double undef, double %conv6.i75, double undef, double undef) nounwind, !dbg !45
@@ -35,7 +35,7 @@
declare i32 @printf(i8* nocapture, ...) nounwind
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!56}
diff --git a/llvm/test/CodeGen/ARM/debug-info-s16-reg.ll b/llvm/test/CodeGen/ARM/debug-info-s16-reg.ll
index 79fc057..6d992d9 100644
--- a/llvm/test/CodeGen/ARM/debug-info-s16-reg.ll
+++ b/llvm/test/CodeGen/ARM/debug-info-s16-reg.ll
@@ -15,9 +15,9 @@
define i32 @inlineprinter(i8* %ptr, float %val, i8 zeroext %c) nounwind optsize ssp {
entry:
- tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !8, metadata !{}), !dbg !24
- tail call void @llvm.dbg.value(metadata !{float %val}, i64 0, metadata !10, metadata !{}), !dbg !25
- tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !12, metadata !{}), !dbg !26
+ tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !8), !dbg !24
+ tail call void @llvm.dbg.value(metadata !{float %val}, i64 0, metadata !10), !dbg !25
+ tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !12), !dbg !26
%conv = fpext float %val to double, !dbg !27
%conv3 = zext i8 %c to i32, !dbg !27
%call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %conv, i32 %conv3) nounwind optsize, !dbg !27
@@ -28,9 +28,9 @@
define i32 @printer(i8* %ptr, float %val, i8 zeroext %c) nounwind optsize noinline ssp {
entry:
- tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !14, metadata !{}), !dbg !30
- tail call void @llvm.dbg.value(metadata !{float %val}, i64 0, metadata !15, metadata !{}), !dbg !31
- tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !16, metadata !{}), !dbg !32
+ tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !14), !dbg !30
+ tail call void @llvm.dbg.value(metadata !{float %val}, i64 0, metadata !15), !dbg !31
+ tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !16), !dbg !32
%conv = fpext float %val to double, !dbg !33
%conv3 = zext i8 %c to i32, !dbg !33
%call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %conv, i32 %conv3) nounwind optsize, !dbg !33
@@ -39,19 +39,19 @@
define i32 @main(i32 %argc, i8** nocapture %argv) nounwind optsize ssp {
entry:
- tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !17, metadata !{}), !dbg !36
- tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !18, metadata !{}), !dbg !37
+ tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !17), !dbg !36
+ tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !18), !dbg !37
%conv = sitofp i32 %argc to double, !dbg !38
%add = fadd double %conv, 5.555552e+05, !dbg !38
%conv1 = fptrunc double %add to float, !dbg !38
- tail call void @llvm.dbg.value(metadata !{float %conv1}, i64 0, metadata !22, metadata !{}), !dbg !38
+ tail call void @llvm.dbg.value(metadata !{float %conv1}, i64 0, metadata !22), !dbg !38
%call = tail call i32 @puts(i8* getelementptr inbounds ([6 x i8]* @.str1, i32 0, i32 0)) nounwind optsize, !dbg !39
%add.ptr = getelementptr i8* bitcast (i32 (i32, i8**)* @main to i8*), i32 %argc, !dbg !40
%add5 = add nsw i32 %argc, 97, !dbg !40
%conv6 = trunc i32 %add5 to i8, !dbg !40
- tail call void @llvm.dbg.value(metadata !{i8* %add.ptr}, i64 0, metadata !8, metadata !{}) nounwind, !dbg !41
- tail call void @llvm.dbg.value(metadata !{float %conv1}, i64 0, metadata !10, metadata !{}) nounwind, !dbg !42
- tail call void @llvm.dbg.value(metadata !{i8 %conv6}, i64 0, metadata !12, metadata !{}) nounwind, !dbg !43
+ tail call void @llvm.dbg.value(metadata !{i8* %add.ptr}, i64 0, metadata !8) nounwind, !dbg !41
+ tail call void @llvm.dbg.value(metadata !{float %conv1}, i64 0, metadata !10) nounwind, !dbg !42
+ tail call void @llvm.dbg.value(metadata !{i8 %conv6}, i64 0, metadata !12) nounwind, !dbg !43
%conv.i = fpext float %conv1 to double, !dbg !44
%conv3.i = and i32 %add5, 255, !dbg !44
%call.i = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i8* %add.ptr, double %conv.i, i32 %conv3.i) nounwind optsize, !dbg !44
@@ -61,7 +61,7 @@
declare i32 @puts(i8* nocapture) nounwind optsize
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!53}
diff --git a/llvm/test/CodeGen/ARM/debug-info-sreg2.ll b/llvm/test/CodeGen/ARM/debug-info-sreg2.ll
index dd93c1b..c74bd43 100644
--- a/llvm/test/CodeGen/ARM/debug-info-sreg2.ll
+++ b/llvm/test/CodeGen/ARM/debug-info-sreg2.ll
@@ -15,7 +15,7 @@
define void @_Z3foov() optsize ssp {
entry:
%call = tail call float @_Z3barv() optsize, !dbg !11
- tail call void @llvm.dbg.value(metadata !{float %call}, i64 0, metadata !5, metadata !{}), !dbg !11
+ tail call void @llvm.dbg.value(metadata !{float %call}, i64 0, metadata !5), !dbg !11
%call16 = tail call float @_Z2f2v() optsize, !dbg !12
%cmp7 = fcmp olt float %call, %call16, !dbg !12
br i1 %cmp7, label %for.body, label %for.end, !dbg !12
@@ -38,7 +38,7 @@
declare float @_Z2f3f(float) optsize
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!20}
diff --git a/llvm/test/CodeGen/Generic/dbg_value.ll b/llvm/test/CodeGen/Generic/dbg_value.ll
index 83ac8e5..840eeb0 100644
--- a/llvm/test/CodeGen/Generic/dbg_value.ll
+++ b/llvm/test/CodeGen/Generic/dbg_value.ll
@@ -4,11 +4,11 @@
%0 = type { i32, i32 }
define void @t(%0*, i32, i32, i32, i32) nounwind {
- tail call void @llvm.dbg.value(metadata !{%0* %0}, i64 0, metadata !0, metadata !{})
+ tail call void @llvm.dbg.value(metadata !{%0* %0}, i64 0, metadata !0)
unreachable
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
; !0 should conform to the format of DIVariable.
!0 = metadata !{i32 786689, null, metadata !"a", null, i32 0, null, i32 0, i32 0} ;
diff --git a/llvm/test/CodeGen/Hexagon/hwloop-dbg.ll b/llvm/test/CodeGen/Hexagon/hwloop-dbg.ll
index 11864d1..67e12df 100644
--- a/llvm/test/CodeGen/Hexagon/hwloop-dbg.ll
+++ b/llvm/test/CodeGen/Hexagon/hwloop-dbg.ll
@@ -5,9 +5,9 @@
define void @foo(i32* nocapture %a, i32* nocapture %b) nounwind {
entry:
- tail call void @llvm.dbg.value(metadata !{i32* %a}, i64 0, metadata !13, metadata !{}), !dbg !17
- tail call void @llvm.dbg.value(metadata !{i32* %b}, i64 0, metadata !14, metadata !{}), !dbg !18
- tail call void @llvm.dbg.value(metadata !30, i64 0, metadata !15, metadata !{}), !dbg !19
+ tail call void @llvm.dbg.value(metadata !{i32* %a}, i64 0, metadata !13), !dbg !17
+ tail call void @llvm.dbg.value(metadata !{i32* %b}, i64 0, metadata !14), !dbg !18
+ tail call void @llvm.dbg.value(metadata !30, i64 0, metadata !15), !dbg !19
br label %for.body, !dbg !19
for.body: ; preds = %for.body, %entry
@@ -18,11 +18,11 @@
%i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
%b.addr.01 = phi i32* [ %b, %entry ], [ %incdec.ptr, %for.body ]
%incdec.ptr = getelementptr inbounds i32* %b.addr.01, i32 1, !dbg !21
- tail call void @llvm.dbg.value(metadata !{i32* %incdec.ptr}, i64 0, metadata !14, metadata !{}), !dbg !21
+ tail call void @llvm.dbg.value(metadata !{i32* %incdec.ptr}, i64 0, metadata !14), !dbg !21
%0 = load i32* %b.addr.01, align 4, !dbg !21
store i32 %0, i32* %arrayidx.phi, align 4, !dbg !21
%inc = add nsw i32 %i.02, 1, !dbg !26
- tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !15, metadata !{}), !dbg !26
+ tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !15), !dbg !26
%exitcond = icmp eq i32 %inc, 10, !dbg !19
%arrayidx.inc = getelementptr i32* %arrayidx.phi, i32 1
br i1 %exitcond, label %for.end, label %for.body, !dbg !19
@@ -31,7 +31,7 @@
ret void, !dbg !27
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
diff --git a/llvm/test/CodeGen/Inputs/DbgValueOtherTargets.ll b/llvm/test/CodeGen/Inputs/DbgValueOtherTargets.ll
index 9793767..953e576 100644
--- a/llvm/test/CodeGen/Inputs/DbgValueOtherTargets.ll
+++ b/llvm/test/CodeGen/Inputs/DbgValueOtherTargets.ll
@@ -3,13 +3,13 @@
define i32 @main() nounwind ssp {
entry:
; CHECK: DEBUG_VALUE
- call void @llvm.dbg.value(metadata !6, i64 0, metadata !7, metadata !{}), !dbg !9
+ call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9
ret i32 0, !dbg !10
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!13}
diff --git a/llvm/test/CodeGen/PowerPC/dbg.ll b/llvm/test/CodeGen/PowerPC/dbg.ll
index dd7b8f5..6beea55 100644
--- a/llvm/test/CodeGen/PowerPC/dbg.ll
+++ b/llvm/test/CodeGen/PowerPC/dbg.ll
@@ -6,13 +6,13 @@
define i32 @main(i32 %argc, i8** nocapture %argv) nounwind readnone {
entry:
- tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !15, metadata !{}), !dbg !17
- tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !16, metadata !{}), !dbg !18
+ tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !15), !dbg !17
+ tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !16), !dbg !18
%add = add nsw i32 %argc, 1, !dbg !19
ret i32 %add, !dbg !19
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!22}
diff --git a/llvm/test/CodeGen/PowerPC/pr17168.ll b/llvm/test/CodeGen/PowerPC/pr17168.ll
index ee8f0cd..24bcda0 100644
--- a/llvm/test/CodeGen/PowerPC/pr17168.ll
+++ b/llvm/test/CodeGen/PowerPC/pr17168.ll
@@ -25,7 +25,7 @@
for.end1042: ; preds = %for.cond968.preheader, %for.cond964.preheader, %entry
%0 = phi i32 [ undef, %for.cond964.preheader ], [ undef, %for.cond968.preheader ], [ undef, %entry ]
%1 = load i32* getelementptr inbounds ([3 x i32]* @grid_points, i64 0, i64 0), align 4, !dbg !443, !tbaa !444
- tail call void @llvm.dbg.value(metadata !447, i64 0, metadata !119, metadata !{}), !dbg !448
+ tail call void @llvm.dbg.value(metadata !447, i64 0, metadata !119), !dbg !448
%sub10454270 = add nsw i32 %0, -1, !dbg !448
%cmp10464271 = icmp sgt i32 %sub10454270, 1, !dbg !448
%sub11134263 = add nsw i32 %1, -1, !dbg !450
@@ -46,7 +46,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata) #1
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll b/llvm/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll
index b536ffa..ffc9584 100644
--- a/llvm/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll
+++ b/llvm/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll
@@ -25,7 +25,7 @@
%storemerge = phi double [ -1.000000e+00, %4 ], [ 1.000000e+00, %3 ], [ 1.000000e+00, %3 ] ; <double> [#uses=1]
%v_6 = icmp slt i32 %1, 2 ; <i1> [#uses=1]
%storemerge1 = select i1 %v_6, double 1.000000e+00, double -1.000000e+00 ; <double> [#uses=3]
- call void @llvm.dbg.value(metadata !{double %storemerge}, i64 0, metadata !91, metadata !{}), !dbg !0
+ call void @llvm.dbg.value(metadata !{double %storemerge}, i64 0, metadata !91), !dbg !0
%v_7 = icmp eq i32 %2, 1, !dbg !92 ; <i1> [#uses=1]
%storemerge2 = select i1 %v_7, double 1.000000e+00, double -1.000000e+00 ; <double> [#uses=3]
%v_8 = getelementptr inbounds %0* %0, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
@@ -40,11 +40,11 @@
ret void, !dbg !98
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
declare double @sqrt(double) nounwind readonly
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!5}
!llvm.module.flags = !{!104}
diff --git a/llvm/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll b/llvm/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll
index f079e4e..296f0ca 100644
--- a/llvm/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll
+++ b/llvm/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll
@@ -14,9 +14,9 @@
%2 = alloca i64 ; <i64*> [#uses=1]
%3 = alloca i64 ; <i64*> [#uses=6]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.declare(metadata !{i8** %s1_addr}, metadata !0, metadata !{}), !dbg !7
+ call void @llvm.dbg.declare(metadata !{i8** %s1_addr}, metadata !0), !dbg !7
store i8* %s1, i8** %s1_addr
- call void @llvm.dbg.declare(metadata !{[0 x i8]** %str.0}, metadata !8, metadata !{}), !dbg !7
+ call void @llvm.dbg.declare(metadata !{[0 x i8]** %str.0}, metadata !8), !dbg !7
%4 = call i8* @llvm.stacksave(), !dbg !7 ; <i8*> [#uses=1]
store i8* %4, i8** %saved_stack.1, align 8, !dbg !7
%5 = load i8** %s1_addr, align 8, !dbg !13 ; <i8*> [#uses=1]
@@ -58,7 +58,7 @@
ret i8 %retval12, !dbg !16
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
declare i8* @llvm.stacksave() nounwind
diff --git a/llvm/test/CodeGen/X86/2009-10-16-Scope.ll b/llvm/test/CodeGen/X86/2009-10-16-Scope.ll
index 724db38..a936edc 100644
--- a/llvm/test/CodeGen/X86/2009-10-16-Scope.ll
+++ b/llvm/test/CodeGen/X86/2009-10-16-Scope.ll
@@ -9,7 +9,7 @@
br label %do.body, !dbg !0
do.body: ; preds = %entry
- call void @llvm.dbg.declare(metadata !{i32* %count_}, metadata !4, metadata !{})
+ call void @llvm.dbg.declare(metadata !{i32* %count_}, metadata !4)
%conv = ptrtoint i32* %count_ to i32, !dbg !0 ; <i32> [#uses=1]
%call = call i32 @foo(i32 %conv) ssp, !dbg !0 ; <i32> [#uses=0]
br label %do.end, !dbg !0
@@ -18,7 +18,7 @@
ret void, !dbg !7
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
declare i32 @foo(i32) ssp
diff --git a/llvm/test/CodeGen/X86/2010-01-18-DbgValue.ll b/llvm/test/CodeGen/X86/2010-01-18-DbgValue.ll
index 7d33815..f99e682 100644
--- a/llvm/test/CodeGen/X86/2010-01-18-DbgValue.ll
+++ b/llvm/test/CodeGen/X86/2010-01-18-DbgValue.ll
@@ -12,7 +12,7 @@
%retval = alloca double ; <double*> [#uses=2]
%0 = alloca double ; <double*> [#uses=2]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.declare(metadata !{%struct.Rect* %my_r0}, metadata !0, metadata !{}), !dbg !15
+ call void @llvm.dbg.declare(metadata !{%struct.Rect* %my_r0}, metadata !0), !dbg !15
%1 = getelementptr inbounds %struct.Rect* %my_r0, i32 0, i32 0, !dbg !16 ; <%struct.Pt*> [#uses=1]
%2 = getelementptr inbounds %struct.Pt* %1, i32 0, i32 0, !dbg !16 ; <double*> [#uses=1]
%3 = load double* %2, align 8, !dbg !16 ; <double> [#uses=1]
@@ -26,7 +26,7 @@
ret double %retval1, !dbg !16
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!3}
!llvm.module.flags = !{!21}
diff --git a/llvm/test/CodeGen/X86/2010-02-01-DbgValueCrash.ll b/llvm/test/CodeGen/X86/2010-02-01-DbgValueCrash.ll
index 5980a37..4d4e8c1 100644
--- a/llvm/test/CodeGen/X86/2010-02-01-DbgValueCrash.ll
+++ b/llvm/test/CodeGen/X86/2010-02-01-DbgValueCrash.ll
@@ -8,12 +8,12 @@
define i32 @"main(tart.core.String[])->int32"(i32 %args) {
entry:
- tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8, metadata !{})
+ tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8)
tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2]
ret i32 3
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone
!0 = metadata !{i32 458769, metadata !15, i32 1, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, metadata !"", i32 0, metadata !16, metadata !16, null, null, null, i32 0} ; [ DW_TAG_compile_unit ]
diff --git a/llvm/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll b/llvm/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll
index 7df1286..d9f51759 100644
--- a/llvm/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll
+++ b/llvm/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll
@@ -11,10 +11,10 @@
define hidden %0 @__divsc3(float %a, float %b, float %c, float %d) nounwind readnone {
entry:
- tail call void @llvm.dbg.value(metadata !{float %a}, i64 0, metadata !0, metadata !{})
- tail call void @llvm.dbg.value(metadata !{float %b}, i64 0, metadata !11, metadata !{})
- tail call void @llvm.dbg.value(metadata !{float %c}, i64 0, metadata !12, metadata !{})
- tail call void @llvm.dbg.value(metadata !{float %d}, i64 0, metadata !13, metadata !{})
+ tail call void @llvm.dbg.value(metadata !{float %a}, i64 0, metadata !0)
+ tail call void @llvm.dbg.value(metadata !{float %b}, i64 0, metadata !11)
+ tail call void @llvm.dbg.value(metadata !{float %c}, i64 0, metadata !12)
+ tail call void @llvm.dbg.value(metadata !{float %d}, i64 0, metadata !13)
%0 = tail call float @fabsf(float %c) nounwind readnone, !dbg !19 ; <float> [#uses=1]
%1 = tail call float @fabsf(float %d) nounwind readnone, !dbg !19 ; <float> [#uses=1]
%2 = fcmp olt float %0, %1, !dbg !19 ; <i1> [#uses=1]
@@ -22,34 +22,34 @@
bb: ; preds = %entry
%3 = fdiv float %c, %d, !dbg !20 ; <float> [#uses=3]
- tail call void @llvm.dbg.value(metadata !{float %3}, i64 0, metadata !16, metadata !{}), !dbg !20
+ tail call void @llvm.dbg.value(metadata !{float %3}, i64 0, metadata !16), !dbg !20
%4 = fmul float %3, %c, !dbg !21 ; <float> [#uses=1]
%5 = fadd float %4, %d, !dbg !21 ; <float> [#uses=2]
- tail call void @llvm.dbg.value(metadata !{float %5}, i64 0, metadata !14, metadata !{}), !dbg !21
+ tail call void @llvm.dbg.value(metadata !{float %5}, i64 0, metadata !14), !dbg !21
%6 = fmul float %3, %a, !dbg !22 ; <float> [#uses=1]
%7 = fadd float %6, %b, !dbg !22 ; <float> [#uses=1]
%8 = fdiv float %7, %5, !dbg !22 ; <float> [#uses=1]
- tail call void @llvm.dbg.value(metadata !{float %8}, i64 0, metadata !17, metadata !{}), !dbg !22
+ tail call void @llvm.dbg.value(metadata !{float %8}, i64 0, metadata !17), !dbg !22
%9 = fmul float %3, %b, !dbg !23 ; <float> [#uses=1]
%10 = fsub float %9, %a, !dbg !23 ; <float> [#uses=1]
%11 = fdiv float %10, %5, !dbg !23 ; <float> [#uses=1]
- tail call void @llvm.dbg.value(metadata !{float %11}, i64 0, metadata !18, metadata !{}), !dbg !23
+ tail call void @llvm.dbg.value(metadata !{float %11}, i64 0, metadata !18), !dbg !23
br label %bb2, !dbg !23
bb1: ; preds = %entry
%12 = fdiv float %d, %c, !dbg !24 ; <float> [#uses=3]
- tail call void @llvm.dbg.value(metadata !{float %12}, i64 0, metadata !16, metadata !{}), !dbg !24
+ tail call void @llvm.dbg.value(metadata !{float %12}, i64 0, metadata !16), !dbg !24
%13 = fmul float %12, %d, !dbg !25 ; <float> [#uses=1]
%14 = fadd float %13, %c, !dbg !25 ; <float> [#uses=2]
- tail call void @llvm.dbg.value(metadata !{float %14}, i64 0, metadata !14, metadata !{}), !dbg !25
+ tail call void @llvm.dbg.value(metadata !{float %14}, i64 0, metadata !14), !dbg !25
%15 = fmul float %12, %b, !dbg !26 ; <float> [#uses=1]
%16 = fadd float %15, %a, !dbg !26 ; <float> [#uses=1]
%17 = fdiv float %16, %14, !dbg !26 ; <float> [#uses=1]
- tail call void @llvm.dbg.value(metadata !{float %17}, i64 0, metadata !17, metadata !{}), !dbg !26
+ tail call void @llvm.dbg.value(metadata !{float %17}, i64 0, metadata !17), !dbg !26
%18 = fmul float %12, %a, !dbg !27 ; <float> [#uses=1]
%19 = fsub float %b, %18, !dbg !27 ; <float> [#uses=1]
%20 = fdiv float %19, %14, !dbg !27 ; <float> [#uses=1]
- tail call void @llvm.dbg.value(metadata !{float %20}, i64 0, metadata !18, metadata !{}), !dbg !27
+ tail call void @llvm.dbg.value(metadata !{float %20}, i64 0, metadata !18), !dbg !27
br label %bb2, !dbg !27
bb2: ; preds = %bb1, %bb
@@ -75,9 +75,9 @@
bb8: ; preds = %bb6
%27 = tail call float @copysignf(float 0x7FF0000000000000, float %c) nounwind readnone, !dbg !30 ; <float> [#uses=2]
%28 = fmul float %27, %a, !dbg !30 ; <float> [#uses=1]
- tail call void @llvm.dbg.value(metadata !{float %28}, i64 0, metadata !17, metadata !{}), !dbg !30
+ tail call void @llvm.dbg.value(metadata !{float %28}, i64 0, metadata !17), !dbg !30
%29 = fmul float %27, %b, !dbg !31 ; <float> [#uses=1]
- tail call void @llvm.dbg.value(metadata !{float %29}, i64 0, metadata !18, metadata !{}), !dbg !31
+ tail call void @llvm.dbg.value(metadata !{float %29}, i64 0, metadata !18), !dbg !31
br label %bb46, !dbg !31
bb9: ; preds = %bb6, %bb4
@@ -107,24 +107,24 @@
bb16: ; preds = %bb15
%iftmp.0.0 = select i1 %33, float 1.000000e+00, float 0.000000e+00 ; <float> [#uses=1]
%42 = tail call float @copysignf(float %iftmp.0.0, float %a) nounwind readnone, !dbg !33 ; <float> [#uses=2]
- tail call void @llvm.dbg.value(metadata !{float %42}, i64 0, metadata !0, metadata !{}), !dbg !33
+ tail call void @llvm.dbg.value(metadata !{float %42}, i64 0, metadata !0), !dbg !33
%43 = fcmp ord float %b, 0.000000e+00 ; <i1> [#uses=1]
%44 = fsub float %b, %b, !dbg !34 ; <float> [#uses=1]
%45 = fcmp uno float %44, 0.000000e+00 ; <i1> [#uses=1]
%46 = and i1 %43, %45, !dbg !34 ; <i1> [#uses=1]
%iftmp.1.0 = select i1 %46, float 1.000000e+00, float 0.000000e+00 ; <float> [#uses=1]
%47 = tail call float @copysignf(float %iftmp.1.0, float %b) nounwind readnone, !dbg !34 ; <float> [#uses=2]
- tail call void @llvm.dbg.value(metadata !{float %47}, i64 0, metadata !11, metadata !{}), !dbg !34
+ tail call void @llvm.dbg.value(metadata !{float %47}, i64 0, metadata !11), !dbg !34
%48 = fmul float %42, %c, !dbg !35 ; <float> [#uses=1]
%49 = fmul float %47, %d, !dbg !35 ; <float> [#uses=1]
%50 = fadd float %48, %49, !dbg !35 ; <float> [#uses=1]
%51 = fmul float %50, 0x7FF0000000000000, !dbg !35 ; <float> [#uses=1]
- tail call void @llvm.dbg.value(metadata !{float %51}, i64 0, metadata !17, metadata !{}), !dbg !35
+ tail call void @llvm.dbg.value(metadata !{float %51}, i64 0, metadata !17), !dbg !35
%52 = fmul float %47, %c, !dbg !36 ; <float> [#uses=1]
%53 = fmul float %42, %d, !dbg !36 ; <float> [#uses=1]
%54 = fsub float %52, %53, !dbg !36 ; <float> [#uses=1]
%55 = fmul float %54, 0x7FF0000000000000, !dbg !36 ; <float> [#uses=1]
- tail call void @llvm.dbg.value(metadata !{float %55}, i64 0, metadata !18, metadata !{}), !dbg !36
+ tail call void @llvm.dbg.value(metadata !{float %55}, i64 0, metadata !18), !dbg !36
br label %bb46, !dbg !36
bb27: ; preds = %bb15, %bb14, %bb11
@@ -155,24 +155,24 @@
bb35: ; preds = %bb34
%iftmp.2.0 = select i1 %59, float 1.000000e+00, float 0.000000e+00 ; <float> [#uses=1]
%67 = tail call float @copysignf(float %iftmp.2.0, float %c) nounwind readnone, !dbg !38 ; <float> [#uses=2]
- tail call void @llvm.dbg.value(metadata !{float %67}, i64 0, metadata !12, metadata !{}), !dbg !38
+ tail call void @llvm.dbg.value(metadata !{float %67}, i64 0, metadata !12), !dbg !38
%68 = fcmp ord float %d, 0.000000e+00 ; <i1> [#uses=1]
%69 = fsub float %d, %d, !dbg !39 ; <float> [#uses=1]
%70 = fcmp uno float %69, 0.000000e+00 ; <i1> [#uses=1]
%71 = and i1 %68, %70, !dbg !39 ; <i1> [#uses=1]
%iftmp.3.0 = select i1 %71, float 1.000000e+00, float 0.000000e+00 ; <float> [#uses=1]
%72 = tail call float @copysignf(float %iftmp.3.0, float %d) nounwind readnone, !dbg !39 ; <float> [#uses=2]
- tail call void @llvm.dbg.value(metadata !{float %72}, i64 0, metadata !13, metadata !{}), !dbg !39
+ tail call void @llvm.dbg.value(metadata !{float %72}, i64 0, metadata !13), !dbg !39
%73 = fmul float %67, %a, !dbg !40 ; <float> [#uses=1]
%74 = fmul float %72, %b, !dbg !40 ; <float> [#uses=1]
%75 = fadd float %73, %74, !dbg !40 ; <float> [#uses=1]
%76 = fmul float %75, 0.000000e+00, !dbg !40 ; <float> [#uses=1]
- tail call void @llvm.dbg.value(metadata !{float %76}, i64 0, metadata !17, metadata !{}), !dbg !40
+ tail call void @llvm.dbg.value(metadata !{float %76}, i64 0, metadata !17), !dbg !40
%77 = fmul float %67, %b, !dbg !41 ; <float> [#uses=1]
%78 = fmul float %72, %a, !dbg !41 ; <float> [#uses=1]
%79 = fsub float %77, %78, !dbg !41 ; <float> [#uses=1]
%80 = fmul float %79, 0.000000e+00, !dbg !41 ; <float> [#uses=1]
- tail call void @llvm.dbg.value(metadata !{float %80}, i64 0, metadata !18, metadata !{}), !dbg !41
+ tail call void @llvm.dbg.value(metadata !{float %80}, i64 0, metadata !18), !dbg !41
br label %bb46, !dbg !41
bb46: ; preds = %bb35, %bb34, %bb33, %bb30, %bb16, %bb8, %bb2
@@ -196,7 +196,7 @@
declare float @copysignf(float, float) nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!3}
!llvm.module.flags = !{!48}
diff --git a/llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll b/llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll
index e3b54fb..55ef1c8 100644
--- a/llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll
+++ b/llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll
@@ -9,7 +9,7 @@
define i8* @bar(%struct.a* %myvar) nounwind optsize noinline ssp {
entry:
- tail call void @llvm.dbg.value(metadata !{%struct.a* %myvar}, i64 0, metadata !8, metadata !{})
+ tail call void @llvm.dbg.value(metadata !{%struct.a* %myvar}, i64 0, metadata !8)
%0 = getelementptr inbounds %struct.a* %myvar, i64 0, i32 0, !dbg !28 ; <i32*> [#uses=1]
%1 = load i32* %0, align 8, !dbg !28 ; <i32> [#uses=1]
tail call void @foo(i32 %1) nounwind optsize noinline ssp, !dbg !28
@@ -19,7 +19,7 @@
declare void @foo(i32) nounwind optsize noinline ssp
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!38}
diff --git a/llvm/test/CodeGen/X86/2010-05-28-Crash.ll b/llvm/test/CodeGen/X86/2010-05-28-Crash.ll
index 9031b1f..a50892a 100644
--- a/llvm/test/CodeGen/X86/2010-05-28-Crash.ll
+++ b/llvm/test/CodeGen/X86/2010-05-28-Crash.ll
@@ -4,19 +4,19 @@
define i32 @foo(i32 %y) nounwind optsize ssp {
entry:
- tail call void @llvm.dbg.value(metadata !{i32 %y}, i64 0, metadata !0, metadata !{})
+ tail call void @llvm.dbg.value(metadata !{i32 %y}, i64 0, metadata !0)
%0 = tail call i32 (...)* @zoo(i32 %y) nounwind, !dbg !9 ; <i32> [#uses=1]
ret i32 %0, !dbg !9
}
declare i32 @zoo(...)
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
define i32 @bar(i32 %x) nounwind optsize ssp {
entry:
- tail call void @llvm.dbg.value(metadata !{i32 %x}, i64 0, metadata !7, metadata !{})
- tail call void @llvm.dbg.value(metadata !11, i64 0, metadata !0, metadata !{}) nounwind
+ tail call void @llvm.dbg.value(metadata !{i32 %x}, i64 0, metadata !7)
+ tail call void @llvm.dbg.value(metadata !11, i64 0, metadata !0) nounwind
%0 = tail call i32 (...)* @zoo(i32 1) nounwind, !dbg !12 ; <i32> [#uses=1]
%1 = add nsw i32 %0, %x, !dbg !13 ; <i32> [#uses=1]
ret i32 %1, !dbg !13
diff --git a/llvm/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll b/llvm/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll
index e9e46f3..4181c26 100644
--- a/llvm/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll
+++ b/llvm/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll
@@ -10,14 +10,14 @@
define i32 @_ZN3foo3bazEi(%struct.foo* nocapture %this, i32 %x) nounwind readnone optsize noinline ssp align 2 {
;CHECK: DEBUG_VALUE: baz:this <- RDI{{$}}
entry:
- tail call void @llvm.dbg.value(metadata !{%struct.foo* %this}, i64 0, metadata !15, metadata !{})
- tail call void @llvm.dbg.value(metadata !{i32 %x}, i64 0, metadata !16, metadata !{})
+ tail call void @llvm.dbg.value(metadata !{%struct.foo* %this}, i64 0, metadata !15)
+ tail call void @llvm.dbg.value(metadata !{i32 %x}, i64 0, metadata !16)
%0 = mul nsw i32 %x, 7, !dbg !29 ; <i32> [#uses=1]
%1 = add nsw i32 %0, 1, !dbg !29 ; <i32> [#uses=1]
ret i32 %1, !dbg !29
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!4}
!llvm.module.flags = !{!34}
diff --git a/llvm/test/CodeGen/X86/2010-07-06-DbgCrash.ll b/llvm/test/CodeGen/X86/2010-07-06-DbgCrash.ll
index eae6069..b49aec3 100644
--- a/llvm/test/CodeGen/X86/2010-07-06-DbgCrash.ll
+++ b/llvm/test/CodeGen/X86/2010-07-06-DbgCrash.ll
@@ -23,9 +23,9 @@
define i32 @main() nounwind ssp {
bb.nph:
- tail call void @llvm.dbg.declare(metadata !101, metadata !102, metadata !{}), !dbg !107
+ tail call void @llvm.dbg.declare(metadata !101, metadata !102), !dbg !107
ret i32 0, !dbg !107
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
diff --git a/llvm/test/CodeGen/X86/2010-08-04-StackVariable.ll b/llvm/test/CodeGen/X86/2010-08-04-StackVariable.ll
index 60fdc4e..4a731414 100644
--- a/llvm/test/CodeGen/X86/2010-08-04-StackVariable.ll
+++ b/llvm/test/CodeGen/X86/2010-08-04-StackVariable.ll
@@ -6,8 +6,8 @@
define i32 @_Z3fooi4SVal(i32 %i, %struct.SVal* noalias %location) nounwind ssp {
entry:
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !23, metadata !{}), !dbg !24
- call void @llvm.dbg.value(metadata !{%struct.SVal* %location}, i64 0, metadata !25, metadata !{}), !dbg !24
+ call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !23), !dbg !24
+ call void @llvm.dbg.value(metadata !{%struct.SVal* %location}, i64 0, metadata !25), !dbg !24
%0 = icmp ne i32 %i, 0, !dbg !27 ; <i1> [#uses=1]
br i1 %0, label %bb, label %bb1, !dbg !27
@@ -34,7 +34,7 @@
define linkonce_odr void @_ZN4SValC1Ev(%struct.SVal* %this) nounwind ssp align 2 {
entry:
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.value(metadata !{%struct.SVal* %this}, i64 0, metadata !31, metadata !{}), !dbg !34
+ call void @llvm.dbg.value(metadata !{%struct.SVal* %this}, i64 0, metadata !31), !dbg !34
%0 = getelementptr inbounds %struct.SVal* %this, i32 0, i32 0, !dbg !34 ; <i8**> [#uses=1]
store i8* null, i8** %0, align 8, !dbg !34
%1 = getelementptr inbounds %struct.SVal* %this, i32 0, i32 1, !dbg !34 ; <i32*> [#uses=1]
@@ -45,14 +45,14 @@
ret void, !dbg !35
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define i32 @main() nounwind ssp {
entry:
%0 = alloca %struct.SVal ; <%struct.SVal*> [#uses=3]
%v = alloca %struct.SVal ; <%struct.SVal*> [#uses=4]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.declare(metadata !{%struct.SVal* %v}, metadata !38, metadata !{}), !dbg !41
+ call void @llvm.dbg.declare(metadata !{%struct.SVal* %v}, metadata !38), !dbg !41
call void @_ZN4SValC1Ev(%struct.SVal* %v) nounwind, !dbg !41
%1 = getelementptr inbounds %struct.SVal* %v, i32 0, i32 1, !dbg !42 ; <i32*> [#uses=1]
store i32 1, i32* %1, align 8, !dbg !42
@@ -65,14 +65,14 @@
%7 = load i32* %6, align 8, !dbg !43 ; <i32> [#uses=1]
store i32 %7, i32* %5, align 8, !dbg !43
%8 = call i32 @_Z3fooi4SVal(i32 2, %struct.SVal* noalias %0) nounwind, !dbg !43 ; <i32> [#uses=0]
- call void @llvm.dbg.value(metadata !{i32 %8}, i64 0, metadata !44, metadata !{}), !dbg !43
+ call void @llvm.dbg.value(metadata !{i32 %8}, i64 0, metadata !44), !dbg !43
br label %return, !dbg !45
return: ; preds = %entry
ret i32 0, !dbg !45
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!3}
!llvm.module.flags = !{!49}
diff --git a/llvm/test/CodeGen/X86/2010-11-02-DbgParameter.ll b/llvm/test/CodeGen/X86/2010-11-02-DbgParameter.ll
index b62bfcb..21ac7c9 100644
--- a/llvm/test/CodeGen/X86/2010-11-02-DbgParameter.ll
+++ b/llvm/test/CodeGen/X86/2010-11-02-DbgParameter.ll
@@ -9,11 +9,11 @@
define i32 @foo(%struct.bar* nocapture %i) nounwind readnone optsize noinline ssp {
; CHECK: TAG_formal_parameter
entry:
- tail call void @llvm.dbg.value(metadata !{%struct.bar* %i}, i64 0, metadata !6, metadata !{}), !dbg !12
+ tail call void @llvm.dbg.value(metadata !{%struct.bar* %i}, i64 0, metadata !6), !dbg !12
ret i32 1, !dbg !13
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!19}
diff --git a/llvm/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll b/llvm/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll
index 52c82aa..a4fdee9 100644
--- a/llvm/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll
+++ b/llvm/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll
@@ -22,8 +22,8 @@
define i64 @gcd(i64 %a, i64 %b) nounwind readnone optsize noinline ssp {
entry:
- tail call void @llvm.dbg.value(metadata !{i64 %a}, i64 0, metadata !10, metadata !{}), !dbg !18
- tail call void @llvm.dbg.value(metadata !{i64 %b}, i64 0, metadata !11, metadata !{}), !dbg !19
+ tail call void @llvm.dbg.value(metadata !{i64 %a}, i64 0, metadata !10), !dbg !18
+ tail call void @llvm.dbg.value(metadata !{i64 %b}, i64 0, metadata !11), !dbg !19
br label %while.body, !dbg !20
while.body: ; preds = %while.body, %entry
@@ -34,14 +34,14 @@
br i1 %cmp, label %if.then, label %while.body, !dbg !23
if.then: ; preds = %while.body
- tail call void @llvm.dbg.value(metadata !{i64 %rem}, i64 0, metadata !12, metadata !{}), !dbg !21
+ tail call void @llvm.dbg.value(metadata !{i64 %rem}, i64 0, metadata !12), !dbg !21
ret i64 %b.addr.0, !dbg !23
}
define i32 @main() nounwind optsize ssp {
entry:
%call = tail call i32 @rand() nounwind optsize, !dbg !24
- tail call void @llvm.dbg.value(metadata !{i32 %call}, i64 0, metadata !14, metadata !{}), !dbg !24
+ tail call void @llvm.dbg.value(metadata !{i32 %call}, i64 0, metadata !14), !dbg !24
%cmp = icmp ugt i32 %call, 21, !dbg !25
br i1 %cmp, label %cond.true, label %cond.end, !dbg !25
@@ -51,7 +51,7 @@
cond.end: ; preds = %entry, %cond.true
%cond = phi i32 [ %call1, %cond.true ], [ %call, %entry ], !dbg !25
- tail call void @llvm.dbg.value(metadata !{i32 %cond}, i64 0, metadata !17, metadata !{}), !dbg !25
+ tail call void @llvm.dbg.value(metadata !{i32 %cond}, i64 0, metadata !17), !dbg !25
%conv = sext i32 %cond to i64, !dbg !26
%conv5 = zext i32 %call to i64, !dbg !26
%call6 = tail call i64 @gcd(i64 %conv, i64 %conv5) optsize, !dbg !26
@@ -71,7 +71,7 @@
declare i32 @printf(i8* nocapture, ...) nounwind optsize
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
declare i32 @puts(i8* nocapture) nounwind
diff --git a/llvm/test/CodeGen/X86/2012-11-30-handlemove-dbg.ll b/llvm/test/CodeGen/X86/2012-11-30-handlemove-dbg.ll
index f2f3994..3538b27 100644
--- a/llvm/test/CodeGen/X86/2012-11-30-handlemove-dbg.ll
+++ b/llvm/test/CodeGen/X86/2012-11-30-handlemove-dbg.ll
@@ -12,11 +12,11 @@
%struct.hgstruct.2.29 = type { %struct.bnode.1.28*, [3 x double], double, [3 x double] }
%struct.bnode.1.28 = type { i16, double, [3 x double], i32, i32, [3 x double], [3 x double], [3 x double], double, %struct.bnode.1.28*, %struct.bnode.1.28* }
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define signext i16 @subdivp(%struct.node.0.27* nocapture %p, double %dsq, double %tolsq, %struct.hgstruct.2.29* nocapture byval align 8 %hg) nounwind uwtable readonly ssp {
entry:
- call void @llvm.dbg.declare(metadata !{%struct.hgstruct.2.29* %hg}, metadata !4, metadata !{})
+ call void @llvm.dbg.declare(metadata !{%struct.hgstruct.2.29* %hg}, metadata !4)
%type = getelementptr inbounds %struct.node.0.27* %p, i64 0, i32 0
%0 = load i16* %type, align 2
%cmp = icmp eq i16 %0, 1
@@ -33,7 +33,7 @@
ret i16 %retval.0
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!12}
diff --git a/llvm/test/CodeGen/X86/2012-11-30-misched-dbg.ll b/llvm/test/CodeGen/X86/2012-11-30-misched-dbg.ll
index 4b7979d..80bb98f 100644
--- a/llvm/test/CodeGen/X86/2012-11-30-misched-dbg.ll
+++ b/llvm/test/CodeGen/X86/2012-11-30-misched-dbg.ll
@@ -12,7 +12,7 @@
@.str15 = external hidden unnamed_addr constant [6 x i8], align 1
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define i32 @AttachGalley(%union.rec** nocapture %suspend_pt) nounwind uwtable ssp {
entry:
@@ -43,7 +43,7 @@
br label %if.then4073
if.then4073: ; preds = %if.then3344
- call void @llvm.dbg.declare(metadata !{[20 x i8]* %num14075}, metadata !4, metadata !{})
+ call void @llvm.dbg.declare(metadata !{[20 x i8]* %num14075}, metadata !4)
%arraydecay4078 = getelementptr inbounds [20 x i8]* %num14075, i64 0, i64 0
%0 = load i32* undef, align 4
%add4093 = add nsw i32 %0, 0
@@ -108,7 +108,7 @@
unreachable
cond.end: ; preds = %entry
- call void @llvm.dbg.declare(metadata !{%"class.__gnu_cxx::hash_map"* %X}, metadata !31, metadata !{})
+ call void @llvm.dbg.declare(metadata !{%"class.__gnu_cxx::hash_map"* %X}, metadata !31)
%_M_num_elements.i.i.i.i = getelementptr inbounds %"class.__gnu_cxx::hash_map"* %X, i64 0, i32 0, i32 5
invoke void @_Znwm()
to label %exit.i unwind label %lpad2.i.i.i.i
diff --git a/llvm/test/CodeGen/X86/2012-11-30-regpres-dbg.ll b/llvm/test/CodeGen/X86/2012-11-30-regpres-dbg.ll
index d0ef362..678d399 100644
--- a/llvm/test/CodeGen/X86/2012-11-30-regpres-dbg.ll
+++ b/llvm/test/CodeGen/X86/2012-11-30-regpres-dbg.ll
@@ -9,7 +9,7 @@
%struct.btCompoundLeafCallback = type { i32, i32 }
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define void @test() unnamed_addr uwtable ssp align 2 {
entry:
@@ -20,7 +20,7 @@
unreachable
if.end: ; preds = %entry
- call void @llvm.dbg.declare(metadata !{%struct.btCompoundLeafCallback* %callback}, metadata !3, metadata !{})
+ call void @llvm.dbg.declare(metadata !{%struct.btCompoundLeafCallback* %callback}, metadata !3)
%m = getelementptr inbounds %struct.btCompoundLeafCallback* %callback, i64 0, i32 1
store i32 0, i32* undef, align 8
%cmp12447 = icmp sgt i32 undef, 0
diff --git a/llvm/test/CodeGen/X86/MachineSink-DbgValue.ll b/llvm/test/CodeGen/X86/MachineSink-DbgValue.ll
index b11c048..c03cc36 100644
--- a/llvm/test/CodeGen/X86/MachineSink-DbgValue.ll
+++ b/llvm/test/CodeGen/X86/MachineSink-DbgValue.ll
@@ -4,10 +4,10 @@
target triple = "x86_64-apple-macosx10.7.0"
define i32 @foo(i32 %i, i32* nocapture %c) nounwind uwtable readonly ssp {
- tail call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !6, metadata !{}), !dbg !12
+ tail call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !6), !dbg !12
%ab = load i32* %c, align 1, !dbg !14
- tail call void @llvm.dbg.value(metadata !{i32* %c}, i64 0, metadata !7, metadata !{}), !dbg !13
- tail call void @llvm.dbg.value(metadata !{i32 %ab}, i64 0, metadata !10, metadata !{}), !dbg !14
+ tail call void @llvm.dbg.value(metadata !{i32* %c}, i64 0, metadata !7), !dbg !13
+ tail call void @llvm.dbg.value(metadata !{i32 %ab}, i64 0, metadata !10), !dbg !14
%cd = icmp eq i32 %i, 42, !dbg !15
br i1 %cd, label %bb1, label %bb2, !dbg !15
@@ -23,7 +23,7 @@
ret i32 %.0, !dbg !17
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!22}
diff --git a/llvm/test/CodeGen/X86/StackColoring-dbg.ll b/llvm/test/CodeGen/X86/StackColoring-dbg.ll
index a105d46..51d0d17 100644
--- a/llvm/test/CodeGen/X86/StackColoring-dbg.ll
+++ b/llvm/test/CodeGen/X86/StackColoring-dbg.ll
@@ -5,7 +5,7 @@
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.8.0"
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define void @foo() nounwind uwtable ssp {
entry:
@@ -17,7 +17,7 @@
for.body:
call void @llvm.lifetime.end(i64 -1, i8* %0) nounwind
call void @llvm.lifetime.start(i64 -1, i8* %x.i) nounwind
- call void @llvm.dbg.declare(metadata !{i8* %x.i}, metadata !22, metadata !{}) nounwind
+ call void @llvm.dbg.declare(metadata !{i8* %x.i}, metadata !22) nounwind
br label %for.body
}
diff --git a/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll b/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll
index 9b26883..4912213 100644
--- a/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll
+++ b/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll
@@ -52,48 +52,48 @@
entry:
%var1 = alloca %struct.AAA3, align 1
%var2 = alloca %struct.AAA3, align 1
- tail call void @llvm.dbg.value(metadata !{i32 %param1}, i64 0, metadata !30, metadata !{}), !dbg !47
- tail call void @llvm.dbg.value(metadata !{i32 %param2}, i64 0, metadata !31, metadata !{}), !dbg !47
- tail call void @llvm.dbg.value(metadata !48, i64 0, metadata !32, metadata !{}), !dbg !49
+ tail call void @llvm.dbg.value(metadata !{i32 %param1}, i64 0, metadata !30), !dbg !47
+ tail call void @llvm.dbg.value(metadata !{i32 %param2}, i64 0, metadata !31), !dbg !47
+ tail call void @llvm.dbg.value(metadata !48, i64 0, metadata !32), !dbg !49
%tobool = icmp eq i32 %param2, 0, !dbg !50
br i1 %tobool, label %if.end, label %if.then, !dbg !50
if.then: ; preds = %entry
%call = tail call i8* @_Z5i2stri(i32 %param2), !dbg !52
- tail call void @llvm.dbg.value(metadata !{i8* %call}, i64 0, metadata !32, metadata !{}), !dbg !49
+ tail call void @llvm.dbg.value(metadata !{i8* %call}, i64 0, metadata !32), !dbg !49
br label %if.end, !dbg !54
if.end: ; preds = %entry, %if.then
- tail call void @llvm.dbg.value(metadata !{%struct.AAA3* %var1}, i64 0, metadata !33, metadata !{}), !dbg !55
- tail call void @llvm.dbg.value(metadata !{%struct.AAA3* %var1}, i64 0, metadata !56, metadata !{}), !dbg !57
- tail call void @llvm.dbg.value(metadata !58, i64 0, metadata !59, metadata !{}), !dbg !60
+ tail call void @llvm.dbg.value(metadata !{%struct.AAA3* %var1}, i64 0, metadata !33), !dbg !55
+ tail call void @llvm.dbg.value(metadata !{%struct.AAA3* %var1}, i64 0, metadata !56), !dbg !57
+ tail call void @llvm.dbg.value(metadata !58, i64 0, metadata !59), !dbg !60
%arraydecay.i = getelementptr inbounds %struct.AAA3* %var1, i64 0, i32 0, i64 0, !dbg !61
call void @_Z3fooPcjPKc(i8* %arraydecay.i, i32 4, i8* getelementptr inbounds ([1 x i8]* @.str, i64 0, i64 0)), !dbg !61
- call void @llvm.dbg.value(metadata !{%struct.AAA3* %var2}, i64 0, metadata !34, metadata !{}), !dbg !63
- call void @llvm.dbg.value(metadata !{%struct.AAA3* %var2}, i64 0, metadata !64, metadata !{}), !dbg !65
- call void @llvm.dbg.value(metadata !58, i64 0, metadata !66, metadata !{}), !dbg !67
+ call void @llvm.dbg.value(metadata !{%struct.AAA3* %var2}, i64 0, metadata !34), !dbg !63
+ call void @llvm.dbg.value(metadata !{%struct.AAA3* %var2}, i64 0, metadata !64), !dbg !65
+ call void @llvm.dbg.value(metadata !58, i64 0, metadata !66), !dbg !67
%arraydecay.i5 = getelementptr inbounds %struct.AAA3* %var2, i64 0, i32 0, i64 0, !dbg !68
call void @_Z3fooPcjPKc(i8* %arraydecay.i5, i32 4, i8* getelementptr inbounds ([1 x i8]* @.str, i64 0, i64 0)), !dbg !68
%tobool1 = icmp eq i32 %param1, 0, !dbg !69
- call void @llvm.dbg.value(metadata !{%struct.AAA3* %var2}, i64 0, metadata !34, metadata !{}), !dbg !63
+ call void @llvm.dbg.value(metadata !{%struct.AAA3* %var2}, i64 0, metadata !34), !dbg !63
br i1 %tobool1, label %if.else, label %if.then2, !dbg !69
if.then2: ; preds = %if.end
- call void @llvm.dbg.value(metadata !{%struct.AAA3* %var2}, i64 0, metadata !71, metadata !{}), !dbg !73
- call void @llvm.dbg.value(metadata !74, i64 0, metadata !75, metadata !{}), !dbg !76
+ call void @llvm.dbg.value(metadata !{%struct.AAA3* %var2}, i64 0, metadata !71), !dbg !73
+ call void @llvm.dbg.value(metadata !74, i64 0, metadata !75), !dbg !76
call void @_Z3fooPcjPKc(i8* %arraydecay.i5, i32 4, i8* getelementptr inbounds ([2 x i8]* @.str1, i64 0, i64 0)), !dbg !76
br label %if.end3, !dbg !72
if.else: ; preds = %if.end
- call void @llvm.dbg.value(metadata !{%struct.AAA3* %var2}, i64 0, metadata !77, metadata !{}), !dbg !79
- call void @llvm.dbg.value(metadata !80, i64 0, metadata !81, metadata !{}), !dbg !82
+ call void @llvm.dbg.value(metadata !{%struct.AAA3* %var2}, i64 0, metadata !77), !dbg !79
+ call void @llvm.dbg.value(metadata !80, i64 0, metadata !81), !dbg !82
call void @_Z3fooPcjPKc(i8* %arraydecay.i5, i32 4, i8* getelementptr inbounds ([2 x i8]* @.str2, i64 0, i64 0)), !dbg !82
br label %if.end3
if.end3: ; preds = %if.else, %if.then2
- call void @llvm.dbg.value(metadata !{%struct.AAA3* %var1}, i64 0, metadata !33, metadata !{}), !dbg !55
- call void @llvm.dbg.value(metadata !{%struct.AAA3* %var1}, i64 0, metadata !83, metadata !{}), !dbg !85
- call void @llvm.dbg.value(metadata !58, i64 0, metadata !86, metadata !{}), !dbg !87
+ call void @llvm.dbg.value(metadata !{%struct.AAA3* %var1}, i64 0, metadata !33), !dbg !55
+ call void @llvm.dbg.value(metadata !{%struct.AAA3* %var1}, i64 0, metadata !83), !dbg !85
+ call void @llvm.dbg.value(metadata !58, i64 0, metadata !86), !dbg !87
call void @_Z3fooPcjPKc(i8* %arraydecay.i, i32 4, i8* getelementptr inbounds ([1 x i8]* @.str, i64 0, i64 0)), !dbg !87
ret void, !dbg !88
}
@@ -103,7 +103,7 @@
declare void @_Z3fooPcjPKc(i8*, i32, i8*) #1
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
+declare void @llvm.dbg.value(metadata, i64, metadata) #2
attributes #0 = { uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
diff --git a/llvm/test/CodeGen/X86/dbg-changes-codegen.ll b/llvm/test/CodeGen/X86/dbg-changes-codegen.ll
index 1a2b490..0b17c45 100644
--- a/llvm/test/CodeGen/X86/dbg-changes-codegen.ll
+++ b/llvm/test/CodeGen/X86/dbg-changes-codegen.ll
@@ -44,7 +44,7 @@
define zeroext i1 @_ZN3Foo3batEv(%struct.Foo* %this) #0 align 2 {
entry:
%0 = load %struct.Foo** @pfoo, align 8
- tail call void @llvm.dbg.value(metadata !{%struct.Foo* %0}, i64 0, metadata !62, metadata !{})
+ tail call void @llvm.dbg.value(metadata !{%struct.Foo* %0}, i64 0, metadata !62)
%cmp.i = icmp eq %struct.Foo* %0, %this
ret i1 %cmp.i
}
@@ -53,7 +53,7 @@
define void @_Z3bazv() #1 {
entry:
%0 = load %struct.Wibble** @wibble1, align 8
- tail call void @llvm.dbg.value(metadata !64, i64 0, metadata !65, metadata !{})
+ tail call void @llvm.dbg.value(metadata !64, i64 0, metadata !65)
%1 = load %struct.Wibble** @wibble2, align 8
%cmp.i = icmp ugt %struct.Wibble* %1, %0
br i1 %cmp.i, label %if.then.i, label %_ZN7Flibble3barEP6Wibble.exit
@@ -69,7 +69,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
+declare void @llvm.dbg.value(metadata, i64, metadata) #2
attributes #0 = { nounwind readonly uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
diff --git a/llvm/test/CodeGen/X86/fpstack-debuginstr-kill.ll b/llvm/test/CodeGen/X86/fpstack-debuginstr-kill.ll
index a22751f..1c8c66a 100644
--- a/llvm/test/CodeGen/X86/fpstack-debuginstr-kill.ll
+++ b/llvm/test/CodeGen/X86/fpstack-debuginstr-kill.ll
@@ -32,14 +32,14 @@
unreachable
if.end41.i2210: ; preds = %if.end511
- call void @llvm.dbg.value(metadata !{x86_fp80 %src.sroa.0.0.src.sroa.0.0.2280}, i64 0, metadata !20, metadata !{})
+ call void @llvm.dbg.value(metadata !{x86_fp80 %src.sroa.0.0.src.sroa.0.0.2280}, i64 0, metadata !20)
unreachable
sw.bb992: ; preds = %if.end511
ret void
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata)
+declare void @llvm.dbg.value(metadata, i64, metadata)
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!24, !25}
diff --git a/llvm/test/CodeGen/X86/stack-protector-dbginfo.ll b/llvm/test/CodeGen/X86/stack-protector-dbginfo.ll
index 4ec3de1..8cd4454 100644
--- a/llvm/test/CodeGen/X86/stack-protector-dbginfo.ll
+++ b/llvm/test/CodeGen/X86/stack-protector-dbginfo.ll
@@ -10,15 +10,15 @@
; Function Attrs: nounwind sspreq
define i32 @_Z18read_response_sizev() #0 {
entry:
- tail call void @llvm.dbg.value(metadata !22, i64 0, metadata !23, metadata !{}), !dbg !39
+ tail call void @llvm.dbg.value(metadata !22, i64 0, metadata !23), !dbg !39
%0 = load i64* getelementptr inbounds ({ i64, [56 x i8] }* @a, i32 0, i32 0), align 8, !dbg !40
- tail call void @llvm.dbg.value(metadata !63, i64 0, metadata !64, metadata !{}), !dbg !71
+ tail call void @llvm.dbg.value(metadata !63, i64 0, metadata !64), !dbg !71
%1 = trunc i64 %0 to i32
ret i32 %1
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata)
+declare void @llvm.dbg.value(metadata, i64, metadata)
attributes #0 = { sspreq }
diff --git a/llvm/test/CodeGen/XCore/dwarf_debug.ll b/llvm/test/CodeGen/XCore/dwarf_debug.ll
index ffa0ccf..2f4b231 100644
--- a/llvm/test/CodeGen/XCore/dwarf_debug.ll
+++ b/llvm/test/CodeGen/XCore/dwarf_debug.ll
@@ -13,13 +13,13 @@
entry:
%a.addr = alloca i32, align 4
store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !11, metadata !{}), !dbg !12
+ call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !11), !dbg !12
%0 = load i32* %a.addr, align 4, !dbg !12
%add = add nsw i32 %0, 1, !dbg !12
ret i32 %add, !dbg !12
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata)
+declare void @llvm.dbg.declare(metadata, metadata)
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!9, !10}
diff --git a/llvm/test/DebugInfo/2009-11-10-CurrentFn.ll b/llvm/test/DebugInfo/2009-11-10-CurrentFn.ll
index 6b2b06c..151d631 100644
--- a/llvm/test/DebugInfo/2009-11-10-CurrentFn.ll
+++ b/llvm/test/DebugInfo/2009-11-10-CurrentFn.ll
@@ -8,7 +8,7 @@
declare void @foo(...)
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!18}
diff --git a/llvm/test/DebugInfo/2010-03-12-llc-crash.ll b/llvm/test/DebugInfo/2010-03-12-llc-crash.ll
index 9425392..241bb37 100644
--- a/llvm/test/DebugInfo/2010-03-12-llc-crash.ll
+++ b/llvm/test/DebugInfo/2010-03-12-llc-crash.ll
@@ -1,11 +1,11 @@
; RUN: llc -O0 < %s -o /dev/null
; llc should not crash on this invalid input.
; PR6588
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define void @foo() {
entry:
- call void @llvm.dbg.declare(metadata !{i32* undef}, metadata !0, metadata !{})
+ call void @llvm.dbg.declare(metadata !{i32* undef}, metadata !0)
ret void
}
diff --git a/llvm/test/DebugInfo/2010-03-19-DbgDeclare.ll b/llvm/test/DebugInfo/2010-03-19-DbgDeclare.ll
index 85ee7b9..941fdec 100644
--- a/llvm/test/DebugInfo/2010-03-19-DbgDeclare.ll
+++ b/llvm/test/DebugInfo/2010-03-19-DbgDeclare.ll
@@ -4,7 +4,7 @@
define void @Foo(i32 %a, i32 %b) {
entry:
- call void @llvm.dbg.declare(metadata !{i32* null}, metadata !1, metadata !{})
+ call void @llvm.dbg.declare(metadata !{i32* null}, metadata !1)
ret void
}
!llvm.dbg.cu = !{!2}
@@ -15,5 +15,5 @@
!1 = metadata !{i32 4, metadata !"foo"}
!4 = metadata !{metadata !"scratch.cpp", metadata !"/usr/local/google/home/blaikie/dev/scratch"}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!5 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
diff --git a/llvm/test/DebugInfo/2010-03-24-MemberFn.ll b/llvm/test/DebugInfo/2010-03-24-MemberFn.ll
index d4c25b6..4ea9d2c 100644
--- a/llvm/test/DebugInfo/2010-03-24-MemberFn.ll
+++ b/llvm/test/DebugInfo/2010-03-24-MemberFn.ll
@@ -8,7 +8,7 @@
%0 = alloca i32 ; <i32*> [#uses=2]
%s1 = alloca %struct.S ; <%struct.S*> [#uses=1]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.declare(metadata !{%struct.S* %s1}, metadata !0, metadata !{}), !dbg !16
+ call void @llvm.dbg.declare(metadata !{%struct.S* %s1}, metadata !0), !dbg !16
%1 = call i32 @_ZN1S3fooEv(%struct.S* %s1) nounwind, !dbg !17 ; <i32> [#uses=1]
store i32 %1, i32* %0, align 4, !dbg !17
%2 = load i32* %0, align 4, !dbg !17 ; <i32> [#uses=1]
@@ -25,7 +25,7 @@
%this_addr = alloca %struct.S* ; <%struct.S**> [#uses=1]
%retval = alloca i32 ; <i32*> [#uses=1]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.declare(metadata !{%struct.S** %this_addr}, metadata !18, metadata !{}), !dbg !21
+ call void @llvm.dbg.declare(metadata !{%struct.S** %this_addr}, metadata !18), !dbg !21
store %struct.S* %this, %struct.S** %this_addr
br label %return, !dbg !21
@@ -34,7 +34,7 @@
ret i32 %retval1, !dbg !22
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!5}
!llvm.module.flags = !{!28}
diff --git a/llvm/test/DebugInfo/2010-03-30-InvalidDbgInfoCrash.ll b/llvm/test/DebugInfo/2010-03-30-InvalidDbgInfoCrash.ll
index d62045b..81285a9 100644
--- a/llvm/test/DebugInfo/2010-03-30-InvalidDbgInfoCrash.ll
+++ b/llvm/test/DebugInfo/2010-03-30-InvalidDbgInfoCrash.ll
@@ -2,11 +2,11 @@
define void @baz(i32 %i) nounwind ssp {
entry:
- call void @llvm.dbg.declare(metadata !0, metadata !1, metadata !{}), !dbg !0
+ call void @llvm.dbg.declare(metadata !0, metadata !1), !dbg !0
ret void, !dbg !0
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!5}
!llvm.module.flags = !{!22}
diff --git a/llvm/test/DebugInfo/2010-04-06-NestedFnDbgInfo.ll b/llvm/test/DebugInfo/2010-04-06-NestedFnDbgInfo.ll
index 7287875..5f7cb69 100644
--- a/llvm/test/DebugInfo/2010-04-06-NestedFnDbgInfo.ll
+++ b/llvm/test/DebugInfo/2010-04-06-NestedFnDbgInfo.ll
@@ -26,14 +26,14 @@
%retval = alloca i32, align 4 ; <i32*> [#uses=3]
%b = alloca %class.A, align 1 ; <%class.A*> [#uses=1]
store i32 0, i32* %retval
- call void @llvm.dbg.declare(metadata !{%class.A* %b}, metadata !0, metadata !{}), !dbg !14
+ call void @llvm.dbg.declare(metadata !{%class.A* %b}, metadata !0), !dbg !14
%call = call i32 @_ZN1B2fnEv(%class.A* %b), !dbg !15 ; <i32> [#uses=1]
store i32 %call, i32* %retval, !dbg !15
%0 = load i32* %retval, !dbg !16 ; <i32> [#uses=1]
ret i32 %0, !dbg !16
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define linkonce_odr i32 @_ZN1B2fnEv(%class.A* %this) ssp align 2 {
entry:
@@ -42,10 +42,10 @@
%a = alloca %class.A, align 1 ; <%class.A*> [#uses=1]
%i = alloca i32, align 4 ; <i32*> [#uses=2]
store %class.A* %this, %class.A** %this.addr
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !17, metadata !{}), !dbg !18
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !17), !dbg !18
%this1 = load %class.A** %this.addr ; <%class.A*> [#uses=0]
- call void @llvm.dbg.declare(metadata !{%class.A* %a}, metadata !19, metadata !{}), !dbg !27
- call void @llvm.dbg.declare(metadata !{i32* %i}, metadata !28, metadata !{}), !dbg !29
+ call void @llvm.dbg.declare(metadata !{%class.A* %a}, metadata !19), !dbg !27
+ call void @llvm.dbg.declare(metadata !{i32* %i}, metadata !28), !dbg !29
%call = call i32 @_ZZN1B2fnEvEN1A3fooEv(%class.A* %a), !dbg !30 ; <i32> [#uses=1]
store i32 %call, i32* %i, !dbg !30
%tmp = load i32* %i, !dbg !31 ; <i32> [#uses=1]
@@ -59,7 +59,7 @@
%retval = alloca i32, align 4 ; <i32*> [#uses=2]
%this.addr = alloca %class.A*, align 8 ; <%class.A**> [#uses=2]
store %class.A* %this, %class.A** %this.addr
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !33, metadata !{}), !dbg !34
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !33), !dbg !34
%this1 = load %class.A** %this.addr ; <%class.A*> [#uses=0]
store i32 42, i32* %retval, !dbg !35
%0 = load i32* %retval, !dbg !35 ; <i32> [#uses=1]
diff --git a/llvm/test/DebugInfo/2010-05-03-DisableFramePtr.ll b/llvm/test/DebugInfo/2010-05-03-DisableFramePtr.ll
index fc895a7..ba8d0e5 100644
--- a/llvm/test/DebugInfo/2010-05-03-DisableFramePtr.ll
+++ b/llvm/test/DebugInfo/2010-05-03-DisableFramePtr.ll
@@ -6,7 +6,7 @@
entry:
%userUPP_addr = alloca void (%struct.AppleEvent*)* ; <void (%struct.AppleEvent*)**> [#uses=1]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.declare(metadata !{void (%struct.AppleEvent*)** %userUPP_addr}, metadata !0, metadata !{}), !dbg !13
+ call void @llvm.dbg.declare(metadata !{void (%struct.AppleEvent*)** %userUPP_addr}, metadata !0), !dbg !13
store void (%struct.AppleEvent*)* %userUPP, void (%struct.AppleEvent*)** %userUPP_addr
br label %return, !dbg !14
@@ -14,7 +14,7 @@
ret void, !dbg !14
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!3}
!llvm.module.flags = !{!19}
diff --git a/llvm/test/DebugInfo/2010-05-03-OriginDIE.ll b/llvm/test/DebugInfo/2010-05-03-OriginDIE.ll
index 49a4781..0c5d876 100644
--- a/llvm/test/DebugInfo/2010-05-03-OriginDIE.ll
+++ b/llvm/test/DebugInfo/2010-05-03-OriginDIE.ll
@@ -23,12 +23,12 @@
%a10 = call i64 @llvm.bswap.i64(i64 %a9) nounwind ; <i64> [#uses=1]
%a11 = getelementptr inbounds %struct.gpt_t* %gpt, i32 0, i32 8, !dbg !7 ; <i64*> [#uses=1]
%a12 = load i64* %a11, align 4, !dbg !7 ; <i64> [#uses=1]
- call void @llvm.dbg.declare(metadata !{i64* %data_addr.i17}, metadata !8, metadata !{}) nounwind, !dbg !14
+ call void @llvm.dbg.declare(metadata !{i64* %data_addr.i17}, metadata !8) nounwind, !dbg !14
store i64 %a12, i64* %data_addr.i17, align 8
- call void @llvm.dbg.value(metadata !6, i64 0, metadata !15, metadata !{}) nounwind
- call void @llvm.dbg.value(metadata !18, i64 0, metadata !19, metadata !{}) nounwind
- call void @llvm.dbg.declare(metadata !6, metadata !23, metadata !{}) nounwind
- call void @llvm.dbg.value(metadata !{i64* %data_addr.i17}, i64 0, metadata !34, metadata !{}) nounwind
+ call void @llvm.dbg.value(metadata !6, i64 0, metadata !15) nounwind
+ call void @llvm.dbg.value(metadata !18, i64 0, metadata !19) nounwind
+ call void @llvm.dbg.declare(metadata !6, metadata !23) nounwind
+ call void @llvm.dbg.value(metadata !{i64* %data_addr.i17}, i64 0, metadata !34) nounwind
%a13 = load volatile i64* %data_addr.i17, align 8 ; <i64> [#uses=1]
%a14 = call i64 @llvm.bswap.i64(i64 %a13) nounwind ; <i64> [#uses=2]
%a15 = add i64 %a10, %a14, !dbg !7 ; <i64> [#uses=1]
@@ -38,9 +38,9 @@
ret void, !dbg !7
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
declare i32 @llvm.bswap.i32(i32) nounwind readnone
@@ -69,7 +69,7 @@
!16 = metadata !{i32 524334, metadata !38, null, metadata !"OSReadSwapInt64", metadata !"OSReadSwapInt64", metadata !"OSReadSwapInt64", i32 95, metadata !5, i1 true, i1 true, i32 0, i32 0, null, i1 false, i32 0, null, null, null, null, i32 0} ; [ DW_TAG_subprogram ]
!17 = metadata !{i32 524303, metadata !39, metadata !3, metadata !"", i32 0, i64 32, i64 32, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ]
!18 = metadata !{i32 0}
-!19 = metadata !{i32 524545, metadata !16, metadata !"byteOffset", metadata !10, i32 94, metadata !20, i32 0} ; [ DW_TAG_arg_variable ]
+!19 = metadata !{i32 524545, metadata !16, metadata !"byteOffset", metadata !10, i32 94, metadata !20} ; [ DW_TAG_arg_variable ]
!20 = metadata !{i32 524310, metadata !37, metadata !3, metadata !"uintptr_t", i32 114, i64 0, i64 0, i64 0, i32 0, metadata !22} ; [ DW_TAG_typedef ]
!21 = metadata !{i32 524329, metadata !"types.h", metadata !"/usr/include/ppc", metadata !4} ; [ DW_TAG_file_type ]
!22 = metadata !{i32 524324, metadata !39, metadata !3, metadata !"long unsigned int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ]
diff --git a/llvm/test/DebugInfo/2010-06-29-InlinedFnLocalVar.ll b/llvm/test/DebugInfo/2010-06-29-InlinedFnLocalVar.ll
index 7390537..a461abd 100644
--- a/llvm/test/DebugInfo/2010-06-29-InlinedFnLocalVar.ll
+++ b/llvm/test/DebugInfo/2010-06-29-InlinedFnLocalVar.ll
@@ -7,15 +7,15 @@
@i = common global i32 0 ; <i32*> [#uses=2]
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
define i32 @bar() nounwind ssp {
entry:
%0 = load i32* @i, align 4, !dbg !17 ; <i32> [#uses=2]
- tail call void @llvm.dbg.value(metadata !{i32 %0}, i64 0, metadata !9, metadata !{}), !dbg !19
- tail call void @llvm.dbg.declare(metadata !29, metadata !10, metadata !{}), !dbg !21
+ tail call void @llvm.dbg.value(metadata !{i32 %0}, i64 0, metadata !9), !dbg !19
+ tail call void @llvm.dbg.declare(metadata !29, metadata !10), !dbg !21
%1 = mul nsw i32 %0, %0, !dbg !22 ; <i32> [#uses=2]
store i32 %1, i32* @i, align 4, !dbg !17
ret i32 %1, !dbg !23
diff --git a/llvm/test/DebugInfo/2010-10-01-crash.ll b/llvm/test/DebugInfo/2010-10-01-crash.ll
index 160ea7f..f8dbb6e 100644
--- a/llvm/test/DebugInfo/2010-10-01-crash.ll
+++ b/llvm/test/DebugInfo/2010-10-01-crash.ll
@@ -4,11 +4,11 @@
define void @CGRectStandardize(i32* sret %agg.result, i32* byval %rect) nounwind ssp {
entry:
- call void @llvm.dbg.declare(metadata !{i32* %rect}, metadata !23, metadata !{}), !dbg !24
+ call void @llvm.dbg.declare(metadata !{i32* %rect}, metadata !23), !dbg !24
ret void
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
diff --git a/llvm/test/DebugInfo/AArch64/struct_by_value.ll b/llvm/test/DebugInfo/AArch64/struct_by_value.ll
index 6a4e3bc..0e336f7 100644
--- a/llvm/test/DebugInfo/AArch64/struct_by_value.ll
+++ b/llvm/test/DebugInfo/AArch64/struct_by_value.ll
@@ -32,14 +32,14 @@
; Function Attrs: nounwind ssp
define i32 @return_five_int(%struct.five* %f) #0 {
entry:
- call void @llvm.dbg.declare(metadata !{%struct.five* %f}, metadata !17, metadata !{}), !dbg !18
+ call void @llvm.dbg.declare(metadata !{%struct.five* %f}, metadata !17), !dbg !18
%a = getelementptr inbounds %struct.five* %f, i32 0, i32 0, !dbg !19
%0 = load i32* %a, align 4, !dbg !19
ret i32 %0, !dbg !19
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
attributes #0 = { nounwind ssp }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/ARM/PR16736.ll b/llvm/test/DebugInfo/ARM/PR16736.ll
index a78488b..c26f0ca 100644
--- a/llvm/test/DebugInfo/ARM/PR16736.ll
+++ b/llvm/test/DebugInfo/ARM/PR16736.ll
@@ -15,14 +15,14 @@
; Function Attrs: nounwind
define arm_aapcscc void @_Z1hiiiif(i32, i32, i32, i32, float %x) #0 {
entry:
- tail call void @llvm.dbg.value(metadata !{i32 %0}, i64 0, metadata !12, metadata !{}), !dbg !18
- tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !13, metadata !{}), !dbg !18
- tail call void @llvm.dbg.value(metadata !{i32 %2}, i64 0, metadata !14, metadata !{}), !dbg !18
- tail call void @llvm.dbg.value(metadata !{i32 %3}, i64 0, metadata !15, metadata !{}), !dbg !18
- tail call void @llvm.dbg.value(metadata !{float %x}, i64 0, metadata !16, metadata !{}), !dbg !18
+ tail call void @llvm.dbg.value(metadata !{i32 %0}, i64 0, metadata !12), !dbg !18
+ tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !13), !dbg !18
+ tail call void @llvm.dbg.value(metadata !{i32 %2}, i64 0, metadata !14), !dbg !18
+ tail call void @llvm.dbg.value(metadata !{i32 %3}, i64 0, metadata !15), !dbg !18
+ tail call void @llvm.dbg.value(metadata !{float %x}, i64 0, metadata !16), !dbg !18
%call = tail call arm_aapcscc i32 @_Z1fv() #3, !dbg !19
%conv = sitofp i32 %call to float, !dbg !19
- tail call void @llvm.dbg.value(metadata !{float %conv}, i64 0, metadata !16, metadata !{}), !dbg !19
+ tail call void @llvm.dbg.value(metadata !{float %conv}, i64 0, metadata !16), !dbg !19
tail call arm_aapcscc void @_Z1gf(float %conv) #3, !dbg !19
ret void, !dbg !20
}
@@ -32,7 +32,7 @@
declare arm_aapcscc i32 @_Z1fv()
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
+declare void @llvm.dbg.value(metadata, i64, metadata) #2
attributes #0 = { nounwind }
attributes #2 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/ARM/lowerbdgdeclare_vla.ll b/llvm/test/DebugInfo/ARM/lowerbdgdeclare_vla.ll
index c8b1bc1..0378c75 100644
--- a/llvm/test/DebugInfo/ARM/lowerbdgdeclare_vla.ll
+++ b/llvm/test/DebugInfo/ARM/lowerbdgdeclare_vla.ll
@@ -19,18 +19,18 @@
; Function Attrs: nounwind optsize readnone
define void @run(float %r) #0 {
entry:
- tail call void @llvm.dbg.declare(metadata !{float %r}, metadata !11, metadata !{}), !dbg !22
+ tail call void @llvm.dbg.declare(metadata !{float %r}, metadata !11), !dbg !22
%conv = fptosi float %r to i32, !dbg !23
- tail call void @llvm.dbg.declare(metadata !{i32 %conv}, metadata !12, metadata !{}), !dbg !23
+ tail call void @llvm.dbg.declare(metadata !{i32 %conv}, metadata !12), !dbg !23
%vla = alloca float, i32 %conv, align 4, !dbg !24
- tail call void @llvm.dbg.declare(metadata !{float* %vla}, metadata !14, metadata !{}), !dbg !24
+ tail call void @llvm.dbg.declare(metadata !{float* %vla}, metadata !14), !dbg !24
; The VLA alloca should be described by a dbg.declare:
-; CHECK: call void @llvm.dbg.declare(metadata !{float* %vla}, metadata ![[VLA:.*]], metadata {{.*}})
+; CHECK: call void @llvm.dbg.declare(metadata !{float* %vla}, metadata ![[VLA:.*]])
; The VLA alloca and following store into the array should not be lowered to like this:
; CHECK-NOT: call void @llvm.dbg.value(metadata !{float %r}, i64 0, metadata ![[VLA]])
; the backend interprets this as "vla has the location of %r".
store float %r, float* %vla, align 4, !dbg !25, !tbaa !26
- tail call void @llvm.dbg.value(metadata !2, i64 0, metadata !18, metadata !{}), !dbg !30
+ tail call void @llvm.dbg.value(metadata !2, i64 0, metadata !18), !dbg !30
%cmp8 = icmp sgt i32 %conv, 0, !dbg !30
br i1 %cmp8, label %for.body, label %for.end, !dbg !30
@@ -41,7 +41,7 @@
%div = fdiv float %0, %r, !dbg !31
store float %div, float* %arrayidx2, align 4, !dbg !31, !tbaa !26
%inc = add nsw i32 %i.09, 1, !dbg !30
- tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !18, metadata !{}), !dbg !30
+ tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !18), !dbg !30
%exitcond = icmp eq i32 %inc, %conv, !dbg !30
br i1 %exitcond, label %for.end, label %for.body.for.body_crit_edge, !dbg !30
@@ -55,10 +55,10 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata) #1
attributes #0 = { nounwind optsize readnone "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/ARM/s-super-register.ll b/llvm/test/DebugInfo/ARM/s-super-register.ll
index 2344880..36205df 100644
--- a/llvm/test/DebugInfo/ARM/s-super-register.ll
+++ b/llvm/test/DebugInfo/ARM/s-super-register.ll
@@ -12,7 +12,7 @@
define void @_Z3foov() optsize ssp {
entry:
%call = tail call float @_Z3barv() optsize, !dbg !11
- tail call void @llvm.dbg.value(metadata !{float %call}, i64 0, metadata !5, metadata !{}), !dbg !11
+ tail call void @llvm.dbg.value(metadata !{float %call}, i64 0, metadata !5), !dbg !11
%call16 = tail call float @_Z2f2v() optsize, !dbg !12
%cmp7 = fcmp olt float %call, %call16, !dbg !12
br i1 %cmp7, label %for.body, label %for.end, !dbg !12
@@ -35,7 +35,7 @@
declare float @_Z2f3f(float) optsize
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!20}
diff --git a/llvm/test/DebugInfo/ARM/selectiondag-deadcode.ll b/llvm/test/DebugInfo/ARM/selectiondag-deadcode.ll
index 9351263..cc151e0 100644
--- a/llvm/test/DebugInfo/ARM/selectiondag-deadcode.ll
+++ b/llvm/test/DebugInfo/ARM/selectiondag-deadcode.ll
@@ -13,11 +13,11 @@
; and SelectionDAGISel crashes. It should definitely not
; crash. Drop the dbg_value instead.
; CHECK-NOT: "matrix"
- tail call void @llvm.dbg.declare(metadata !{%class.Matrix3.0.6.10* %agg.result}, metadata !45, metadata !{})
+ tail call void @llvm.dbg.declare(metadata !{%class.Matrix3.0.6.10* %agg.result}, metadata !45)
%2 = getelementptr inbounds %class.Matrix3.0.6.10* %agg.result, i32 0, i32 0, i32 8
ret void
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
declare arm_aapcscc void @_ZL4Sqrtd() #2
!4 = metadata !{i32 786434, metadata !5, null, metadata !"Matrix3", i32 20, i64 288, i64 32, i32 0, i32 0, null, null, i32 0, null, null, metadata !"_ZTS7Matrix3"} ; [ DW_TAG_class_type ] [Matrix3] [line 20, size 288, align 32, offset 0] [def] [from ]
!5 = metadata !{metadata !"test.ii", metadata !"/Volumes/Data/radar/15094721"}
diff --git a/llvm/test/DebugInfo/Mips/delay-slot.ll b/llvm/test/DebugInfo/Mips/delay-slot.ll
index 5075fcf..9bce4ba 100644
--- a/llvm/test/DebugInfo/Mips/delay-slot.ll
+++ b/llvm/test/DebugInfo/Mips/delay-slot.ll
@@ -26,7 +26,7 @@
; Function Attrs: nounwind
define i32 @foo(i32 %x) #0 {
entry:
- call void @llvm.dbg.value(metadata !{i32 %x}, i64 0, metadata !12, metadata !{}), !dbg !13
+ call void @llvm.dbg.value(metadata !{i32 %x}, i64 0, metadata !12), !dbg !13
%tobool = icmp ne i32 %x, 0, !dbg !14
br i1 %tobool, label %if.then, label %if.end, !dbg !14
@@ -42,10 +42,10 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata) #1
attributes #0 = { nounwind }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/PR20038.ll b/llvm/test/DebugInfo/PR20038.ll
index 8ce9cc6..b8a8052 100644
--- a/llvm/test/DebugInfo/PR20038.ll
+++ b/llvm/test/DebugInfo/PR20038.ll
@@ -74,10 +74,10 @@
cleanup.action: ; preds = %land.end
store %struct.C* %agg.tmp.ensured, %struct.C** %this.addr.i, align 8, !dbg !22
- call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr.i}, metadata !29, metadata !{}), !dbg !31
+ call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr.i}, metadata !29), !dbg !31
%this1.i = load %struct.C** %this.addr.i, !dbg !22
store %struct.C* %this1.i, %struct.C** %this.addr.i.i, align 8, !dbg !21
- call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr.i.i}, metadata !32, metadata !{}), !dbg !33
+ call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr.i.i}, metadata !32), !dbg !33
%this1.i.i = load %struct.C** %this.addr.i.i, !dbg !21
br label %cleanup.done, !dbg !22
@@ -91,10 +91,10 @@
%this.addr.i = alloca %struct.C*, align 8, !dbg !37
%this.addr = alloca %struct.C*, align 8
store %struct.C* %this, %struct.C** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr}, metadata !29, metadata !{}), !dbg !38
+ call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr}, metadata !29), !dbg !38
%this1 = load %struct.C** %this.addr
store %struct.C* %this1, %struct.C** %this.addr.i, align 8, !dbg !37
- call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr.i}, metadata !32, metadata !{}), !dbg !39
+ call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr.i}, metadata !32), !dbg !39
%this1.i = load %struct.C** %this.addr.i, !dbg !37
ret void, !dbg !37
}
@@ -104,13 +104,13 @@
entry:
%this.addr = alloca %struct.C*, align 8
store %struct.C* %this, %struct.C** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr}, metadata !32, metadata !{}), !dbg !40
+ call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr}, metadata !32), !dbg !40
%this1 = load %struct.C** %this.addr
ret void, !dbg !41
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #2
+declare void @llvm.dbg.declare(metadata, metadata) #2
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { alwaysinline nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
diff --git a/llvm/test/DebugInfo/SystemZ/variable-loc.ll b/llvm/test/DebugInfo/SystemZ/variable-loc.ll
index ecb388c..23df1cb 100644
--- a/llvm/test/DebugInfo/SystemZ/variable-loc.ll
+++ b/llvm/test/DebugInfo/SystemZ/variable-loc.ll
@@ -25,7 +25,7 @@
declare void @populate_array(i32*, i32) nounwind
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
declare i32 @sum_array(i32*, i32) nounwind
@@ -35,8 +35,8 @@
%main_arr = alloca [100 x i32], align 4
%val = alloca i32, align 4
store volatile i32 0, i32* %retval
- call void @llvm.dbg.declare(metadata !{[100 x i32]* %main_arr}, metadata !17, metadata !{}), !dbg !22
- call void @llvm.dbg.declare(metadata !{i32* %val}, metadata !23, metadata !{}), !dbg !24
+ call void @llvm.dbg.declare(metadata !{[100 x i32]* %main_arr}, metadata !17), !dbg !22
+ call void @llvm.dbg.declare(metadata !{i32* %val}, metadata !23), !dbg !24
%arraydecay = getelementptr inbounds [100 x i32]* %main_arr, i32 0, i32 0, !dbg !25
call void @populate_array(i32* %arraydecay, i32 100), !dbg !25
%arraydecay1 = getelementptr inbounds [100 x i32]* %main_arr, i32 0, i32 0, !dbg !26
diff --git a/llvm/test/DebugInfo/X86/2010-04-13-PubType.ll b/llvm/test/DebugInfo/X86/2010-04-13-PubType.ll
index 783765a..0440afc 100644
--- a/llvm/test/DebugInfo/X86/2010-04-13-PubType.ll
+++ b/llvm/test/DebugInfo/X86/2010-04-13-PubType.ll
@@ -12,9 +12,9 @@
%retval = alloca i32 ; <i32*> [#uses=2]
%0 = alloca i32 ; <i32*> [#uses=2]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.declare(metadata !{%struct.X** %x_addr}, metadata !0, metadata !{}), !dbg !13
+ call void @llvm.dbg.declare(metadata !{%struct.X** %x_addr}, metadata !0), !dbg !13
store %struct.X* %x, %struct.X** %x_addr
- call void @llvm.dbg.declare(metadata !{%struct.Y** %y_addr}, metadata !14, metadata !{}), !dbg !13
+ call void @llvm.dbg.declare(metadata !{%struct.Y** %y_addr}, metadata !14), !dbg !13
store %struct.Y* %y, %struct.Y** %y_addr
store i32 0, i32* %0, align 4, !dbg !13
%1 = load i32* %0, align 4, !dbg !13 ; <i32> [#uses=1]
@@ -26,7 +26,7 @@
ret i32 %retval1, !dbg !15
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!3}
!llvm.module.flags = !{!20}
diff --git a/llvm/test/DebugInfo/X86/2011-09-26-GlobalVarContext.ll b/llvm/test/DebugInfo/X86/2011-09-26-GlobalVarContext.ll
index 4f88035..4e8b3d3 100644
--- a/llvm/test/DebugInfo/X86/2011-09-26-GlobalVarContext.ll
+++ b/llvm/test/DebugInfo/X86/2011-09-26-GlobalVarContext.ll
@@ -7,14 +7,14 @@
define i32 @f() nounwind {
%LOC = alloca i32, align 4
- call void @llvm.dbg.declare(metadata !{i32* %LOC}, metadata !15, metadata !{}), !dbg !17
+ call void @llvm.dbg.declare(metadata !{i32* %LOC}, metadata !15), !dbg !17
%1 = load i32* @GLB, align 4, !dbg !18
store i32 %1, i32* %LOC, align 4, !dbg !18
%2 = load i32* @GLB, align 4, !dbg !19
ret i32 %2, !dbg !19
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!21}
diff --git a/llvm/test/DebugInfo/X86/2011-12-16-BadStructRef.ll b/llvm/test/DebugInfo/X86/2011-12-16-BadStructRef.ll
index e376421..21dccd7 100644
--- a/llvm/test/DebugInfo/X86/2011-12-16-BadStructRef.ll
+++ b/llvm/test/DebugInfo/X86/2011-12-16-BadStructRef.ll
@@ -15,24 +15,24 @@
%myBar = alloca %struct.bar, align 8
store i32 0, i32* %retval
store i32 %argc, i32* %argc.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !49, metadata !{}), !dbg !50
+ call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !49), !dbg !50
store i8** %argv, i8*** %argv.addr, align 8
- call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !51, metadata !{}), !dbg !52
- call void @llvm.dbg.declare(metadata !{%struct.bar* %myBar}, metadata !53, metadata !{}), !dbg !55
+ call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !51), !dbg !52
+ call void @llvm.dbg.declare(metadata !{%struct.bar* %myBar}, metadata !53), !dbg !55
call void @_ZN3barC1Ei(%struct.bar* %myBar, i32 1), !dbg !56
ret i32 0, !dbg !57
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define linkonce_odr void @_ZN3barC1Ei(%struct.bar* %this, i32 %x) unnamed_addr uwtable ssp align 2 {
entry:
%this.addr = alloca %struct.bar*, align 8
%x.addr = alloca i32, align 4
store %struct.bar* %this, %struct.bar** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.bar** %this.addr}, metadata !58, metadata !{}), !dbg !59
+ call void @llvm.dbg.declare(metadata !{%struct.bar** %this.addr}, metadata !58), !dbg !59
store i32 %x, i32* %x.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %x.addr}, metadata !60, metadata !{}), !dbg !61
+ call void @llvm.dbg.declare(metadata !{i32* %x.addr}, metadata !60), !dbg !61
%this1 = load %struct.bar** %this.addr
%0 = load i32* %x.addr, align 4, !dbg !62
call void @_ZN3barC2Ei(%struct.bar* %this1, i32 %0), !dbg !62
@@ -44,9 +44,9 @@
%this.addr = alloca %struct.bar*, align 8
%x.addr = alloca i32, align 4
store %struct.bar* %this, %struct.bar** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.bar** %this.addr}, metadata !63, metadata !{}), !dbg !64
+ call void @llvm.dbg.declare(metadata !{%struct.bar** %this.addr}, metadata !63), !dbg !64
store i32 %x, i32* %x.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %x.addr}, metadata !65, metadata !{}), !dbg !66
+ call void @llvm.dbg.declare(metadata !{i32* %x.addr}, metadata !65), !dbg !66
%this1 = load %struct.bar** %this.addr
%b = getelementptr inbounds %struct.bar* %this1, i32 0, i32 0, !dbg !67
%0 = load i32* %x.addr, align 4, !dbg !67
@@ -62,9 +62,9 @@
%this.addr = alloca %struct.baz*, align 8
%a.addr = alloca i32, align 4
store %struct.baz* %this, %struct.baz** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.baz** %this.addr}, metadata !70, metadata !{}), !dbg !71
+ call void @llvm.dbg.declare(metadata !{%struct.baz** %this.addr}, metadata !70), !dbg !71
store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !72, metadata !{}), !dbg !73
+ call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !72), !dbg !73
%this1 = load %struct.baz** %this.addr
%0 = load i32* %a.addr, align 4, !dbg !74
call void @_ZN3bazC2Ei(%struct.baz* %this1, i32 %0), !dbg !74
@@ -76,9 +76,9 @@
%this.addr = alloca %struct.baz*, align 8
%a.addr = alloca i32, align 4
store %struct.baz* %this, %struct.baz** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.baz** %this.addr}, metadata !75, metadata !{}), !dbg !76
+ call void @llvm.dbg.declare(metadata !{%struct.baz** %this.addr}, metadata !75), !dbg !76
store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !77, metadata !{}), !dbg !78
+ call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !77), !dbg !78
%this1 = load %struct.baz** %this.addr
%h = getelementptr inbounds %struct.baz* %this1, i32 0, i32 0, !dbg !79
%0 = load i32* %a.addr, align 4, !dbg !79
diff --git a/llvm/test/DebugInfo/X86/DW_AT_byte_size.ll b/llvm/test/DebugInfo/X86/DW_AT_byte_size.ll
index 5be8f85..59921bd 100644
--- a/llvm/test/DebugInfo/X86/DW_AT_byte_size.ll
+++ b/llvm/test/DebugInfo/X86/DW_AT_byte_size.ll
@@ -14,14 +14,14 @@
entry:
%a.addr = alloca %struct.A*, align 8
store %struct.A* %a, %struct.A** %a.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.A** %a.addr}, metadata !16, metadata !{}), !dbg !17
+ call void @llvm.dbg.declare(metadata !{%struct.A** %a.addr}, metadata !16), !dbg !17
%0 = load %struct.A** %a.addr, align 8, !dbg !18
%b = getelementptr inbounds %struct.A* %0, i32 0, i32 0, !dbg !18
%1 = load i32* %b, align 4, !dbg !18
ret i32 %1, !dbg !18
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!21}
diff --git a/llvm/test/DebugInfo/X86/DW_AT_linkage_name.ll b/llvm/test/DebugInfo/X86/DW_AT_linkage_name.ll
index fd7ca55..dce234a 100644
--- a/llvm/test/DebugInfo/X86/DW_AT_linkage_name.ll
+++ b/llvm/test/DebugInfo/X86/DW_AT_linkage_name.ll
@@ -38,20 +38,20 @@
entry:
%this.addr = alloca %struct.A*, align 8
store %struct.A* %this, %struct.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.A** %this.addr}, metadata !26, metadata !{}), !dbg !28
+ call void @llvm.dbg.declare(metadata !{%struct.A** %this.addr}, metadata !26), !dbg !28
%this1 = load %struct.A** %this.addr
ret void, !dbg !29
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind ssp uwtable
define void @_ZN1AD1Ev(%struct.A* %this) unnamed_addr #0 align 2 {
entry:
%this.addr = alloca %struct.A*, align 8
store %struct.A* %this, %struct.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.A** %this.addr}, metadata !30, metadata !{}), !dbg !31
+ call void @llvm.dbg.declare(metadata !{%struct.A** %this.addr}, metadata !30), !dbg !31
%this1 = load %struct.A** %this.addr
call void @_ZN1AD2Ev(%struct.A* %this1), !dbg !32
ret void, !dbg !33
@@ -61,7 +61,7 @@
define void @_Z3foov() #2 {
entry:
%a = alloca %struct.A, align 1
- call void @llvm.dbg.declare(metadata !{%struct.A* %a}, metadata !34, metadata !{}), !dbg !35
+ call void @llvm.dbg.declare(metadata !{%struct.A* %a}, metadata !34), !dbg !35
call void @_ZN1AC1Ei(%struct.A* %a, i32 1), !dbg !35
call void @_ZN1AD1Ev(%struct.A* %a), !dbg !36
ret void, !dbg !36
diff --git a/llvm/test/DebugInfo/X86/DW_AT_location-reference.ll b/llvm/test/DebugInfo/X86/DW_AT_location-reference.ll
index cc6a1b0..abfbe70 100644
--- a/llvm/test/DebugInfo/X86/DW_AT_location-reference.ll
+++ b/llvm/test/DebugInfo/X86/DW_AT_location-reference.ll
@@ -64,7 +64,7 @@
entry:
%call = tail call i32 @g(i32 0, i32 0) nounwind, !dbg !8
store i32 %call, i32* @a, align 4, !dbg !8
- tail call void @llvm.dbg.value(metadata !12, i64 0, metadata !5, metadata !{}), !dbg !13
+ tail call void @llvm.dbg.value(metadata !12, i64 0, metadata !5), !dbg !13
br label %while.body
while.body: ; preds = %entry, %while.body
@@ -75,10 +75,10 @@
br i1 %tobool, label %while.end, label %while.body, !dbg !14
while.end: ; preds = %while.body
- tail call void @llvm.dbg.value(metadata !{i32 %mul}, i64 0, metadata !5, metadata !{}), !dbg !14
+ tail call void @llvm.dbg.value(metadata !{i32 %mul}, i64 0, metadata !5), !dbg !14
%call4 = tail call i32 @g(i32 %mul, i32 0) nounwind, !dbg !15
store i32 %call4, i32* @a, align 4, !dbg !15
- tail call void @llvm.dbg.value(metadata !16, i64 0, metadata !5, metadata !{}), !dbg !17
+ tail call void @llvm.dbg.value(metadata !16, i64 0, metadata !5), !dbg !17
br label %while.body9
while.body9: ; preds = %while.end, %while.body9
@@ -89,7 +89,7 @@
br i1 %tobool8, label %while.end13, label %while.body9, !dbg !18
while.end13: ; preds = %while.body9
- tail call void @llvm.dbg.value(metadata !{i32 %mul12}, i64 0, metadata !5, metadata !{}), !dbg !18
+ tail call void @llvm.dbg.value(metadata !{i32 %mul12}, i64 0, metadata !5), !dbg !18
%call15 = tail call i32 @g(i32 0, i32 %mul12) nounwind, !dbg !19
store i32 %call15, i32* @a, align 4, !dbg !19
ret void, !dbg !20
@@ -97,7 +97,7 @@
declare i32 @g(i32, i32)
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!24}
diff --git a/llvm/test/DebugInfo/X86/DW_AT_object_pointer.ll b/llvm/test/DebugInfo/X86/DW_AT_object_pointer.ll
index b10edba..4b9fae8 100644
--- a/llvm/test/DebugInfo/X86/DW_AT_object_pointer.ll
+++ b/llvm/test/DebugInfo/X86/DW_AT_object_pointer.ll
@@ -17,21 +17,21 @@
%.addr = alloca i32, align 4
%a = alloca %class.A, align 4
store i32 %0, i32* %.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %.addr}, metadata !36, metadata !{}), !dbg !35
- call void @llvm.dbg.declare(metadata !{%class.A* %a}, metadata !21, metadata !{}), !dbg !23
+ call void @llvm.dbg.declare(metadata !{i32* %.addr}, metadata !36), !dbg !35
+ call void @llvm.dbg.declare(metadata !{%class.A* %a}, metadata !21), !dbg !23
call void @_ZN1AC1Ev(%class.A* %a), !dbg !24
%m_a = getelementptr inbounds %class.A* %a, i32 0, i32 0, !dbg !25
%1 = load i32* %m_a, align 4, !dbg !25
ret i32 %1, !dbg !25
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define linkonce_odr void @_ZN1AC1Ev(%class.A* %this) unnamed_addr nounwind uwtable ssp align 2 {
entry:
%this.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !26, metadata !{}), !dbg !28
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !26), !dbg !28
%this1 = load %class.A** %this.addr
call void @_ZN1AC2Ev(%class.A* %this1), !dbg !29
ret void, !dbg !29
@@ -41,7 +41,7 @@
entry:
%this.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !30, metadata !{}), !dbg !31
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !30), !dbg !31
%this1 = load %class.A** %this.addr
%m_a = getelementptr inbounds %class.A* %this1, i32 0, i32 0, !dbg !32
store i32 0, i32* %m_a, align 4, !dbg !32
diff --git a/llvm/test/DebugInfo/X86/aligned_stack_var.ll b/llvm/test/DebugInfo/X86/aligned_stack_var.ll
index d482be7..54484ac 100644
--- a/llvm/test/DebugInfo/X86/aligned_stack_var.ll
+++ b/llvm/test/DebugInfo/X86/aligned_stack_var.ll
@@ -18,11 +18,11 @@
define void @_Z3runv() nounwind uwtable {
entry:
%x = alloca i32, align 32
- call void @llvm.dbg.declare(metadata !{i32* %x}, metadata !9, metadata !{}), !dbg !12
+ call void @llvm.dbg.declare(metadata !{i32* %x}, metadata !9), !dbg !12
ret void, !dbg !13
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!15}
diff --git a/llvm/test/DebugInfo/X86/arguments.ll b/llvm/test/DebugInfo/X86/arguments.ll
index f776693..2f17251 100644
--- a/llvm/test/DebugInfo/X86/arguments.ll
+++ b/llvm/test/DebugInfo/X86/arguments.ll
@@ -31,8 +31,8 @@
; Function Attrs: nounwind uwtable
define void @_Z4func3fooS_(%struct.foo* %f, %struct.foo* %g) #0 {
entry:
- call void @llvm.dbg.declare(metadata !{%struct.foo* %f}, metadata !19, metadata !{}), !dbg !20
- call void @llvm.dbg.declare(metadata !{%struct.foo* %g}, metadata !21, metadata !{}), !dbg !20
+ call void @llvm.dbg.declare(metadata !{%struct.foo* %f}, metadata !19), !dbg !20
+ call void @llvm.dbg.declare(metadata !{%struct.foo* %g}, metadata !21), !dbg !20
%i = getelementptr inbounds %struct.foo* %f, i32 0, i32 0, !dbg !22
%0 = load i32* %i, align 4, !dbg !22
%inc = add nsw i32 %0, 1, !dbg !22
@@ -41,7 +41,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/array.ll b/llvm/test/DebugInfo/X86/array.ll
index 02d5ad3..dc6c7a4 100644
--- a/llvm/test/DebugInfo/X86/array.ll
+++ b/llvm/test/DebugInfo/X86/array.ll
@@ -25,7 +25,7 @@
; Function Attrs: nounwind ssp uwtable
define void @f(i32* nocapture %p) #0 {
- tail call void @llvm.dbg.value(metadata !{i32* %p}, i64 0, metadata !11, metadata !{}), !dbg !28
+ tail call void @llvm.dbg.value(metadata !{i32* %p}, i64 0, metadata !11), !dbg !28
store i32 42, i32* %p, align 4, !dbg !29, !tbaa !30
ret void, !dbg !34
}
@@ -33,15 +33,15 @@
; Function Attrs: nounwind ssp uwtable
define i32 @main(i32 %argc, i8** nocapture readnone %argv) #0 {
%array = alloca [4 x i32], align 16
- tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !19, metadata !{}), !dbg !35
- tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !20, metadata !{}), !dbg !35
- tail call void @llvm.dbg.value(metadata !{[4 x i32]* %array}, i64 0, metadata !21, metadata !{}), !dbg !36
+ tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !19), !dbg !35
+ tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !20), !dbg !35
+ tail call void @llvm.dbg.value(metadata !{[4 x i32]* %array}, i64 0, metadata !21), !dbg !36
%1 = bitcast [4 x i32]* %array to i8*, !dbg !36
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* bitcast ([4 x i32]* @main.array to i8*), i64 16, i32 16, i1 false), !dbg !36
- tail call void @llvm.dbg.value(metadata !{[4 x i32]* %array}, i64 0, metadata !21, metadata !{}), !dbg !36
+ tail call void @llvm.dbg.value(metadata !{[4 x i32]* %array}, i64 0, metadata !21), !dbg !36
%2 = getelementptr inbounds [4 x i32]* %array, i64 0, i64 0, !dbg !37
call void @f(i32* %2), !dbg !37
- tail call void @llvm.dbg.value(metadata !{[4 x i32]* %array}, i64 0, metadata !21, metadata !{}), !dbg !36
+ tail call void @llvm.dbg.value(metadata !{[4 x i32]* %array}, i64 0, metadata !21), !dbg !36
%3 = load i32* %2, align 16, !dbg !38, !tbaa !30
ret i32 %3, !dbg !38
}
@@ -50,7 +50,7 @@
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) #1
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
+declare void @llvm.dbg.value(metadata, i64, metadata) #2
attributes #0 = { nounwind ssp uwtable }
attributes #1 = { nounwind }
diff --git a/llvm/test/DebugInfo/X86/array2.ll b/llvm/test/DebugInfo/X86/array2.ll
index f0fbde7..2dc2af32 100644
--- a/llvm/test/DebugInfo/X86/array2.ll
+++ b/llvm/test/DebugInfo/X86/array2.ll
@@ -29,7 +29,7 @@
entry:
%p.addr = alloca i32*, align 8
store i32* %p, i32** %p.addr, align 8
- call void @llvm.dbg.declare(metadata !{i32** %p.addr}, metadata !19, metadata !{}), !dbg !20
+ call void @llvm.dbg.declare(metadata !{i32** %p.addr}, metadata !19), !dbg !20
%0 = load i32** %p.addr, align 8, !dbg !21
%arrayidx = getelementptr inbounds i32* %0, i64 0, !dbg !21
store i32 42, i32* %arrayidx, align 4, !dbg !21
@@ -37,7 +37,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind ssp uwtable
define i32 @main(i32 %argc, i8** %argv) #0 {
@@ -48,10 +48,10 @@
%array = alloca [4 x i32], align 16
store i32 0, i32* %retval
store i32 %argc, i32* %argc.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !23, metadata !{}), !dbg !24
+ call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !23), !dbg !24
store i8** %argv, i8*** %argv.addr, align 8
- call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !25, metadata !{}), !dbg !24
- call void @llvm.dbg.declare(metadata !{[4 x i32]* %array}, metadata !26, metadata !{}), !dbg !30
+ call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !25), !dbg !24
+ call void @llvm.dbg.declare(metadata !{[4 x i32]* %array}, metadata !26), !dbg !30
%0 = bitcast [4 x i32]* %array to i8*, !dbg !30
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* bitcast ([4 x i32]* @main.array to i8*), i64 16, i32 16, i1 false), !dbg !30
%arraydecay = getelementptr inbounds [4 x i32]* %array, i32 0, i32 0, !dbg !31
diff --git a/llvm/test/DebugInfo/X86/block-capture.ll b/llvm/test/DebugInfo/X86/block-capture.ll
index efb3f38..95613c7 100644
--- a/llvm/test/DebugInfo/X86/block-capture.ll
+++ b/llvm/test/DebugInfo/X86/block-capture.ll
@@ -17,15 +17,15 @@
%struct.__block_descriptor = type { i64, i64 }
%struct.__block_literal_generic = type { i8*, i32, i32, i8*, %struct.__block_descriptor* }
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define hidden void @__foo_block_invoke_0(i8* %.block_descriptor) uwtable ssp {
entry:
%exn.slot = alloca i8*
%ehselector.slot = alloca i32
- call void @llvm.dbg.value(metadata !{i8* %.block_descriptor}, i64 0, metadata !39, metadata !{}), !dbg !51
+ call void @llvm.dbg.value(metadata !{i8* %.block_descriptor}, i64 0, metadata !39), !dbg !51
%block = bitcast i8* %.block_descriptor to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, void ()* }>*, !dbg !52
- call void @llvm.dbg.declare(metadata !{<{ i8*, i32, i32, i8*, %struct.__block_descriptor*, void ()* }>* %block}, metadata !53, metadata !65), !dbg !54
+ call void @llvm.dbg.declare(metadata !{<{ i8*, i32, i32, i8*, %struct.__block_descriptor*, void ()* }>* %block}, metadata !53), !dbg !54
%block.capture.addr = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, void ()* }>* %block, i32 0, i32 5, !dbg !55
%0 = load void ()** %block.capture.addr, align 8, !dbg !55
%block.literal = bitcast void ()* %0 to %struct.__block_literal_generic*, !dbg !55
@@ -58,7 +58,7 @@
br label %eh.cont, !dbg !58
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
declare i8* @objc_begin_catch(i8*)
@@ -118,7 +118,7 @@
!50 = metadata !{i32 786445, metadata !63, metadata !6, metadata !"block", i32 7, i64 64, i64 64, i64 256, i32 0, metadata !9} ; [ DW_TAG_member ]
!51 = metadata !{i32 7, i32 18, metadata !28, null}
!52 = metadata !{i32 7, i32 19, metadata !28, null}
-!53 = metadata !{i32 786688, metadata !28, metadata !"block", metadata !6, i32 5, metadata !9, i32 0, i32 0} ;; [ DW_TAG_auto_variable ]
+!53 = metadata !{i32 786688, metadata !28, metadata !"block", metadata !6, i32 5, metadata !9, i32 0, i32 0, metadata !65} ; [ DW_TAG_auto_variable ]
!54 = metadata !{i32 5, i32 27, metadata !28, null}
!55 = metadata !{i32 8, i32 22, metadata !56, null}
!56 = metadata !{i32 786443, metadata !6, metadata !57, i32 7, i32 26, i32 2} ; [ DW_TAG_lexical_block ]
@@ -130,4 +130,4 @@
!62 = metadata !{i32 9, i32 20, metadata !56, null}
!63 = metadata !{metadata !"foo.m", metadata !"/Users/echristo"}
!64 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
-!65 = metadata !{i32 786690, i64 34, i64 32} ; [DW_OP_plus 32]
+!65 = metadata !{i64 1, i64 32}
diff --git a/llvm/test/DebugInfo/X86/byvalstruct.ll b/llvm/test/DebugInfo/X86/byvalstruct.ll
index 4136b2e..d787ef3 100644
--- a/llvm/test/DebugInfo/X86/byvalstruct.ll
+++ b/llvm/test/DebugInfo/X86/byvalstruct.ll
@@ -66,20 +66,20 @@
%otherBitmap.addr = alloca %0*, align 8
%length.addr = alloca i64, align 8
store %0* %self, %0** %self.addr, align 8
- call void @llvm.dbg.declare(metadata !{%0** %self.addr}, metadata !28, metadata !{}), !dbg !29
+ call void @llvm.dbg.declare(metadata !{%0** %self.addr}, metadata !28), !dbg !29
store i8* %_cmd, i8** %_cmd.addr, align 8
- call void @llvm.dbg.declare(metadata !{i8** %_cmd.addr}, metadata !30, metadata !{}), !dbg !29
+ call void @llvm.dbg.declare(metadata !{i8** %_cmd.addr}, metadata !30), !dbg !29
store %0* %otherBitmap, %0** %otherBitmap.addr, align 8
- call void @llvm.dbg.declare(metadata !{%0** %otherBitmap.addr}, metadata !32, metadata !{}), !dbg !29
- call void @llvm.dbg.declare(metadata !{%struct.ImageInfo* %info}, metadata !33, metadata !{}), !dbg !34
+ call void @llvm.dbg.declare(metadata !{%0** %otherBitmap.addr}, metadata !32), !dbg !29
+ call void @llvm.dbg.declare(metadata !{%struct.ImageInfo* %info}, metadata !33), !dbg !34
store i64 %length, i64* %length.addr, align 8
- call void @llvm.dbg.declare(metadata !{i64* %length.addr}, metadata !35, metadata !{}), !dbg !36
+ call void @llvm.dbg.declare(metadata !{i64* %length.addr}, metadata !35), !dbg !36
%0 = load i8** %retval, !dbg !37
ret i8* %0, !dbg !37
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
attributes #0 = { ssp uwtable }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/cu-ranges-odr.ll b/llvm/test/DebugInfo/X86/cu-ranges-odr.ll
index 42847ea..c42a908 100644
--- a/llvm/test/DebugInfo/X86/cu-ranges-odr.ll
+++ b/llvm/test/DebugInfo/X86/cu-ranges-odr.ll
@@ -35,9 +35,9 @@
%this.addr = alloca %class.A*, align 8
%i.addr = alloca i32, align 4
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !27, metadata !{}), !dbg !29
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !27), !dbg !29
store i32 %i, i32* %i.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %i.addr}, metadata !30, metadata !{}), !dbg !31
+ call void @llvm.dbg.declare(metadata !{i32* %i.addr}, metadata !30), !dbg !31
%this1 = load %class.A** %this.addr
%a = getelementptr inbounds %class.A* %this1, i32 0, i32 0, !dbg !31
%0 = load i32* %i.addr, align 4, !dbg !31
@@ -46,7 +46,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
define internal void @_GLOBAL__I_a() section ".text.startup" {
entry:
diff --git a/llvm/test/DebugInfo/X86/cu-ranges.ll b/llvm/test/DebugInfo/X86/cu-ranges.ll
index 1572d1d..2ff4eb1 100644
--- a/llvm/test/DebugInfo/X86/cu-ranges.ll
+++ b/llvm/test/DebugInfo/X86/cu-ranges.ll
@@ -29,21 +29,21 @@
entry:
%a.addr = alloca i32, align 4
store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !13, metadata !{}), !dbg !14
+ call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !13), !dbg !14
%0 = load i32* %a.addr, align 4, !dbg !14
%add = add nsw i32 %0, 1, !dbg !14
ret i32 %add, !dbg !14
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind uwtable
define i32 @bar(i32 %b) #0 {
entry:
%b.addr = alloca i32, align 4
store i32 %b, i32* %b.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %b.addr}, metadata !15, metadata !{}), !dbg !16
+ call void @llvm.dbg.declare(metadata !{i32* %b.addr}, metadata !15), !dbg !16
%0 = load i32* %b.addr, align 4, !dbg !16
%add = add nsw i32 %0, 2, !dbg !16
ret i32 %add, !dbg !16
diff --git a/llvm/test/DebugInfo/X86/dbg-byval-parameter.ll b/llvm/test/DebugInfo/X86/dbg-byval-parameter.ll
index f849a19..c658b50 100644
--- a/llvm/test/DebugInfo/X86/dbg-byval-parameter.ll
+++ b/llvm/test/DebugInfo/X86/dbg-byval-parameter.ll
@@ -9,7 +9,7 @@
%retval = alloca double ; <double*> [#uses=2]
%0 = alloca double ; <double*> [#uses=2]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.declare(metadata !{%struct.Rect* %my_r0}, metadata !0, metadata !{}), !dbg !15
+ call void @llvm.dbg.declare(metadata !{%struct.Rect* %my_r0}, metadata !0), !dbg !15
%1 = getelementptr inbounds %struct.Rect* %my_r0, i32 0, i32 0, !dbg !16 ; <%struct.Pt*> [#uses=1]
%2 = getelementptr inbounds %struct.Pt* %1, i32 0, i32 0, !dbg !16 ; <double*> [#uses=1]
%3 = load double* %2, align 8, !dbg !16 ; <double> [#uses=1]
@@ -23,7 +23,7 @@
ret double %retval1, !dbg !16
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!3}
!llvm.module.flags = !{!21}
diff --git a/llvm/test/DebugInfo/X86/dbg-const-int.ll b/llvm/test/DebugInfo/X86/dbg-const-int.ll
index 2a22e3d..bf7ee08 100644
--- a/llvm/test/DebugInfo/X86/dbg-const-int.ll
+++ b/llvm/test/DebugInfo/X86/dbg-const-int.ll
@@ -12,11 +12,11 @@
define i32 @foo() nounwind uwtable readnone optsize ssp {
entry:
- tail call void @llvm.dbg.value(metadata !8, i64 0, metadata !6, metadata !{}), !dbg !9
+ tail call void @llvm.dbg.value(metadata !8, i64 0, metadata !6), !dbg !9
ret i32 42, !dbg !10
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!15}
diff --git a/llvm/test/DebugInfo/X86/dbg-const.ll b/llvm/test/DebugInfo/X86/dbg-const.ll
index f55e254..72c74f1 100644
--- a/llvm/test/DebugInfo/X86/dbg-const.ll
+++ b/llvm/test/DebugInfo/X86/dbg-const.ll
@@ -17,15 +17,15 @@
;CHECK-NEXT: .byte 42
define i32 @foobar() nounwind readonly noinline ssp {
entry:
- tail call void @llvm.dbg.value(metadata !8, i64 0, metadata !6, metadata !{}), !dbg !9
+ tail call void @llvm.dbg.value(metadata !8, i64 0, metadata !6), !dbg !9
%call = tail call i32 @bar(), !dbg !11
- tail call void @llvm.dbg.value(metadata !{i32 %call}, i64 0, metadata !6, metadata !{}), !dbg !11
+ tail call void @llvm.dbg.value(metadata !{i32 %call}, i64 0, metadata !6), !dbg !11
%call2 = tail call i32 @bar(), !dbg !11
%add = add nsw i32 %call2, %call, !dbg !12
ret i32 %add, !dbg !10
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
declare i32 @bar() nounwind readnone
!llvm.dbg.cu = !{!2}
diff --git a/llvm/test/DebugInfo/X86/dbg-declare-arg.ll b/llvm/test/DebugInfo/X86/dbg-declare-arg.ll
index 6669672..0bab207 100644
--- a/llvm/test/DebugInfo/X86/dbg-declare-arg.ll
+++ b/llvm/test/DebugInfo/X86/dbg-declare-arg.ll
@@ -14,8 +14,8 @@
%nrvo = alloca i1
%cleanup.dest.slot = alloca i32
store i32 %i, i32* %i.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %i.addr}, metadata !26, metadata !{}), !dbg !27
- call void @llvm.dbg.declare(metadata !{i32* %j}, metadata !28, metadata !{}), !dbg !30
+ call void @llvm.dbg.declare(metadata !{i32* %i.addr}, metadata !26), !dbg !27
+ call void @llvm.dbg.declare(metadata !{i32* %j}, metadata !28), !dbg !30
store i32 0, i32* %j, align 4, !dbg !31
%tmp = load i32* %i.addr, align 4, !dbg !32
%cmp = icmp eq i32 %tmp, 42, !dbg !32
@@ -29,7 +29,7 @@
if.end: ; preds = %if.then, %entry
store i1 false, i1* %nrvo, !dbg !36
- call void @llvm.dbg.declare(metadata !{%class.A* %agg.result}, metadata !37, metadata !{}), !dbg !39
+ call void @llvm.dbg.declare(metadata !{%class.A* %agg.result}, metadata !37), !dbg !39
%tmp2 = load i32* %j, align 4, !dbg !40
%x = getelementptr inbounds %class.A* %agg.result, i32 0, i32 0, !dbg !40
store i32 %tmp2, i32* %x, align 4, !dbg !40
@@ -46,13 +46,13 @@
ret void, !dbg !42
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define linkonce_odr void @_ZN1AD1Ev(%class.A* %this) unnamed_addr ssp align 2 {
entry:
%this.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !43, metadata !{}), !dbg !44
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !43), !dbg !44
%this1 = load %class.A** %this.addr
call void @_ZN1AD2Ev(%class.A* %this1)
ret void, !dbg !45
@@ -62,7 +62,7 @@
entry:
%this.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !46, metadata !{}), !dbg !47
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !46), !dbg !47
%this1 = load %class.A** %this.addr
%x = getelementptr inbounds %class.A* %this1, i32 0, i32 0, !dbg !48
store i32 1, i32* %x, align 4, !dbg !48
diff --git a/llvm/test/DebugInfo/X86/dbg-declare.ll b/llvm/test/DebugInfo/X86/dbg-declare.ll
index 5132c7d..241a5a1 100644
--- a/llvm/test/DebugInfo/X86/dbg-declare.ll
+++ b/llvm/test/DebugInfo/X86/dbg-declare.ll
@@ -7,21 +7,21 @@
%saved_stack = alloca i8*
%cleanup.dest.slot = alloca i32
store i32* %x, i32** %x.addr, align 8
- call void @llvm.dbg.declare(metadata !{i32** %x.addr}, metadata !14, metadata !{}), !dbg !15
+ call void @llvm.dbg.declare(metadata !{i32** %x.addr}, metadata !14), !dbg !15
%0 = load i32** %x.addr, align 8, !dbg !16
%1 = load i32* %0, align 4, !dbg !16
%2 = zext i32 %1 to i64, !dbg !16
%3 = call i8* @llvm.stacksave(), !dbg !16
store i8* %3, i8** %saved_stack, !dbg !16
%vla = alloca i8, i64 %2, align 16, !dbg !16
- call void @llvm.dbg.declare(metadata !{i8* %vla}, metadata !18, metadata !{}), !dbg !23
+ call void @llvm.dbg.declare(metadata !{i8* %vla}, metadata !18), !dbg !23
store i32 1, i32* %cleanup.dest.slot
%4 = load i8** %saved_stack, !dbg !24
call void @llvm.stackrestore(i8* %4), !dbg !24
ret i32 0, !dbg !25
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
declare i8* @llvm.stacksave() nounwind
diff --git a/llvm/test/DebugInfo/X86/dbg-i128-const.ll b/llvm/test/DebugInfo/X86/dbg-i128-const.ll
index c37d41e..01b105f 100644
--- a/llvm/test/DebugInfo/X86/dbg-i128-const.ll
+++ b/llvm/test/DebugInfo/X86/dbg-i128-const.ll
@@ -5,12 +5,12 @@
define i128 @__foo(i128 %a, i128 %b) nounwind {
entry:
- tail call void @llvm.dbg.value(metadata !0, i64 0, metadata !1, metadata !{}), !dbg !11
+ tail call void @llvm.dbg.value(metadata !0, i64 0, metadata !1), !dbg !11
%add = add i128 %a, %b, !dbg !11
ret i128 %add, !dbg !11
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!5}
!llvm.module.flags = !{!16}
diff --git a/llvm/test/DebugInfo/X86/dbg-merge-loc-entry.ll b/llvm/test/DebugInfo/X86/dbg-merge-loc-entry.ll
index add358a..016d0a1 100644
--- a/llvm/test/DebugInfo/X86/dbg-merge-loc-entry.ll
+++ b/llvm/test/DebugInfo/X86/dbg-merge-loc-entry.ll
@@ -14,8 +14,8 @@
define hidden i128 @__divti3(i128 %u, i128 %v) nounwind readnone {
entry:
- tail call void @llvm.dbg.value(metadata !{i128 %u}, i64 0, metadata !14, metadata !{}), !dbg !15
- tail call void @llvm.dbg.value(metadata !16, i64 0, metadata !17, metadata !{}), !dbg !21
+ tail call void @llvm.dbg.value(metadata !{i128 %u}, i64 0, metadata !14), !dbg !15
+ tail call void @llvm.dbg.value(metadata !16, i64 0, metadata !17), !dbg !21
br i1 undef, label %bb2, label %bb4, !dbg !22
bb2: ; preds = %entry
@@ -31,9 +31,9 @@
ret i128 undef, !dbg !27
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
declare %0 @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone
diff --git a/llvm/test/DebugInfo/X86/dbg-prolog-end.ll b/llvm/test/DebugInfo/X86/dbg-prolog-end.ll
index 887f7e6..a7c6cb5 100644
--- a/llvm/test/DebugInfo/X86/dbg-prolog-end.ll
+++ b/llvm/test/DebugInfo/X86/dbg-prolog-end.ll
@@ -8,8 +8,8 @@
%i.addr = alloca i32, align 4
%j = alloca i32, align 4
store i32 %i, i32* %i.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %i.addr}, metadata !7, metadata !{}), !dbg !8
- call void @llvm.dbg.declare(metadata !{i32* %j}, metadata !9, metadata !{}), !dbg !11
+ call void @llvm.dbg.declare(metadata !{i32* %i.addr}, metadata !7), !dbg !8
+ call void @llvm.dbg.declare(metadata !{i32* %j}, metadata !9), !dbg !11
store i32 2, i32* %j, align 4, !dbg !12
%tmp = load i32* %j, align 4, !dbg !13
%inc = add nsw i32 %tmp, 1, !dbg !13
@@ -22,7 +22,7 @@
ret i32 %tmp3, !dbg !15
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define i32 @main() nounwind ssp {
entry:
diff --git a/llvm/test/DebugInfo/X86/dbg-value-const-byref.ll b/llvm/test/DebugInfo/X86/dbg-value-const-byref.ll
index ef70526..23fa352 100644
--- a/llvm/test/DebugInfo/X86/dbg-value-const-byref.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-const-byref.ll
@@ -50,13 +50,13 @@
define i32 @foo() #0 {
entry:
%i = alloca i32, align 4
- call void @llvm.dbg.value(metadata !14, i64 0, metadata !10, metadata !{}), !dbg !15
+ call void @llvm.dbg.value(metadata !14, i64 0, metadata !10), !dbg !15
%call = call i32 @f3(i32 3) #3, !dbg !16
- call void @llvm.dbg.value(metadata !17, i64 0, metadata !10, metadata !{}), !dbg !18
+ call void @llvm.dbg.value(metadata !17, i64 0, metadata !10), !dbg !18
%call1 = call i32 (...)* @f1() #3, !dbg !19
- call void @llvm.dbg.value(metadata !{i32 %call1}, i64 0, metadata !10, metadata !{}), !dbg !19
+ call void @llvm.dbg.value(metadata !{i32 %call1}, i64 0, metadata !10), !dbg !19
store i32 %call1, i32* %i, align 4, !dbg !19, !tbaa !20
- call void @llvm.dbg.value(metadata !{i32* %i}, i64 0, metadata !10, metadata !{}), !dbg !24
+ call void @llvm.dbg.value(metadata !{i32* %i}, i64 0, metadata !10), !dbg !24
call void @f2(i32* %i) #3, !dbg !24
ret i32 0, !dbg !25
}
@@ -68,7 +68,7 @@
declare void @f2(i32*)
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
+declare void @llvm.dbg.value(metadata, i64, metadata) #2
attributes #0 = { nounwind ssp uwtable }
attributes #2 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/dbg-value-dag-combine.ll b/llvm/test/DebugInfo/X86/dbg-value-dag-combine.ll
index 4a96600..cdf3220 100644
--- a/llvm/test/DebugInfo/X86/dbg-value-dag-combine.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-dag-combine.ll
@@ -4,19 +4,21 @@
; PR 9817
-declare <4 x i32> @__amdil_get_global_id_int()
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata)
+declare <4 x i32> @__amdil_get_global_id_int()
+declare void @llvm.dbg.value(metadata , i64 , metadata )
define void @__OpenCL_test_kernel(i32 addrspace(1)* %ip) nounwind {
entry:
- call void @llvm.dbg.value(metadata !{i32 addrspace(1)* %ip}, i64 0, metadata !7, metadata !{}), !dbg !8
+ call void @llvm.dbg.value(metadata !{i32 addrspace(1)* %ip}, i64 0, metadata
+!7), !dbg !8
%0 = call <4 x i32> @__amdil_get_global_id_int() nounwind
%1 = extractelement <4 x i32> %0, i32 0
- call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !9, metadata !{}), !dbg !11
- call void @llvm.dbg.value(metadata !12, i64 0, metadata !13, metadata !{}), !dbg !14
+ call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !9), !dbg !11
+ call void @llvm.dbg.value(metadata !12, i64 0, metadata !13), !dbg !14
%tmp2 = load i32 addrspace(1)* %ip, align 4, !dbg !15
%tmp3 = add i32 0, %tmp2, !dbg !15
; CHECK: ##DEBUG_VALUE: idx <- E{{..$}}
- call void @llvm.dbg.value(metadata !{i32 %tmp3}, i64 0, metadata !13, metadata !{}), !dbg !15
+ call void @llvm.dbg.value(metadata !{i32 %tmp3}, i64 0, metadata !13), !dbg
+!15
%arrayidx = getelementptr i32 addrspace(1)* %ip, i32 %1, !dbg !16
store i32 %tmp3, i32 addrspace(1)* %arrayidx, align 4, !dbg !16
ret void, !dbg !17
diff --git a/llvm/test/DebugInfo/X86/dbg-value-inlined-parameter.ll b/llvm/test/DebugInfo/X86/dbg-value-inlined-parameter.ll
index fab58ab..aa37cda 100644
--- a/llvm/test/DebugInfo/X86/dbg-value-inlined-parameter.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-inlined-parameter.ll
@@ -45,8 +45,8 @@
define i32 @foo(%struct.S1* nocapture %sp, i32 %nums) nounwind optsize ssp {
entry:
- tail call void @llvm.dbg.value(metadata !{%struct.S1* %sp}, i64 0, metadata !9, metadata !{}), !dbg !20
- tail call void @llvm.dbg.value(metadata !{i32 %nums}, i64 0, metadata !18, metadata !{}), !dbg !21
+ tail call void @llvm.dbg.value(metadata !{%struct.S1* %sp}, i64 0, metadata !9), !dbg !20
+ tail call void @llvm.dbg.value(metadata !{i32 %nums}, i64 0, metadata !18), !dbg !21
%tmp2 = getelementptr inbounds %struct.S1* %sp, i64 0, i32 1, !dbg !22
store i32 %nums, i32* %tmp2, align 4, !dbg !22
%call = tail call float* @bar(i32 %nums) nounwind optsize, !dbg !27
@@ -61,15 +61,15 @@
define void @foobar() nounwind optsize ssp {
entry:
- tail call void @llvm.dbg.value(metadata !30, i64 0, metadata !9, metadata !{}) nounwind, !dbg !31
- tail call void @llvm.dbg.value(metadata !34, i64 0, metadata !18, metadata !{}) nounwind, !dbg !35
+ tail call void @llvm.dbg.value(metadata !30, i64 0, metadata !9) nounwind, !dbg !31
+ tail call void @llvm.dbg.value(metadata !34, i64 0, metadata !18) nounwind, !dbg !35
store i32 1, i32* getelementptr inbounds (%struct.S1* @p, i64 0, i32 1), align 8, !dbg !36
%call.i = tail call float* @bar(i32 1) nounwind optsize, !dbg !37
store float* %call.i, float** getelementptr inbounds (%struct.S1* @p, i64 0, i32 0), align 8, !dbg !37
ret void, !dbg !38
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!43}
diff --git a/llvm/test/DebugInfo/X86/dbg-value-isel.ll b/llvm/test/DebugInfo/X86/dbg-value-isel.ll
index 0d156ad..9544c62 100644
--- a/llvm/test/DebugInfo/X86/dbg-value-isel.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-isel.ll
@@ -13,7 +13,7 @@
define void @__OpenCL_nbt02_kernel(i32 addrspace(1)* %ip) nounwind {
entry:
- call void @llvm.dbg.value(metadata !{i32 addrspace(1)* %ip}, i64 0, metadata !8, metadata !{}), !dbg !9
+ call void @llvm.dbg.value(metadata !{i32 addrspace(1)* %ip}, i64 0, metadata !8), !dbg !9
%0 = call <4 x i32> @__amdil_get_local_id_int() nounwind
%1 = extractelement <4 x i32> %0, i32 0
br label %2
@@ -28,7 +28,7 @@
get_local_id.exit: ; preds = %4
%6 = phi i32 [ %5, %4 ]
- call void @llvm.dbg.value(metadata !{i32 %6}, i64 0, metadata !10, metadata !{}), !dbg !12
+ call void @llvm.dbg.value(metadata !{i32 %6}, i64 0, metadata !10), !dbg !12
%7 = call <4 x i32> @__amdil_get_global_id_int() nounwind, !dbg !12
%8 = extractelement <4 x i32> %7, i32 0, !dbg !12
br label %9
@@ -43,7 +43,7 @@
get_global_id.exit: ; preds = %11
%13 = phi i32 [ %12, %11 ]
- call void @llvm.dbg.value(metadata !{i32 %13}, i64 0, metadata !13, metadata !{}), !dbg !14
+ call void @llvm.dbg.value(metadata !{i32 %13}, i64 0, metadata !13), !dbg !14
%14 = call <4 x i32> @__amdil_get_local_size_int() nounwind
%15 = extractelement <4 x i32> %14, i32 0
br label %16
@@ -58,7 +58,7 @@
get_local_size.exit: ; preds = %18
%20 = phi i32 [ %19, %18 ]
- call void @llvm.dbg.value(metadata !{i32 %20}, i64 0, metadata !15, metadata !{}), !dbg !16
+ call void @llvm.dbg.value(metadata !{i32 %20}, i64 0, metadata !15), !dbg !16
%tmp5 = add i32 %6, %13, !dbg !17
%tmp7 = add i32 %tmp5, %20, !dbg !17
store i32 %tmp7, i32 addrspace(1)* %ip, align 4, !dbg !17
@@ -68,7 +68,7 @@
ret void, !dbg !18
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
declare <4 x i32> @__amdil_get_local_size_int() nounwind
@@ -76,7 +76,7 @@
declare <4 x i32> @__amdil_get_global_id_int() nounwind
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!22}
diff --git a/llvm/test/DebugInfo/X86/dbg-value-location.ll b/llvm/test/DebugInfo/X86/dbg-value-location.ll
index e4db931..55d1ae6 100644
--- a/llvm/test/DebugInfo/X86/dbg-value-location.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-location.ll
@@ -14,11 +14,11 @@
@dfm = external global i32, align 4
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define i32 @foo(i32 %dev, i64 %cmd, i8* %data, i32 %data2) nounwind optsize ssp {
entry:
- call void @llvm.dbg.value(metadata !{i32 %dev}, i64 0, metadata !12, metadata !{}), !dbg !13
+ call void @llvm.dbg.value(metadata !{i32 %dev}, i64 0, metadata !12), !dbg !13
%tmp.i = load i32* @dfm, align 4, !dbg !14
%cmp.i = icmp eq i32 %tmp.i, 0, !dbg !14
br i1 %cmp.i, label %if.else, label %if.end.i, !dbg !14
@@ -45,7 +45,7 @@
declare hidden fastcc i32 @bar(i32, i32* nocapture) nounwind optsize ssp
declare hidden fastcc i32 @bar2(i32) nounwind optsize ssp
declare hidden fastcc i32 @bar3(i32) nounwind optsize ssp
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!29}
diff --git a/llvm/test/DebugInfo/X86/dbg-value-range.ll b/llvm/test/DebugInfo/X86/dbg-value-range.ll
index 27920d5..caeec0a 100644
--- a/llvm/test/DebugInfo/X86/dbg-value-range.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-range.ll
@@ -4,10 +4,10 @@
define i32 @bar(%struct.a* nocapture %b) nounwind ssp {
entry:
- tail call void @llvm.dbg.value(metadata !{%struct.a* %b}, i64 0, metadata !6, metadata !{}), !dbg !13
+ tail call void @llvm.dbg.value(metadata !{%struct.a* %b}, i64 0, metadata !6), !dbg !13
%tmp1 = getelementptr inbounds %struct.a* %b, i64 0, i32 0, !dbg !14
%tmp2 = load i32* %tmp1, align 4, !dbg !14
- tail call void @llvm.dbg.value(metadata !{i32 %tmp2}, i64 0, metadata !11, metadata !{}), !dbg !14
+ tail call void @llvm.dbg.value(metadata !{i32 %tmp2}, i64 0, metadata !11), !dbg !14
%call = tail call i32 (...)* @foo(i32 %tmp2) nounwind , !dbg !18
%add = add nsw i32 %tmp2, 1, !dbg !19
ret i32 %add, !dbg !19
@@ -15,7 +15,7 @@
declare i32 @foo(...)
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!24}
diff --git a/llvm/test/DebugInfo/X86/dbg-value-terminator.ll b/llvm/test/DebugInfo/X86/dbg-value-terminator.ll
index 2ad75ca..ee8bd0f 100644
--- a/llvm/test/DebugInfo/X86/dbg-value-terminator.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-terminator.ll
@@ -87,7 +87,7 @@
"44.i": ; preds = %"42.i"
%2 = load %a** undef, align 8, !dbg !12
%3 = bitcast %a* %2 to %a*, !dbg !12
- call void @llvm.dbg.value(metadata !{%a* %3}, i64 0, metadata !6, metadata !{}), !dbg !12
+ call void @llvm.dbg.value(metadata !{%a* %3}, i64 0, metadata !6), !dbg !12
br label %may_unswitch_on.exit, !dbg !12
"45.i": ; preds = %"38.i"
@@ -108,7 +108,7 @@
attributes #0 = { nounwind readnone }
attributes #1 = { nounwind uwtable }
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!22}
diff --git a/llvm/test/DebugInfo/X86/dbg_value_direct.ll b/llvm/test/DebugInfo/X86/dbg_value_direct.ll
index 56fd5aa..0ab48df 100644
--- a/llvm/test/DebugInfo/X86/dbg_value_direct.ll
+++ b/llvm/test/DebugInfo/X86/dbg_value_direct.ll
@@ -53,7 +53,7 @@
%19 = inttoptr i64 %18 to i8*
%20 = load i8* %19
%21 = icmp ne i8 %20, 0
- call void @llvm.dbg.declare(metadata !{i32* %3}, metadata !23, metadata !28)
+ call void @llvm.dbg.declare(metadata !{i32* %3}, metadata !23)
br i1 %21, label %22, label %28
; <label>:22 ; preds = %entry
@@ -70,7 +70,7 @@
; <label>:28 ; preds = %22, %entry
store i32 %0, i32* %3, align 4
- call void @llvm.dbg.declare(metadata !{%struct.A* %agg.result}, metadata !24, metadata !{}), !dbg !25
+ call void @llvm.dbg.declare(metadata !{%struct.A* %agg.result}, metadata !24), !dbg !25
call void @_ZN1AC1Ev(%struct.A* %agg.result), !dbg !25
store i64 1172321806, i64* %4, !dbg !26
%29 = inttoptr i64 %10 to i32*, !dbg !26
@@ -85,7 +85,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
declare void @_ZN1AC1Ev(%struct.A*) #2
@@ -170,9 +170,9 @@
!20 = metadata !{i32 786468}
!21 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed]
!22 = metadata !{i32 2, metadata !"Dwarf Version", i32 3}
-!23 = metadata !{i32 786689, metadata !4, metadata !"", metadata !5, i32 16777222, metadata !21, i32 0, i32 0} ;; [ DW_TAG_arg_variable ] [line 6]
+!23 = metadata !{i32 786689, metadata !4, metadata !"", metadata !5, i32 16777222, metadata !21, i32 0, i32 0, metadata !28} ; [ DW_TAG_arg_variable ] [line 6]
!24 = metadata !{i32 786688, metadata !4, metadata !"a", metadata !5, i32 7, metadata !8, i32 8192, i32 0} ; [ DW_TAG_auto_variable ] [a] [line 7]
!25 = metadata !{i32 7, i32 0, metadata !4, null}
!26 = metadata !{i32 8, i32 0, metadata !4, null} ; [ DW_TAG_imported_declaration ]
!27 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
-!28 = metadata !{i32 786690, i64 6} ; [DW_OP_deref]
+!28 = metadata !{i64 2}
diff --git a/llvm/test/DebugInfo/X86/debug-info-block-captured-self.ll b/llvm/test/DebugInfo/X86/debug-info-block-captured-self.ll
index 9587a6d..95eda60 100644
--- a/llvm/test/DebugInfo/X86/debug-info-block-captured-self.ll
+++ b/llvm/test/DebugInfo/X86/debug-info-block-captured-self.ll
@@ -63,18 +63,18 @@
; ModuleID = 'llvm/tools/clang/test/CodeGenObjC/debug-info-block-captured-self.m'
%0 = type opaque
%struct.__block_descriptor = type { i64, i64 }
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
define internal void @"__24-[Main initWithContext:]_block_invoke"(i8* %.block_descriptor, i8* %obj) #0 {
%block = bitcast i8* %.block_descriptor to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>*, !dbg !84
%block.captured-self = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %block, i32 0, i32 5, !dbg !84
- call void @llvm.dbg.declare(metadata !{<{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %block}, metadata !86, metadata !110), !dbg !87
+ call void @llvm.dbg.declare(metadata !{<{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %block}, metadata !86), !dbg !87
ret void, !dbg !87
}
define internal void @"__24-[Main initWithContext:]_block_invoke_2"(i8* %.block_descriptor, i8* %object) #0 {
%block = bitcast i8* %.block_descriptor to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>*, !dbg !103
%block.captured-self = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %block, i32 0, i32 5, !dbg !103
- call void @llvm.dbg.declare(metadata !{<{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %block}, metadata !105, metadata !109), !dbg !106
+ call void @llvm.dbg.declare(metadata !{<{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %block}, metadata !105), !dbg !106
ret void, !dbg !106
}
@@ -101,12 +101,12 @@
!41 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from ]
!42 = metadata !{i32 786478, metadata !1, metadata !1, metadata !"__24-[Main initWithContext:]_block_invoke_2", metadata !"__24-[Main initWithContext:]_block_invoke_2", metadata !"", i32 35, metadata !39, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (i8*, i8*)* @"__24-[Main initWithContext:]_block_invoke_2", null, null, metadata !15, i32 35} ; [ DW_TAG_subprogram ] [line 35] [local] [def] [__24-[Main initWithContext:]_block_invoke_2]
!84 = metadata !{i32 33, i32 0, metadata !38, null}
-!86 = metadata !{i32 786688, metadata !38, metadata !"self", metadata !1, i32 41, metadata !34, i32 0, i32 0} ;; [ DW_TAG_auto_variable ] [self] [line 41]
+!86 = metadata !{i32 786688, metadata !38, metadata !"self", metadata !1, i32 41, metadata !34, i32 0, i32 0, metadata !110} ; [ DW_TAG_auto_variable ] [self] [line 41]
!87 = metadata !{i32 41, i32 0, metadata !38, null}
!103 = metadata !{i32 35, i32 0, metadata !42, null}
-!105 = metadata !{i32 786688, metadata !42, metadata !"self", metadata !1, i32 40, metadata !34, i32 0, i32 0} ;; [ DW_TAG_auto_variable ] [self] [line 40]
+!105 = metadata !{i32 786688, metadata !42, metadata !"self", metadata !1, i32 40, metadata !34, i32 0, i32 0, metadata !109} ; [ DW_TAG_auto_variable ] [self] [line 40]
!106 = metadata !{i32 40, i32 0, metadata !42, null}
!107 = metadata !{metadata !"llvm/tools/clang/test/CodeGenObjC/debug-info-block-captured-self.m", metadata !""}
!108 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
-!109 = metadata !{i32 786690, i64 34, i64 32} ; [DW_OP_plus 32]
-!110 = metadata !{i32 786690, i64 34, i64 32} ; [DW_OP_plus 32]
+!109 = metadata !{i64 1, i64 32}
+!110 = metadata !{i64 1, i64 32}
diff --git a/llvm/test/DebugInfo/X86/debug-info-blocks.ll b/llvm/test/DebugInfo/X86/debug-info-blocks.ll
index 1417d06..8f4784d 100644
--- a/llvm/test/DebugInfo/X86/debug-info-blocks.ll
+++ b/llvm/test/DebugInfo/X86/debug-info-blocks.ll
@@ -101,9 +101,9 @@
%3 = alloca %struct._objc_super
%4 = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>, align 8
store %0* %self, %0** %1, align 8
- call void @llvm.dbg.declare(metadata !{%0** %1}, metadata !60, metadata !{}), !dbg !62
+ call void @llvm.dbg.declare(metadata !{%0** %1}, metadata !60), !dbg !62
store i8* %_cmd, i8** %2, align 8
- call void @llvm.dbg.declare(metadata !{i8** %2}, metadata !63, metadata !{}), !dbg !62
+ call void @llvm.dbg.declare(metadata !{i8** %2}, metadata !63), !dbg !62
%5 = load %0** %1, !dbg !65
%6 = bitcast %0* %5 to i8*, !dbg !65
%7 = getelementptr inbounds %struct._objc_super* %3, i32 0, i32 0, !dbg !65
@@ -143,14 +143,14 @@
ret i8* %26, !dbg !71
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
declare i8* @objc_msgSendSuper2(%struct._objc_super*, i8*, ...)
define internal void @run(void ()* %block) #0 {
%1 = alloca void ()*, align 8
store void ()* %block, void ()** %1, align 8
- call void @llvm.dbg.declare(metadata !{void ()** %1}, metadata !72, metadata !{}), !dbg !73
+ call void @llvm.dbg.declare(metadata !{void ()** %1}, metadata !72), !dbg !73
%2 = load void ()** %1, align 8, !dbg !74
%3 = bitcast void ()* %2 to %struct.__block_literal_generic*, !dbg !74
%4 = getelementptr inbounds %struct.__block_literal_generic* %3, i32 0, i32 3, !dbg !74
@@ -167,13 +167,13 @@
%d = alloca %1*, align 8
store i8* %.block_descriptor, i8** %1, align 8
%3 = load i8** %1
- call void @llvm.dbg.value(metadata !{i8* %3}, i64 0, metadata !76, metadata !{}), !dbg !88
- call void @llvm.dbg.declare(metadata !{i8* %.block_descriptor}, metadata !76, metadata !{}), !dbg !88
+ call void @llvm.dbg.value(metadata !{i8* %3}, i64 0, metadata !76), !dbg !88
+ call void @llvm.dbg.declare(metadata !{i8* %.block_descriptor}, metadata !76), !dbg !88
%4 = bitcast i8* %.block_descriptor to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>*, !dbg !88
store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %4, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>** %2, align 8, !dbg !88
%5 = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %4, i32 0, i32 5, !dbg !88
- call void @llvm.dbg.declare(metadata !{<{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>** %2}, metadata !89, metadata !111), !dbg !90
- call void @llvm.dbg.declare(metadata !{%1** %d}, metadata !91, metadata !{}), !dbg !100
+ call void @llvm.dbg.declare(metadata !{<{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>** %2}, metadata !89), !dbg !90
+ call void @llvm.dbg.declare(metadata !{%1** %d}, metadata !91), !dbg !100
%6 = load %struct._class_t** @"\01L_OBJC_CLASSLIST_REFERENCES_$_", !dbg !100
%7 = bitcast %struct._class_t* %6 to i8*, !dbg !100
%8 = load i8** getelementptr inbounds (%struct._message_ref_t* bitcast ({ i8* (i8*, %struct._message_ref_t*, ...)*, i8* }* @"\01l_objc_msgSend_fixup_alloc" to %struct._message_ref_t*), i32 0, i32 0), !dbg !100
@@ -200,7 +200,7 @@
ret void, !dbg !90
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata) #1
declare i8* @objc_msgSend_fixup(i8*, %struct._message_ref_t*, ...)
@@ -210,9 +210,9 @@
%3 = alloca i8*, align 8
%4 = alloca i8*, align 8
store i8* %0, i8** %3, align 8
- call void @llvm.dbg.declare(metadata !{i8** %3}, metadata !102, metadata !{}), !dbg !103
+ call void @llvm.dbg.declare(metadata !{i8** %3}, metadata !102), !dbg !103
store i8* %1, i8** %4, align 8
- call void @llvm.dbg.declare(metadata !{i8** %4}, metadata !104, metadata !{}), !dbg !103
+ call void @llvm.dbg.declare(metadata !{i8** %4}, metadata !104), !dbg !103
%5 = load i8** %4, !dbg !103
%6 = bitcast i8* %5 to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>*, !dbg !103
%7 = load i8** %3, !dbg !103
@@ -231,7 +231,7 @@
define internal void @__destroy_helper_block_(i8*) {
%2 = alloca i8*, align 8
store i8* %0, i8** %2, align 8
- call void @llvm.dbg.declare(metadata !{i8** %2}, metadata !105, metadata !{}), !dbg !106
+ call void @llvm.dbg.declare(metadata !{i8** %2}, metadata !105), !dbg !106
%3 = load i8** %2, !dbg !106
%4 = bitcast i8* %3 to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>*, !dbg !106
%5 = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %4, i32 0, i32 5, !dbg !106
@@ -247,7 +247,7 @@
%1 = alloca i32, align 4
%a = alloca %0*, align 8
store i32 0, i32* %1
- call void @llvm.dbg.declare(metadata !{%0** %a}, metadata !107, metadata !{}), !dbg !108
+ call void @llvm.dbg.declare(metadata !{%0** %a}, metadata !107), !dbg !108
%2 = load %struct._class_t** @"\01L_OBJC_CLASSLIST_REFERENCES_$_5", !dbg !108
%3 = bitcast %struct._class_t* %2 to i8*, !dbg !108
%4 = load i8** getelementptr inbounds (%struct._message_ref_t* bitcast ({ i8* (i8*, %struct._message_ref_t*, ...)*, i8* }* @"\01l_objc_msgSend_fixup_alloc" to %struct._message_ref_t*), i32 0, i32 0), !dbg !108
@@ -359,7 +359,7 @@
!86 = metadata !{i32 786451, metadata !1, null, metadata !"__block_descriptor_withcopydispose", i32 49, i64 0, i64 0, i32 0, i32 4, null, null, i32 0, null, null, null} ; [ DW_TAG_structure_type ] [__block_descriptor_withcopydispose] [line 49, size 0, align 0, offset 0] [decl] [from ]
!87 = metadata !{i32 786445, metadata !5, metadata !6, metadata !"self", i32 49, i64 64, i64 64, i64 256, i32 0, metadata !61} ; [ DW_TAG_member ] [self] [line 49, size 64, align 64, offset 256] [from ]
!88 = metadata !{i32 49, i32 0, metadata !27, null}
-!89 = metadata !{i32 786688, metadata !27, metadata !"self", metadata !32, i32 52, metadata !23, i32 0, i32 0} ;; [ DW_TAG_auto_variable ] [self] [line 52]
+!89 = metadata !{i32 786688, metadata !27, metadata !"self", metadata !32, i32 52, metadata !23, i32 0, i32 0, metadata !111} ; [ DW_TAG_auto_variable ] [self] [line 52]
!90 = metadata !{i32 52, i32 0, metadata !27, null}
!91 = metadata !{i32 786688, metadata !92, metadata !"d", metadata !6, i32 50, metadata !93, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [d] [line 50]
!92 = metadata !{i32 786443, metadata !5, metadata !27, i32 49, i32 0, i32 2} ; [ DW_TAG_lexical_block ] [llvm/tools/clang/test/CodeGenObjC/debug-info-blocks.m]
@@ -381,4 +381,4 @@
!108 = metadata !{i32 61, i32 0, metadata !36, null}
!109 = metadata !{i32 62, i32 0, metadata !36, null}
!110 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
-!111 = metadata !{i32 786690, i64 6, i64 34, i64 32} ; [DW_OP_deref DW_OP_plus 32]
+!111 = metadata !{i64 2, i64 1, i64 32}
diff --git a/llvm/test/DebugInfo/X86/debug-info-static-member.ll b/llvm/test/DebugInfo/X86/debug-info-static-member.ll
index 1193f7d..cd0197f 100644
--- a/llvm/test/DebugInfo/X86/debug-info-static-member.ll
+++ b/llvm/test/DebugInfo/X86/debug-info-static-member.ll
@@ -47,14 +47,14 @@
%retval = alloca i32, align 4
%instance_C = alloca %class.C, align 4
store i32 0, i32* %retval
- call void @llvm.dbg.declare(metadata !{%class.C* %instance_C}, metadata !29, metadata !{}), !dbg !30
+ call void @llvm.dbg.declare(metadata !{%class.C* %instance_C}, metadata !29), !dbg !30
%d = getelementptr inbounds %class.C* %instance_C, i32 0, i32 0, !dbg !31
store i32 8, i32* %d, align 4, !dbg !31
%0 = load i32* @_ZN1C1cE, align 4, !dbg !32
ret i32 %0, !dbg !32
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!34}
diff --git a/llvm/test/DebugInfo/X86/debug-loc-asan.ll b/llvm/test/DebugInfo/X86/debug-loc-asan.ll
index 620646c..b1980ec 100644
--- a/llvm/test/DebugInfo/X86/debug-loc-asan.ll
+++ b/llvm/test/DebugInfo/X86/debug-loc-asan.ll
@@ -81,7 +81,7 @@
%21 = inttoptr i64 %20 to i8*
%22 = load i8* %21
%23 = icmp ne i8 %22, 0
- call void @llvm.dbg.declare(metadata !{i32* %8}, metadata !12, metadata !14)
+ call void @llvm.dbg.declare(metadata !{i32* %8}, metadata !12)
br i1 %23, label %24, label %30
; <label>:24 ; preds = %5
@@ -147,7 +147,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
define internal void @asan.module_ctor() {
call void @__asan_init_v3()
@@ -181,6 +181,6 @@
!9 = metadata !{i32 2, metadata !"Dwarf Version", i32 4}
!10 = metadata !{i32 2, metadata !"Debug Info Version", i32 1}
!11 = metadata !{metadata !"clang version 3.5.0 (209308)"}
-!12 = metadata !{i32 786689, metadata !4, metadata !"y", metadata !5, i32 16777217, metadata !8, i32 0, i32 0} ;; [ DW_TAG_arg_variable ] [y] [line 1]
+!12 = metadata !{i32 786689, metadata !4, metadata !"y", metadata !5, i32 16777217, metadata !8, i32 0, i32 0, metadata !14} ; [ DW_TAG_arg_variable ] [y] [line 1]
!13 = metadata !{i32 2, i32 0, metadata !4, null}
-!14 = metadata !{i32 786690, i64 6} ; [DW_OP_deref]
+!14 = metadata !{i64 2}
diff --git a/llvm/test/DebugInfo/X86/debug-loc-offset.ll b/llvm/test/DebugInfo/X86/debug-loc-offset.ll
index c2629f4..7866d0e 100644
--- a/llvm/test/DebugInfo/X86/debug-loc-offset.ll
+++ b/llvm/test/DebugInfo/X86/debug-loc-offset.ll
@@ -64,20 +64,20 @@
entry:
%b.addr = alloca i32, align 4
store i32 %b, i32* %b.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %b.addr}, metadata !21, metadata !{}), !dbg !22
+ call void @llvm.dbg.declare(metadata !{i32* %b.addr}, metadata !21), !dbg !22
%0 = load i32* %b.addr, align 4, !dbg !23
%add = add nsw i32 %0, 4, !dbg !23
ret i32 %add, !dbg !23
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
define void @_Z3baz1A(%struct.A* %a) #2 {
entry:
%z = alloca i32, align 4
- call void @llvm.dbg.declare(metadata !{%struct.A* %a}, metadata !24, metadata !{}), !dbg !25
- call void @llvm.dbg.declare(metadata !{i32* %z}, metadata !26, metadata !{}), !dbg !27
+ call void @llvm.dbg.declare(metadata !{%struct.A* %a}, metadata !24), !dbg !25
+ call void @llvm.dbg.declare(metadata !{i32* %z}, metadata !26), !dbg !27
store i32 2, i32* %z, align 4, !dbg !27
%var = getelementptr inbounds %struct.A* %a, i32 0, i32 1, !dbg !28
%0 = load i32* %var, align 4, !dbg !28
diff --git a/llvm/test/DebugInfo/X86/debug-ranges-offset.ll b/llvm/test/DebugInfo/X86/debug-ranges-offset.ll
index 51219d7..365ba17 100644
--- a/llvm/test/DebugInfo/X86/debug-ranges-offset.ll
+++ b/llvm/test/DebugInfo/X86/debug-ranges-offset.ll
@@ -31,11 +31,11 @@
%call = call i8* @_Znwm(i64 4) #4, !dbg !19
%_msret = load i64* getelementptr inbounds ([8 x i64]* @__msan_retval_tls, i64 0, i64 0), align 8, !dbg !19
%3 = bitcast i8* %call to i32*, !dbg !19
- tail call void @llvm.dbg.value(metadata !{i32* %3}, i64 0, metadata !9, metadata !{}), !dbg !19
+ tail call void @llvm.dbg.value(metadata !{i32* %3}, i64 0, metadata !9), !dbg !19
%4 = inttoptr i64 %1 to i64*, !dbg !19
store i64 %_msret, i64* %4, align 8, !dbg !19
store volatile i32* %3, i32** %p, align 8, !dbg !19
- tail call void @llvm.dbg.value(metadata !{i32** %p}, i64 0, metadata !9, metadata !{}), !dbg !19
+ tail call void @llvm.dbg.value(metadata !{i32** %p}, i64 0, metadata !9), !dbg !19
%p.0.p.0. = load volatile i32** %p, align 8, !dbg !20
%_msld = load i64* %4, align 8, !dbg !20
%_mscmp = icmp eq i64 %_msld, 0, !dbg !20
@@ -96,11 +96,11 @@
%call.i = call i8* @_Znwm(i64 4) #4, !dbg !30
%_msret = load i64* getelementptr inbounds ([8 x i64]* @__msan_retval_tls, i64 0, i64 0), align 8, !dbg !30
%3 = bitcast i8* %call.i to i32*, !dbg !30
- tail call void @llvm.dbg.value(metadata !{i32* %3}, i64 0, metadata !32, metadata !{}), !dbg !30
+ tail call void @llvm.dbg.value(metadata !{i32* %3}, i64 0, metadata !32), !dbg !30
%4 = inttoptr i64 %1 to i64*, !dbg !30
store i64 %_msret, i64* %4, align 8, !dbg !30
store volatile i32* %3, i32** %p.i, align 8, !dbg !30
- tail call void @llvm.dbg.value(metadata !{i32** %p.i}, i64 0, metadata !32, metadata !{}), !dbg !30
+ tail call void @llvm.dbg.value(metadata !{i32** %p.i}, i64 0, metadata !32), !dbg !30
%p.i.0.p.0.p.0..i = load volatile i32** %p.i, align 8, !dbg !33
%_msld = load i64* %4, align 8, !dbg !33
%_mscmp = icmp eq i64 %_msld, 0, !dbg !33
@@ -148,7 +148,7 @@
declare void @__msan_init()
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
+declare void @llvm.dbg.value(metadata, i64, metadata) #2
; Function Attrs: nounwind
declare i32 @puts(i8* nocapture readonly) #3
diff --git a/llvm/test/DebugInfo/X86/decl-derived-member.ll b/llvm/test/DebugInfo/X86/decl-derived-member.ll
index 2933ade..4035602 100644
--- a/llvm/test/DebugInfo/X86/decl-derived-member.ll
+++ b/llvm/test/DebugInfo/X86/decl-derived-member.ll
@@ -37,7 +37,7 @@
entry:
%this.addr = alloca %struct.foo*, align 8
store %struct.foo* %this, %struct.foo** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.foo** %this.addr}, metadata !36, metadata !{}), !dbg !38
+ call void @llvm.dbg.declare(metadata !{%struct.foo** %this.addr}, metadata !36), !dbg !38
%this1 = load %struct.foo** %this.addr
%b = getelementptr inbounds %struct.foo* %this1, i32 0, i32 0, !dbg !39
call void @_ZN4baseC2Ev(%struct.base* %b) #2, !dbg !39
@@ -49,7 +49,7 @@
entry:
%this.addr = alloca %struct.foo*, align 8
store %struct.foo* %this, %struct.foo** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.foo** %this.addr}, metadata !40, metadata !{}), !dbg !41
+ call void @llvm.dbg.declare(metadata !{%struct.foo** %this.addr}, metadata !40), !dbg !41
%this1 = load %struct.foo** %this.addr
%b = getelementptr inbounds %struct.foo* %this1, i32 0, i32 0, !dbg !42
call void @_ZN4baseD1Ev(%struct.base* %b), !dbg !42
@@ -60,7 +60,7 @@
declare i32 @__cxa_atexit(void (i8*)*, i8*, i8*) #2
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #3
+declare void @llvm.dbg.declare(metadata, metadata) #3
declare void @_ZN4baseD1Ev(%struct.base*) #4
@@ -69,7 +69,7 @@
entry:
%this.addr = alloca %struct.base*, align 8
store %struct.base* %this, %struct.base** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.base** %this.addr}, metadata !45, metadata !{}), !dbg !47
+ call void @llvm.dbg.declare(metadata !{%struct.base** %this.addr}, metadata !45), !dbg !47
%this1 = load %struct.base** %this.addr
%0 = bitcast %struct.base* %this1 to i8***, !dbg !48
store i8** getelementptr inbounds ([4 x i8*]* @_ZTV4base, i64 0, i64 2), i8*** %0, !dbg !48
diff --git a/llvm/test/DebugInfo/X86/dwarf-aranges-no-dwarf-labels.ll b/llvm/test/DebugInfo/X86/dwarf-aranges-no-dwarf-labels.ll
index 8aedb87..5a9f444 100644
--- a/llvm/test/DebugInfo/X86/dwarf-aranges-no-dwarf-labels.ll
+++ b/llvm/test/DebugInfo/X86/dwarf-aranges-no-dwarf-labels.ll
@@ -28,14 +28,14 @@
; Function Attrs: nounwind readnone uwtable
define i32 @_Z3fooi(i32 %bar) #0 {
entry:
- tail call void @llvm.dbg.value(metadata !{i32 %bar}, i64 0, metadata !10, metadata !{}), !dbg !20
+ tail call void @llvm.dbg.value(metadata !{i32 %bar}, i64 0, metadata !10), !dbg !20
ret i32 %bar, !dbg !20
}
; Function Attrs: nounwind readnone uwtable
define i32 @_Z4foo2i(i32 %bar2) #0 {
entry:
- tail call void @llvm.dbg.value(metadata !{i32 %bar2}, i64 0, metadata !13, metadata !{}), !dbg !21
+ tail call void @llvm.dbg.value(metadata !{i32 %bar2}, i64 0, metadata !13), !dbg !21
ret i32 %bar2, !dbg !21
}
@@ -51,7 +51,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
+declare void @llvm.dbg.value(metadata, i64, metadata) #2
attributes #0 = { nounwind readnone uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readonly uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
diff --git a/llvm/test/DebugInfo/X86/dwarf-public-names.ll b/llvm/test/DebugInfo/X86/dwarf-public-names.ll
index 50a37d0..793971a 100644
--- a/llvm/test/DebugInfo/X86/dwarf-public-names.ll
+++ b/llvm/test/DebugInfo/X86/dwarf-public-names.ll
@@ -62,13 +62,13 @@
entry:
%this.addr = alloca %struct.C*, align 8
store %struct.C* %this, %struct.C** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr}, metadata !28, metadata !{}), !dbg !30
+ call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr}, metadata !28), !dbg !30
%this1 = load %struct.C** %this.addr
store i32 0, i32* @_ZN1C22static_member_variableE, align 4, !dbg !31
ret void, !dbg !32
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define i32 @_ZN1C22static_member_functionEv() nounwind uwtable align 2 {
entry:
diff --git a/llvm/test/DebugInfo/X86/earlydup-crash.ll b/llvm/test/DebugInfo/X86/earlydup-crash.ll
index c2b4336..b5dc01e 100644
--- a/llvm/test/DebugInfo/X86/earlydup-crash.ll
+++ b/llvm/test/DebugInfo/X86/earlydup-crash.ll
@@ -4,7 +4,7 @@
%struct.cpp_dir = type { %struct.cpp_dir*, i8*, i32, i8, i8**, i8*, i8* (i8*, %struct.cpp_dir*)*, i64, i32, i8 }
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
define internal i8* @framework_construct_pathname(i8* %fname, %struct.cpp_dir* %dir) nounwind ssp {
entry:
@@ -13,7 +13,7 @@
bb: ; preds = %entry
%tmp = icmp eq i32 undef, 0
%tmp1 = add i32 0, 11
- call void @llvm.dbg.value(metadata !{i32 %tmp1}, i64 0, metadata !0, metadata !{})
+ call void @llvm.dbg.value(metadata !{i32 %tmp1}, i64 0, metadata !0)
br i1 undef, label %bb18, label %bb31.preheader
bb31.preheader: ; preds = %bb19, %bb
diff --git a/llvm/test/DebugInfo/X86/elf-names.ll b/llvm/test/DebugInfo/X86/elf-names.ll
index 392dc0f..36fd232 100644
--- a/llvm/test/DebugInfo/X86/elf-names.ll
+++ b/llvm/test/DebugInfo/X86/elf-names.ll
@@ -22,7 +22,7 @@
define void @_ZN1DC2Ev(%class.D* nocapture %this) unnamed_addr nounwind uwtable align 2 {
entry:
- tail call void @llvm.dbg.value(metadata !{%class.D* %this}, i64 0, metadata !29, metadata !{}), !dbg !36
+ tail call void @llvm.dbg.value(metadata !{%class.D* %this}, i64 0, metadata !29), !dbg !36
%c1 = getelementptr inbounds %class.D* %this, i64 0, i32 0, !dbg !37
store i32 1, i32* %c1, align 4, !dbg !37
%c2 = getelementptr inbounds %class.D* %this, i64 0, i32 1, !dbg !42
@@ -36,8 +36,8 @@
define void @_ZN1DC2ERKS_(%class.D* nocapture %this, %class.D* nocapture %d) unnamed_addr nounwind uwtable align 2 {
entry:
- tail call void @llvm.dbg.value(metadata !{%class.D* %this}, i64 0, metadata !34, metadata !{}), !dbg !46
- tail call void @llvm.dbg.value(metadata !{%class.D* %d}, i64 0, metadata !35, metadata !{}), !dbg !46
+ tail call void @llvm.dbg.value(metadata !{%class.D* %this}, i64 0, metadata !34), !dbg !46
+ tail call void @llvm.dbg.value(metadata !{%class.D* %d}, i64 0, metadata !35), !dbg !46
%c1 = getelementptr inbounds %class.D* %d, i64 0, i32 0, !dbg !47
%0 = load i32* %c1, align 4, !dbg !47
%c12 = getelementptr inbounds %class.D* %this, i64 0, i32 0, !dbg !47
@@ -57,7 +57,7 @@
ret void, !dbg !52
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!54}
diff --git a/llvm/test/DebugInfo/X86/empty-and-one-elem-array.ll b/llvm/test/DebugInfo/X86/empty-and-one-elem-array.ll
index bea29b2..48379ab 100644
--- a/llvm/test/DebugInfo/X86/empty-and-one-elem-array.ll
+++ b/llvm/test/DebugInfo/X86/empty-and-one-elem-array.ll
@@ -9,8 +9,8 @@
entry:
%my_foo = alloca %struct.foo, align 4
%my_bar = alloca %struct.bar, align 4
- call void @llvm.dbg.declare(metadata !{%struct.foo* %my_foo}, metadata !10, metadata !{}), !dbg !19
- call void @llvm.dbg.declare(metadata !{%struct.bar* %my_bar}, metadata !20, metadata !{}), !dbg !28
+ call void @llvm.dbg.declare(metadata !{%struct.foo* %my_foo}, metadata !10), !dbg !19
+ call void @llvm.dbg.declare(metadata !{%struct.bar* %my_bar}, metadata !20), !dbg !28
%a = getelementptr inbounds %struct.foo* %my_foo, i32 0, i32 0, !dbg !29
store i32 3, i32* %a, align 4, !dbg !29
%a1 = getelementptr inbounds %struct.bar* %my_bar, i32 0, i32 0, !dbg !30
@@ -23,7 +23,7 @@
ret i32 %add, !dbg !31
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
; CHECK: DW_TAG_base_type
; CHECK-NEXT: DW_AT_name [DW_FORM_strp] ( .debug_str[{{.*}}] = "int")
diff --git a/llvm/test/DebugInfo/X86/ending-run.ll b/llvm/test/DebugInfo/X86/ending-run.ll
index d83cf2a..165074e 100644
--- a/llvm/test/DebugInfo/X86/ending-run.ll
+++ b/llvm/test/DebugInfo/X86/ending-run.ll
@@ -13,8 +13,8 @@
%x.addr = alloca i32, align 4
%y = alloca i32, align 4
store i32 %x, i32* %x.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %x.addr}, metadata !12, metadata !{}), !dbg !13
- call void @llvm.dbg.declare(metadata !{i32* %y}, metadata !14, metadata !{}), !dbg !16
+ call void @llvm.dbg.declare(metadata !{i32* %x.addr}, metadata !12), !dbg !13
+ call void @llvm.dbg.declare(metadata !{i32* %y}, metadata !14), !dbg !16
%0 = load i32* %x.addr, align 4, !dbg !17
%1 = load i32* %x.addr, align 4, !dbg !17
%mul = mul nsw i32 %0, %1, !dbg !17
@@ -24,7 +24,7 @@
ret i32 %sub, !dbg !18
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!20}
diff --git a/llvm/test/DebugInfo/X86/fission-ranges.ll b/llvm/test/DebugInfo/X86/fission-ranges.ll
index f1359ee..482ed8f 100644
--- a/llvm/test/DebugInfo/X86/fission-ranges.ll
+++ b/llvm/test/DebugInfo/X86/fission-ranges.ll
@@ -91,8 +91,8 @@
; Function Attrs: nounwind uwtable
define internal fastcc void @foo() #0 {
entry:
- tail call void @llvm.dbg.value(metadata !29, i64 0, metadata !13, metadata !{}), !dbg !30
- tail call void @llvm.dbg.value(metadata !44, i64 0, metadata !14, metadata !{}), !dbg !31
+ tail call void @llvm.dbg.value(metadata !29, i64 0, metadata !13), !dbg !30
+ tail call void @llvm.dbg.value(metadata !44, i64 0, metadata !14), !dbg !31
%c.promoted9 = load i32* @c, align 4, !dbg !32, !tbaa !33
br label %for.cond1.preheader, !dbg !31
@@ -114,28 +114,28 @@
for.body9: ; preds = %for.body9, %for.cond7.preheader
%and2 = phi i32 [ %and.lcssa5, %for.cond7.preheader ], [ %and, %for.body9 ], !dbg !40
%e.01 = phi i32 [ 0, %for.cond7.preheader ], [ %inc, %for.body9 ]
- tail call void @llvm.dbg.value(metadata !41, i64 0, metadata !19, metadata !{}), !dbg !40
+ tail call void @llvm.dbg.value(metadata !41, i64 0, metadata !19), !dbg !40
%and = and i32 %and2, 1, !dbg !32
%inc = add i32 %e.01, 1, !dbg !39
- tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !18, metadata !{}), !dbg !39
+ tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !18), !dbg !39
%exitcond = icmp eq i32 %inc, 30, !dbg !39
br i1 %exitcond, label %for.inc10, label %for.body9, !dbg !39
for.inc10: ; preds = %for.body9
%inc11 = add nsw i32 %b.03, 1, !dbg !38
- tail call void @llvm.dbg.value(metadata !{i32 %inc11}, i64 0, metadata !15, metadata !{}), !dbg !38
+ tail call void @llvm.dbg.value(metadata !{i32 %inc11}, i64 0, metadata !15), !dbg !38
%exitcond11 = icmp eq i32 %inc11, 30, !dbg !38
br i1 %exitcond11, label %for.inc13, label %for.cond7.preheader, !dbg !38
for.inc13: ; preds = %for.inc10
%inc14 = add i32 %d.06, 1, !dbg !37
- tail call void @llvm.dbg.value(metadata !{i32 %inc14}, i64 0, metadata !16, metadata !{}), !dbg !37
+ tail call void @llvm.dbg.value(metadata !{i32 %inc14}, i64 0, metadata !16), !dbg !37
%exitcond12 = icmp eq i32 %inc14, 30, !dbg !37
br i1 %exitcond12, label %for.inc16, label %for.cond4.preheader, !dbg !37
for.inc16: ; preds = %for.inc13
%inc17 = add nsw i32 %a.08, 1, !dbg !31
- tail call void @llvm.dbg.value(metadata !{i32 %inc17}, i64 0, metadata !14, metadata !{}), !dbg !31
+ tail call void @llvm.dbg.value(metadata !{i32 %inc17}, i64 0, metadata !14), !dbg !31
%exitcond13 = icmp eq i32 %inc17, 30, !dbg !31
br i1 %exitcond13, label %for.end18, label %for.cond1.preheader, !dbg !31
@@ -145,7 +145,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata) #1
attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/formal_parameter.ll b/llvm/test/DebugInfo/X86/formal_parameter.ll
index 4bfb0a2..2fdab7a 100644
--- a/llvm/test/DebugInfo/X86/formal_parameter.ll
+++ b/llvm/test/DebugInfo/X86/formal_parameter.ll
@@ -28,7 +28,7 @@
entry:
%map.addr = alloca i32, align 4
store i32 %map, i32* %map.addr, align 4, !tbaa !15
- call void @llvm.dbg.declare(metadata !{i32* %map.addr}, metadata !10, metadata !{}), !dbg !14
+ call void @llvm.dbg.declare(metadata !{i32* %map.addr}, metadata !10), !dbg !14
%call = call i32 (i32*, ...)* bitcast (i32 (...)* @lookup to i32 (i32*, ...)*)(i32* %map.addr) #3, !dbg !19
; Ensure that all dbg intrinsics have the same scope after
; LowerDbgDeclare is finished with them.
@@ -42,14 +42,14 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
declare i32 @lookup(...)
declare i32 @verify(...)
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata) #1
attributes #0 = { nounwind ssp uwtable }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/generate-odr-hash.ll b/llvm/test/DebugInfo/X86/generate-odr-hash.ll
index 8501efe..5f58741 100644
--- a/llvm/test/DebugInfo/X86/generate-odr-hash.ll
+++ b/llvm/test/DebugInfo/X86/generate-odr-hash.ll
@@ -182,12 +182,12 @@
define void @_Z3foov() #0 {
entry:
%b = alloca %struct.baz, align 1
- call void @llvm.dbg.declare(metadata !{%struct.baz* %b}, metadata !46, metadata !{}), !dbg !48
+ call void @llvm.dbg.declare(metadata !{%struct.baz* %b}, metadata !46), !dbg !48
ret void, !dbg !49
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
define internal void @__cxx_global_var_init() section ".text.startup" {
entry:
@@ -200,7 +200,7 @@
entry:
%this.addr = alloca %"struct.<anonymous namespace>::walrus"*, align 8
store %"struct.<anonymous namespace>::walrus"* %this, %"struct.<anonymous namespace>::walrus"** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%"struct.<anonymous namespace>::walrus"** %this.addr}, metadata !51, metadata !{}), !dbg !53
+ call void @llvm.dbg.declare(metadata !{%"struct.<anonymous namespace>::walrus"** %this.addr}, metadata !51), !dbg !53
%this1 = load %"struct.<anonymous namespace>::walrus"** %this.addr
ret void, !dbg !54
}
diff --git a/llvm/test/DebugInfo/X86/gnu-public-names.ll b/llvm/test/DebugInfo/X86/gnu-public-names.ll
index f593d0b..96fa52b 100644
--- a/llvm/test/DebugInfo/X86/gnu-public-names.ll
+++ b/llvm/test/DebugInfo/X86/gnu-public-names.ll
@@ -223,14 +223,14 @@
entry:
%this.addr = alloca %struct.C*, align 8
store %struct.C* %this, %struct.C** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr}, metadata !50, metadata !{}), !dbg !52
+ call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr}, metadata !50), !dbg !52
%this1 = load %struct.C** %this.addr
store i32 0, i32* @_ZN1C22static_member_variableE, align 4, !dbg !53
ret void, !dbg !54
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind uwtable
define i32 @_ZN1C22static_member_functionEv() #0 align 2 {
diff --git a/llvm/test/DebugInfo/X86/inline-member-function.ll b/llvm/test/DebugInfo/X86/inline-member-function.ll
index ec8a1a1..3dc6043 100644
--- a/llvm/test/DebugInfo/X86/inline-member-function.ll
+++ b/llvm/test/DebugInfo/X86/inline-member-function.ll
@@ -45,9 +45,9 @@
store i32 0, i32* %retval
%0 = load i32* @i, align 4, !dbg !23
store %struct.foo* %tmp, %struct.foo** %this.addr.i, align 8
- call void @llvm.dbg.declare(metadata !{%struct.foo** %this.addr.i}, metadata !24, metadata !{}), !dbg !26
+ call void @llvm.dbg.declare(metadata !{%struct.foo** %this.addr.i}, metadata !24), !dbg !26
store i32 %0, i32* %x.addr.i, align 4
- call void @llvm.dbg.declare(metadata !{i32* %x.addr.i}, metadata !27, metadata !{}), !dbg !28
+ call void @llvm.dbg.declare(metadata !{i32* %x.addr.i}, metadata !27), !dbg !28
%this1.i = load %struct.foo** %this.addr.i
%1 = load i32* %x.addr.i, align 4, !dbg !28
%add.i = add nsw i32 %1, 2, !dbg !28
@@ -55,7 +55,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
attributes #0 = { uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/inline-seldag-test.ll b/llvm/test/DebugInfo/X86/inline-seldag-test.ll
index 8ac1b82..615f03a 100644
--- a/llvm/test/DebugInfo/X86/inline-seldag-test.ll
+++ b/llvm/test/DebugInfo/X86/inline-seldag-test.ll
@@ -31,10 +31,10 @@
entry:
%y.addr.i = alloca i32, align 4
%x = alloca i32, align 4
- call void @llvm.dbg.declare(metadata !{i32* %x}, metadata !15, metadata !{}), !dbg !17
+ call void @llvm.dbg.declare(metadata !{i32* %x}, metadata !15), !dbg !17
%0 = load volatile i32* %x, align 4, !dbg !18
store i32 %0, i32* %y.addr.i, align 4
- call void @llvm.dbg.declare(metadata !{i32* %y.addr.i}, metadata !19, metadata !{}), !dbg !20
+ call void @llvm.dbg.declare(metadata !{i32* %y.addr.i}, metadata !19), !dbg !20
%1 = load i32* %y.addr.i, align 4, !dbg !21
%tobool.i = icmp ne i32 %1, 0, !dbg !21
%cond.i = select i1 %tobool.i, i32 4, i32 7, !dbg !21
@@ -43,7 +43,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/instcombine-instrinsics.ll b/llvm/test/DebugInfo/X86/instcombine-instrinsics.ll
index 169cd75..2fd7ee3 100644
--- a/llvm/test/DebugInfo/X86/instcombine-instrinsics.ll
+++ b/llvm/test/DebugInfo/X86/instcombine-instrinsics.ll
@@ -30,7 +30,7 @@
; Function Attrs: nounwind ssp uwtable
define void @init() #0 {
%p = alloca %struct.i14*, align 8
- call void @llvm.dbg.declare(metadata !{%struct.i14** %p}, metadata !11, metadata !{}), !dbg !18
+ call void @llvm.dbg.declare(metadata !{%struct.i14** %p}, metadata !11), !dbg !18
store %struct.i14* null, %struct.i14** %p, align 8, !dbg !18
%1 = call i32 @foo(%struct.i14** %p), !dbg !19
%2 = load %struct.i14** %p, align 8, !dbg !20
@@ -43,7 +43,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
declare i32 @foo(%struct.i14**)
diff --git a/llvm/test/DebugInfo/X86/lexical_block.ll b/llvm/test/DebugInfo/X86/lexical_block.ll
index 88975a4c..6c9f9ad 100644
--- a/llvm/test/DebugInfo/X86/lexical_block.ll
+++ b/llvm/test/DebugInfo/X86/lexical_block.ll
@@ -25,7 +25,7 @@
define void @_Z1bv() #0 {
entry:
%i = alloca i32, align 4
- call void @llvm.dbg.declare(metadata !{i32* %i}, metadata !11, metadata !{}), !dbg !14
+ call void @llvm.dbg.declare(metadata !{i32* %i}, metadata !11), !dbg !14
store i32 3, i32* %i, align 4, !dbg !14
%0 = load i32* %i, align 4, !dbg !14
%tobool = icmp ne i32 %0, 0, !dbg !14
@@ -39,7 +39,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/line-info.ll b/llvm/test/DebugInfo/X86/line-info.ll
index 1a43495..619ea3c 100644
--- a/llvm/test/DebugInfo/X86/line-info.ll
+++ b/llvm/test/DebugInfo/X86/line-info.ll
@@ -18,14 +18,14 @@
entry:
%x.addr = alloca i32, align 4
store i32 %x, i32* %x.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %x.addr}, metadata !14, metadata !{}), !dbg !15
+ call void @llvm.dbg.declare(metadata !{i32* %x.addr}, metadata !14), !dbg !15
%0 = load i32* %x.addr, align 4, !dbg !16
%inc = add nsw i32 %0, 1, !dbg !16
store i32 %inc, i32* %x.addr, align 4, !dbg !16
ret i32 %inc, !dbg !16
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
define i32 @main() #0 {
entry:
diff --git a/llvm/test/DebugInfo/X86/linkage-name.ll b/llvm/test/DebugInfo/X86/linkage-name.ll
index 179c66f..2b1647b 100644
--- a/llvm/test/DebugInfo/X86/linkage-name.ll
+++ b/llvm/test/DebugInfo/X86/linkage-name.ll
@@ -14,15 +14,15 @@
%this.addr = alloca %class.A*, align 8
%b.addr = alloca i32, align 4
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !21, metadata !{}), !dbg !23
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !21), !dbg !23
store i32 %b, i32* %b.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %b.addr}, metadata !24, metadata !{}), !dbg !25
+ call void @llvm.dbg.declare(metadata !{i32* %b.addr}, metadata !24), !dbg !25
%this1 = load %class.A** %this.addr
%0 = load i32* %b.addr, align 4, !dbg !26
ret i32 %0, !dbg !26
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!29}
diff --git a/llvm/test/DebugInfo/X86/misched-dbg-value.ll b/llvm/test/DebugInfo/X86/misched-dbg-value.ll
index 251bd9e..b0e166f 100644
--- a/llvm/test/DebugInfo/X86/misched-dbg-value.ll
+++ b/llvm/test/DebugInfo/X86/misched-dbg-value.ll
@@ -48,12 +48,12 @@
define void @Proc8(i32* nocapture %Array1Par, [51 x i32]* nocapture %Array2Par, i32 %IntParI1, i32 %IntParI2) nounwind optsize {
entry:
- tail call void @llvm.dbg.value(metadata !{i32* %Array1Par}, i64 0, metadata !23, metadata !{}), !dbg !64
- tail call void @llvm.dbg.value(metadata !{[51 x i32]* %Array2Par}, i64 0, metadata !24, metadata !{}), !dbg !65
- tail call void @llvm.dbg.value(metadata !{i32 %IntParI1}, i64 0, metadata !25, metadata !{}), !dbg !66
- tail call void @llvm.dbg.value(metadata !{i32 %IntParI2}, i64 0, metadata !26, metadata !{}), !dbg !67
+ tail call void @llvm.dbg.value(metadata !{i32* %Array1Par}, i64 0, metadata !23), !dbg !64
+ tail call void @llvm.dbg.value(metadata !{[51 x i32]* %Array2Par}, i64 0, metadata !24), !dbg !65
+ tail call void @llvm.dbg.value(metadata !{i32 %IntParI1}, i64 0, metadata !25), !dbg !66
+ tail call void @llvm.dbg.value(metadata !{i32 %IntParI2}, i64 0, metadata !26), !dbg !67
%add = add i32 %IntParI1, 5, !dbg !68
- tail call void @llvm.dbg.value(metadata !{i32 %add}, i64 0, metadata !27, metadata !{}), !dbg !68
+ tail call void @llvm.dbg.value(metadata !{i32 %add}, i64 0, metadata !27), !dbg !68
%idxprom = sext i32 %add to i64, !dbg !69
%arrayidx = getelementptr inbounds i32* %Array1Par, i64 %idxprom, !dbg !69
store i32 %IntParI2, i32* %arrayidx, align 4, !dbg !69
@@ -65,7 +65,7 @@
%idxprom7 = sext i32 %add6 to i64, !dbg !74
%arrayidx8 = getelementptr inbounds i32* %Array1Par, i64 %idxprom7, !dbg !74
store i32 %add, i32* %arrayidx8, align 4, !dbg !74
- tail call void @llvm.dbg.value(metadata !{i32 %add}, i64 0, metadata !28, metadata !{}), !dbg !75
+ tail call void @llvm.dbg.value(metadata !{i32 %add}, i64 0, metadata !28), !dbg !75
br label %for.body, !dbg !75
for.body: ; preds = %entry, %for.body
@@ -74,7 +74,7 @@
%arrayidx13 = getelementptr inbounds [51 x i32]* %Array2Par, i64 %idxprom, i64 %indvars.iv, !dbg !77
store i32 %add, i32* %arrayidx13, align 4, !dbg !77
%inc = add nsw i32 %IntIndex.046, 1, !dbg !75
- tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !28, metadata !{}), !dbg !75
+ tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !28), !dbg !75
%cmp = icmp sgt i32 %inc, %add3, !dbg !75
%indvars.iv.next = add i64 %indvars.iv, 1, !dbg !75
br i1 %cmp, label %for.end, label %for.body, !dbg !75
@@ -95,7 +95,7 @@
ret void, !dbg !81
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
attributes #0 = { nounwind optsize ssp uwtable }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/multiple-at-const-val.ll b/llvm/test/DebugInfo/X86/multiple-at-const-val.ll
index e17aa76..27a5510 100644
--- a/llvm/test/DebugInfo/X86/multiple-at-const-val.ll
+++ b/llvm/test/DebugInfo/X86/multiple-at-const-val.ll
@@ -27,7 +27,7 @@
declare %"class.std::basic_ostream"* @test(%"class.std::basic_ostream"*, i8*, i64)
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!1803}
diff --git a/llvm/test/DebugInfo/X86/nodebug_with_debug_loc.ll b/llvm/test/DebugInfo/X86/nodebug_with_debug_loc.ll
index 0783c13..4e84528 100644
--- a/llvm/test/DebugInfo/X86/nodebug_with_debug_loc.ll
+++ b/llvm/test/DebugInfo/X86/nodebug_with_debug_loc.ll
@@ -58,8 +58,8 @@
for.body: ; preds = %for.body, %entry
%iter.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
call void @llvm.lifetime.start(i64 4, i8* %0), !dbg !26
- call void @llvm.dbg.value(metadata !{%struct.string* %str2.i}, i64 0, metadata !16, metadata !{}) #3, !dbg !26
- call void @llvm.dbg.value(metadata !{%struct.string* %str2.i}, i64 0, metadata !27, metadata !{}) #3, !dbg !29
+ call void @llvm.dbg.value(metadata !{%struct.string* %str2.i}, i64 0, metadata !16) #3, !dbg !26
+ call void @llvm.dbg.value(metadata !{%struct.string* %str2.i}, i64 0, metadata !27) #3, !dbg !29
call void @_Z4sinkPKv(i8* undef) #3, !dbg !29
call void @_Z4sinkPKv(i8* %0) #3, !dbg !30
call void @llvm.lifetime.end(i64 4, i8* %0), !dbg !31
@@ -80,7 +80,7 @@
declare void @_Z4sinkPKv(i8*) #1
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
+declare void @llvm.dbg.value(metadata, i64, metadata) #2
; Function Attrs: nounwind
declare void @llvm.lifetime.start(i64, i8* nocapture) #3
diff --git a/llvm/test/DebugInfo/X86/objc-property-void.ll b/llvm/test/DebugInfo/X86/objc-property-void.ll
index a933a50..d366a7a 100644
--- a/llvm/test/DebugInfo/X86/objc-property-void.ll
+++ b/llvm/test/DebugInfo/X86/objc-property-void.ll
@@ -56,14 +56,14 @@
%self.addr = alloca %0*, align 8
%_cmd.addr = alloca i8*, align 8
store %0* %self, %0** %self.addr, align 8
- call void @llvm.dbg.declare(metadata !{%0** %self.addr}, metadata !24, metadata !{}), !dbg !26
+ call void @llvm.dbg.declare(metadata !{%0** %self.addr}, metadata !24), !dbg !26
store i8* %_cmd, i8** %_cmd.addr, align 8
- call void @llvm.dbg.declare(metadata !{i8** %_cmd.addr}, metadata !27, metadata !{}), !dbg !26
+ call void @llvm.dbg.declare(metadata !{i8** %_cmd.addr}, metadata !27), !dbg !26
ret void, !dbg !29
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
attributes #0 = { ssp uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/op_deref.ll b/llvm/test/DebugInfo/X86/op_deref.ll
index 8840c42..db82a77 100644
--- a/llvm/test/DebugInfo/X86/op_deref.ll
+++ b/llvm/test/DebugInfo/X86/op_deref.ll
@@ -29,14 +29,14 @@
%saved_stack = alloca i8*
%i = alloca i32, align 4
store i32 %s, i32* %s.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %s.addr}, metadata !10, metadata !{}), !dbg !11
+ call void @llvm.dbg.declare(metadata !{i32* %s.addr}, metadata !10), !dbg !11
%0 = load i32* %s.addr, align 4, !dbg !12
%1 = zext i32 %0 to i64, !dbg !12
%2 = call i8* @llvm.stacksave(), !dbg !12
store i8* %2, i8** %saved_stack, !dbg !12
%vla = alloca i32, i64 %1, align 16, !dbg !12
- call void @llvm.dbg.declare(metadata !{i32* %vla}, metadata !14, metadata !30), !dbg !18
- call void @llvm.dbg.declare(metadata !{i32* %i}, metadata !19, metadata !{}), !dbg !20
+ call void @llvm.dbg.declare(metadata !{i32* %vla}, metadata !14), !dbg !18
+ call void @llvm.dbg.declare(metadata !{i32* %i}, metadata !19), !dbg !20
store i32 0, i32* %i, align 4, !dbg !21
br label %for.cond, !dbg !21
@@ -68,7 +68,7 @@
ret void, !dbg !27
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
declare i8* @llvm.stacksave() nounwind
@@ -89,7 +89,7 @@
!11 = metadata !{i32 1, i32 26, metadata !5, null}
!12 = metadata !{i32 3, i32 13, metadata !13, null}
!13 = metadata !{i32 786443, metadata !28, metadata !5, i32 2, i32 1, i32 0} ; [ DW_TAG_lexical_block ]
-!14 = metadata !{i32 786688, metadata !13, metadata !"vla", metadata !6, i32 3, metadata !15, i32 8192, i32 0} ;; [ DW_TAG_auto_variable ]
+!14 = metadata !{i32 786688, metadata !13, metadata !"vla", metadata !6, i32 3, metadata !15, i32 8192, i32 0, metadata !30} ; [ DW_TAG_auto_variable ]
!15 = metadata !{i32 786433, null, null, metadata !"", i32 0, i64 0, i64 32, i32 0, i32 0, metadata !9, metadata !16, i32 0, null, null, null} ; [ DW_TAG_array_type ] [line 0, size 0, align 32, offset 0] [from int]
!16 = metadata !{metadata !17}
!17 = metadata !{i32 786465, i64 0, i64 -1} ; [ DW_TAG_subrange_type ]
@@ -105,4 +105,4 @@
!27 = metadata !{i32 8, i32 1, metadata !13, null}
!28 = metadata !{metadata !"bar.c", metadata !"/Users/echristo/tmp"}
!29 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
-!30 = metadata !{i32 786690, i64 6} ; [DW_OP_deref]
+!30 = metadata !{i64 2}
diff --git a/llvm/test/DebugInfo/X86/parameters.ll b/llvm/test/DebugInfo/X86/parameters.ll
index dbdd546..eadd369 100644
--- a/llvm/test/DebugInfo/X86/parameters.ll
+++ b/llvm/test/DebugInfo/X86/parameters.ll
@@ -42,13 +42,13 @@
; Function Attrs: uwtable
define void @_ZN7pr147634funcENS_3fooE(%"struct.pr14763::foo"* noalias sret %agg.result, %"struct.pr14763::foo"* %f) #0 {
entry:
- call void @llvm.dbg.declare(metadata !{%"struct.pr14763::foo"* %f}, metadata !22, metadata !{}), !dbg !24
+ call void @llvm.dbg.declare(metadata !{%"struct.pr14763::foo"* %f}, metadata !22), !dbg !24
call void @_ZN7pr147633fooC1ERKS0_(%"struct.pr14763::foo"* %agg.result, %"struct.pr14763::foo"* %f), !dbg !25
ret void, !dbg !25
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
declare void @_ZN7pr147633fooC1ERKS0_(%"struct.pr14763::foo"*, %"struct.pr14763::foo"*) #2
@@ -58,8 +58,8 @@
%b.addr = alloca i8, align 1
%frombool = zext i1 %b to i8
store i8 %frombool, i8* %b.addr, align 1
- call void @llvm.dbg.declare(metadata !{i8* %b.addr}, metadata !26, metadata !{}), !dbg !27
- call void @llvm.dbg.declare(metadata !{%"struct.pr14763::foo"* %g}, metadata !28, metadata !{}), !dbg !27
+ call void @llvm.dbg.declare(metadata !{i8* %b.addr}, metadata !26), !dbg !27
+ call void @llvm.dbg.declare(metadata !{%"struct.pr14763::foo"* %g}, metadata !28), !dbg !27
%0 = load i8* %b.addr, align 1, !dbg !29
%tobool = trunc i8 %0 to i1, !dbg !29
br i1 %tobool, label %if.then, label %if.end, !dbg !29
diff --git a/llvm/test/DebugInfo/X86/pieces-1.ll b/llvm/test/DebugInfo/X86/pieces-1.ll
index e7d3252..fe3b7dc 100644
--- a/llvm/test/DebugInfo/X86/pieces-1.ll
+++ b/llvm/test/DebugInfo/X86/pieces-1.ll
@@ -32,16 +32,16 @@
; Function Attrs: nounwind ssp uwtable
define i32 @foo(i64 %s.coerce0, i32 %s.coerce1) #0 {
entry:
- call void @llvm.dbg.value(metadata !{i64 %s.coerce0}, i64 0, metadata !20, metadata !24), !dbg !21
- call void @llvm.dbg.value(metadata !{i32 %s.coerce1}, i64 0, metadata !22, metadata !27), !dbg !21
+ call void @llvm.dbg.value(metadata !{i64 %s.coerce0}, i64 0, metadata !20), !dbg !21
+ call void @llvm.dbg.value(metadata !{i32 %s.coerce1}, i64 0, metadata !22), !dbg !21
ret i32 %s.coerce1, !dbg !23
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata) #1
attributes #0 = { nounwind ssp uwtable "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" }
attributes #1 = { nounwind readnone }
@@ -70,10 +70,10 @@
!17 = metadata !{i32 2, metadata !"Dwarf Version", i32 4}
!18 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
!19 = metadata !{metadata !"clang version 3.5 "}
-!20 = metadata !{i32 786689, metadata !4, metadata !"s", metadata !5, i32 16777219, metadata !9, i32 0, i32 0} ;; [ DW_TAG_arg_variable ] [s] [line 3]
+!20 = metadata !{i32 786689, metadata !4, metadata !"s", metadata !5, i32 16777219, metadata !9, i32 0, i32 0, metadata !24} ; [ DW_TAG_arg_variable ] [s] [line 3] [piece, size 8, offset 0]
!21 = metadata !{i32 3, i32 0, metadata !4, null}
-!22 = metadata !{i32 786689, metadata !4, metadata !"s", metadata !5, i32 16777219, metadata !9, i32 0, i32 0} ;; [ DW_TAG_arg_variable ] [s] [line 3]
+!22 = metadata !{i32 786689, metadata !4, metadata !"s", metadata !5, i32 16777219, metadata !9, i32 0, i32 0, metadata !27} ; [ DW_TAG_arg_variable ] [s] [line 3] [piece, size 4, offset 8]
!23 = metadata !{i32 4, i32 0, metadata !4, null}
-!24 = metadata !{i32 786690, i64 147, i64 0, i64 8} ; [DW_OP_piece 0 8] [piece, size 8, offset 0]
+!24 = metadata !{i64 3, i64 0, i64 8}
!25 = metadata !{}
-!27 = metadata !{i32 786690, i64 147, i64 8, i64 4} ; [DW_OP_piece 8 4] [piece, size 4, offset 8]
+!27 = metadata !{i64 3, i64 8, i64 4}
diff --git a/llvm/test/DebugInfo/X86/pieces-2.ll b/llvm/test/DebugInfo/X86/pieces-2.ll
index 4bffbd0..083d48c 100644
--- a/llvm/test/DebugInfo/X86/pieces-2.ll
+++ b/llvm/test/DebugInfo/X86/pieces-2.ll
@@ -31,23 +31,23 @@
; Function Attrs: nounwind ssp uwtable
define i32 @foo(%struct.Outer* byval align 8 %outer) #0 {
entry:
- call void @llvm.dbg.declare(metadata !{%struct.Outer* %outer}, metadata !25, metadata !{}), !dbg !26
+ call void @llvm.dbg.declare(metadata !{%struct.Outer* %outer}, metadata !25), !dbg !26
%i1.sroa.0.0..sroa_idx = getelementptr inbounds %struct.Outer* %outer, i64 0, i32 0, i64 1, i32 0, !dbg !27
%i1.sroa.0.0.copyload = load i32* %i1.sroa.0.0..sroa_idx, align 8, !dbg !27
- call void @llvm.dbg.value(metadata !{i32 %i1.sroa.0.0.copyload}, i64 0, metadata !28, metadata !29), !dbg !27
+ call void @llvm.dbg.value(metadata !{i32 %i1.sroa.0.0.copyload}, i64 0, metadata !28), !dbg !27
%i1.sroa.2.0..sroa_raw_cast = bitcast %struct.Outer* %outer to i8*, !dbg !27
%i1.sroa.2.0..sroa_raw_idx = getelementptr inbounds i8* %i1.sroa.2.0..sroa_raw_cast, i64 20, !dbg !27
ret i32 %i1.sroa.0.0.copyload, !dbg !32
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) #2
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata) #1
attributes #0 = { nounwind ssp uwtable }
attributes #1 = { nounwind readnone }
@@ -85,8 +85,8 @@
!25 = metadata !{i32 786689, metadata !4, metadata !"outer", metadata !5, i32 16777226, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [outer] [line 10]
!26 = metadata !{i32 10, i32 0, metadata !4, null}
!27 = metadata !{i32 11, i32 0, metadata !4, null}
-!28 = metadata !{i32 786688, metadata !4, metadata !"i1", metadata !5, i32 11, metadata !14, i32 0, i32 0} ;; [ DW_TAG_auto_variable ] [i1] [line 11]
-!29 = metadata !{i32 786690, i32 147, i32 0, i32 4} ; [DW_OP_piece 0 4] [piece, size 4, offset 0]
+!28 = metadata !{i32 786688, metadata !4, metadata !"i1", metadata !5, i32 11, metadata !14, i32 0, i32 0, metadata !29} ; [ DW_TAG_auto_variable ] [i1] [line 11] [piece, size 4, offset 0]
+!29 = metadata !{i32 3, i32 0, i32 4}
!30 = metadata !{i32 786688, metadata !4, metadata !"i1", metadata !5, i32 11, metadata !14, i32 0, i32 0, metadata !31} ; [ DW_TAG_auto_variable ] [i1] [line 11] [piece, size 12, offset 0]
!31 = metadata !{i32 3, i32 0, i32 12}
!32 = metadata !{i32 12, i32 0, metadata !4, null}
diff --git a/llvm/test/DebugInfo/X86/pieces-3.ll b/llvm/test/DebugInfo/X86/pieces-3.ll
index 123e7e1..4ce7bea 100644
--- a/llvm/test/DebugInfo/X86/pieces-3.ll
+++ b/llvm/test/DebugInfo/X86/pieces-3.ll
@@ -19,10 +19,10 @@
; CHECK-NEXT: DW_AT_location [DW_FORM_data4] ([[LOC:.*]])
; CHECK-NEXT: DW_AT_name {{.*}}"outer"
; CHECK: DW_TAG_variable
-; rsi, piece 0x00000004
-; CHECK-NEXT: DW_AT_location [DW_FORM_block1] {{.*}} 54 93 04
+; rsi, piece 0x00000004, bit-piece 32 0
+; CHECK-NEXT: DW_AT_location [DW_FORM_block1] (<0x06> 54 93 04 9d 20 00 )
; CHECK-NEXT: "i1"
-;
+
; CHECK: .debug_loc
; CHECK: [[LOC]]:
; CHECK: Beginning address offset: 0x0000000000000000
@@ -36,28 +36,28 @@
; Function Attrs: nounwind ssp uwtable
define i32 @foo(i64 %outer.coerce0, i64 %outer.coerce1) #0 {
- call void @llvm.dbg.value(metadata !{i64 %outer.coerce0}, i64 0, metadata !24, metadata !25), !dbg !26
- call void @llvm.dbg.declare(metadata !{null}, metadata !27, metadata !28), !dbg !26
- call void @llvm.dbg.value(metadata !{i64 %outer.coerce1}, i64 0, metadata !29, metadata !30), !dbg !26
- call void @llvm.dbg.declare(metadata !{null}, metadata !31, metadata !32), !dbg !26
+ call void @llvm.dbg.value(metadata !{i64 %outer.coerce0}, i64 0, metadata !24), !dbg !26
+ call void @llvm.dbg.declare(metadata !{null}, metadata !27), !dbg !26
+ call void @llvm.dbg.value(metadata !{i64 %outer.coerce1}, i64 0, metadata !29), !dbg !26
+ call void @llvm.dbg.declare(metadata !{null}, metadata !31), !dbg !26
%outer.sroa.1.8.extract.trunc = trunc i64 %outer.coerce1 to i32, !dbg !33
- call void @llvm.dbg.value(metadata !{i32 %outer.sroa.1.8.extract.trunc}, i64 0, metadata !34, metadata !35), !dbg !33
+ call void @llvm.dbg.value(metadata !{i32 %outer.sroa.1.8.extract.trunc}, i64 0, metadata !34), !dbg !33
%outer.sroa.1.12.extract.shift = lshr i64 %outer.coerce1, 32, !dbg !33
%outer.sroa.1.12.extract.trunc = trunc i64 %outer.sroa.1.12.extract.shift to i32, !dbg !33
- call void @llvm.dbg.value(metadata !{i64 %outer.sroa.1.12.extract.shift}, i64 0, metadata !34, metadata !35), !dbg !33
- call void @llvm.dbg.value(metadata !{i32 %outer.sroa.1.12.extract.trunc}, i64 0, metadata !34, metadata !35), !dbg !33
- call void @llvm.dbg.declare(metadata !{null}, metadata !34, metadata !35), !dbg !33
+ call void @llvm.dbg.value(metadata !{i64 %outer.sroa.1.12.extract.shift}, i64 0, metadata !34), !dbg !33
+ call void @llvm.dbg.value(metadata !{i32 %outer.sroa.1.12.extract.trunc}, i64 0, metadata !34), !dbg !33
+ call void @llvm.dbg.declare(metadata !{null}, metadata !34), !dbg !33
ret i32 %outer.sroa.1.8.extract.trunc, !dbg !36
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) #2
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata) #1
attributes #0 = { nounwind ssp uwtable "no-frame-pointer-elim"="true" }
attributes #1 = { nounwind readnone }
@@ -91,16 +91,16 @@
!21 = metadata !{i32 2, metadata !"Dwarf Version", i32 2}
!22 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
!23 = metadata !{metadata !"clang version 3.5.0 "}
-!24 = metadata !{i32 786689, metadata !4, metadata !"outer", metadata !5, i32 16777226, metadata !9, i32 0, i32 0} ;; [ DW_TAG_arg_variable ] [outer] [line 10]
-!25 = metadata !{i32 786690, i32 147, i32 0, i32 8} ; [DW_OP_piece 0 8] [piece, size 8, offset 0]
+!24 = metadata !{i32 786689, metadata !4, metadata !"outer", metadata !5, i32 16777226, metadata !9, i32 0, i32 0, metadata !25} ; [ DW_TAG_arg_variable ] [outer] [line 10] [piece, size 8, offset 0]
+!25 = metadata !{i32 3, i32 0, i32 8}
!26 = metadata !{i32 10, i32 0, metadata !4, null}
-!27 = metadata !{i32 786689, metadata !4, metadata !"outer", metadata !5, i32 16777226, metadata !9, i32 0, i32 0} ;; [ DW_TAG_arg_variable ] [outer] [line 10]
-!28 = metadata !{i32 786690, i32 147, i32 8, i32 8} ; [DW_OP_piece 8 8] [piece, size 8, offset 8]
-!29 = metadata !{i32 786689, metadata !4, metadata !"outer", metadata !5, i32 16777226, metadata !9, i32 0, i32 0} ;; [ DW_TAG_arg_variable ] [outer] [line 10]
-!30 = metadata !{i32 786690, i32 147, i32 12, i32 4} ; [DW_OP_piece 12 4] [piece, size 4, offset 12]
-!31 = metadata !{i32 786689, metadata !4, metadata !"outer", metadata !5, i32 16777226, metadata !9, i32 0, i32 0} ;; [ DW_TAG_arg_variable ] [outer] [line 10]
-!32 = metadata !{i32 786690, i32 147, i32 8, i32 4} ; [DW_OP_piece 8 4] [piece, size 4, offset 8]
+!27 = metadata !{i32 786689, metadata !4, metadata !"outer", metadata !5, i32 16777226, metadata !9, i32 0, i32 0, metadata !28} ; [ DW_TAG_arg_variable ] [outer] [line 10] [piece, size 8, offset 8]
+!28 = metadata !{i32 3, i32 8, i32 8}
+!29 = metadata !{i32 786689, metadata !4, metadata !"outer", metadata !5, i32 16777226, metadata !9, i32 0, i32 0, metadata !30} ; [ DW_TAG_arg_variable ] [outer] [line 10] [piece, size 4, offset 12]
+!30 = metadata !{i32 3, i32 12, i32 4}
+!31 = metadata !{i32 786689, metadata !4, metadata !"outer", metadata !5, i32 16777226, metadata !9, i32 0, i32 0, metadata !32} ; [ DW_TAG_arg_variable ] [outer] [line 10] [piece, size 4, offset 8]
+!32 = metadata !{i32 3, i32 8, i32 4}
!33 = metadata !{i32 11, i32 0, metadata !4, null}
-!34 = metadata !{i32 786688, metadata !4, metadata !"i1", metadata !5, i32 11, metadata !14, i32 0, i32 0} ;; [ DW_TAG_auto_variable ] [i1] [line 11]
-!35 = metadata !{i32 786690, i32 147, i32 0, i32 4} ; [DW_OP_piece 0 4] [piece, size 4, offset 0]
+!34 = metadata !{i32 786688, metadata !4, metadata !"i1", metadata !5, i32 11, metadata !14, i32 0, i32 0, metadata !35} ; [ DW_TAG_auto_variable ] [i1] [line 11] [piece, size 4, offset 0]
+!35 = metadata !{i32 3, i32 0, i32 4}
!36 = metadata !{i32 12, i32 0, metadata !4, null}
diff --git a/llvm/test/DebugInfo/X86/pr11300.ll b/llvm/test/DebugInfo/X86/pr11300.ll
index 22392b9..11c409c 100644
--- a/llvm/test/DebugInfo/X86/pr11300.ll
+++ b/llvm/test/DebugInfo/X86/pr11300.ll
@@ -18,19 +18,19 @@
entry:
%x.addr = alloca %struct.foo*, align 8
store %struct.foo* %x, %struct.foo** %x.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.foo** %x.addr}, metadata !23, metadata !{}), !dbg !24
+ call void @llvm.dbg.declare(metadata !{%struct.foo** %x.addr}, metadata !23), !dbg !24
%0 = load %struct.foo** %x.addr, align 8, !dbg !25
call void @_ZN3foo3barEv(%struct.foo* %0), !dbg !25
ret void, !dbg !27
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define linkonce_odr void @_ZN3foo3barEv(%struct.foo* %this) nounwind uwtable align 2 {
entry:
%this.addr = alloca %struct.foo*, align 8
store %struct.foo* %this, %struct.foo** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.foo** %this.addr}, metadata !28, metadata !{}), !dbg !29
+ call void @llvm.dbg.declare(metadata !{%struct.foo** %this.addr}, metadata !28), !dbg !29
%this1 = load %struct.foo** %this.addr
ret void, !dbg !30
}
diff --git a/llvm/test/DebugInfo/X86/pr12831.ll b/llvm/test/DebugInfo/X86/pr12831.ll
index 559cd41..a67f001 100644
--- a/llvm/test/DebugInfo/X86/pr12831.ll
+++ b/llvm/test/DebugInfo/X86/pr12831.ll
@@ -20,7 +20,7 @@
%agg.tmp4 = alloca %class.function, align 1
%agg.tmp5 = alloca %class.anon.0, align 1
store %class.BPLFunctionWriter* %this, %class.BPLFunctionWriter** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.BPLFunctionWriter** %this.addr}, metadata !133, metadata !{}), !dbg !135
+ call void @llvm.dbg.declare(metadata !{%class.BPLFunctionWriter** %this.addr}, metadata !133), !dbg !135
%this1 = load %class.BPLFunctionWriter** %this.addr
%MW = getelementptr inbounds %class.BPLFunctionWriter* %this1, i32 0, i32 0, !dbg !136
%0 = load %struct.BPLModuleWriter** %MW, align 8, !dbg !136
@@ -33,7 +33,7 @@
ret void, !dbg !139
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
declare void @_ZN15BPLModuleWriter14writeIntrinsicE8functionIFvvEE(%struct.BPLModuleWriter*)
@@ -42,8 +42,8 @@
%this.addr = alloca %class.function*, align 8
%__f = alloca %class.anon.0, align 1
store %class.function* %this, %class.function** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.function** %this.addr}, metadata !140, metadata !{}), !dbg !142
- call void @llvm.dbg.declare(metadata !{%class.anon.0* %__f}, metadata !143, metadata !{}), !dbg !144
+ call void @llvm.dbg.declare(metadata !{%class.function** %this.addr}, metadata !140), !dbg !142
+ call void @llvm.dbg.declare(metadata !{%class.anon.0* %__f}, metadata !143), !dbg !144
%this1 = load %class.function** %this.addr
call void @"_ZN13_Base_manager21_M_not_empty_functionIZN17BPLFunctionWriter9writeExprEvE3$_1_0EEvRKT_"(%class.anon.0* %__f), !dbg !145
ret void, !dbg !147
@@ -61,8 +61,8 @@
%this.addr = alloca %class.function*, align 8
%__f = alloca %class.anon, align 1
store %class.function* %this, %class.function** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.function** %this.addr}, metadata !150, metadata !{}), !dbg !151
- call void @llvm.dbg.declare(metadata !{%class.anon* %__f}, metadata !152, metadata !{}), !dbg !153
+ call void @llvm.dbg.declare(metadata !{%class.function** %this.addr}, metadata !150), !dbg !151
+ call void @llvm.dbg.declare(metadata !{%class.anon* %__f}, metadata !152), !dbg !153
%this1 = load %class.function** %this.addr
call void @"_ZN13_Base_manager21_M_not_empty_functionIZN17BPLFunctionWriter9writeExprEvE3$_0EEvRKT_"(%class.anon* %__f), !dbg !154
ret void, !dbg !156
diff --git a/llvm/test/DebugInfo/X86/pr19307.ll b/llvm/test/DebugInfo/X86/pr19307.ll
index 78a2402..07e3a42 100644
--- a/llvm/test/DebugInfo/X86/pr19307.ll
+++ b/llvm/test/DebugInfo/X86/pr19307.ll
@@ -42,10 +42,10 @@
%offset.addr = alloca i64*, align 8
%limit.addr = alloca i64*, align 8
store i64* %offset, i64** %offset.addr, align 8
- call void @llvm.dbg.declare(metadata !{i64** %offset.addr}, metadata !45, metadata !{}), !dbg !46
+ call void @llvm.dbg.declare(metadata !{i64** %offset.addr}, metadata !45), !dbg !46
store i64* %limit, i64** %limit.addr, align 8
- call void @llvm.dbg.declare(metadata !{i64** %limit.addr}, metadata !47, metadata !{}), !dbg !46
- call void @llvm.dbg.declare(metadata !{%"class.std::basic_string"* %range}, metadata !48, metadata !{}), !dbg !49
+ call void @llvm.dbg.declare(metadata !{i64** %limit.addr}, metadata !47), !dbg !46
+ call void @llvm.dbg.declare(metadata !{%"class.std::basic_string"* %range}, metadata !48), !dbg !49
%call = call i32 @_ZNKSs7compareEmmPKc(%"class.std::basic_string"* %range, i64 0, i64 6, i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0)), !dbg !50
%cmp = icmp ne i32 %call, 0, !dbg !50
br i1 %cmp, label %if.then, label %lor.lhs.false, !dbg !50
@@ -70,7 +70,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
declare i32 @_ZNKSs7compareEmmPKc(%"class.std::basic_string"*, i64, i64, i8*) #2
diff --git a/llvm/test/DebugInfo/X86/recursive_inlining.ll b/llvm/test/DebugInfo/X86/recursive_inlining.ll
index fe8a3d0..2a70bef 100644
--- a/llvm/test/DebugInfo/X86/recursive_inlining.ll
+++ b/llvm/test/DebugInfo/X86/recursive_inlining.ll
@@ -95,7 +95,7 @@
entry:
tail call void @_Z3fn8v() #3, !dbg !31
%0 = load %struct.C** @x, align 8, !dbg !32, !tbaa !33
- tail call void @llvm.dbg.value(metadata !{%struct.C* %0}, i64 0, metadata !37, metadata !{}) #3, !dbg !38
+ tail call void @llvm.dbg.value(metadata !{%struct.C* %0}, i64 0, metadata !37) #3, !dbg !38
tail call void @_Z3fn8v() #3, !dbg !39
%b.i = getelementptr inbounds %struct.C* %0, i64 0, i32 0, !dbg !40
%1 = load i32* %b.i, align 4, !dbg !40, !tbaa !42
@@ -116,7 +116,7 @@
; Function Attrs: nounwind
define linkonce_odr void @_ZN1C5m_fn2Ev(%struct.C* nocapture readonly %this) #0 align 2 {
entry:
- tail call void @llvm.dbg.value(metadata !{%struct.C* %this}, i64 0, metadata !24, metadata !{}), !dbg !49
+ tail call void @llvm.dbg.value(metadata !{%struct.C* %this}, i64 0, metadata !24), !dbg !49
tail call void @_Z3fn8v() #3, !dbg !50
%b = getelementptr inbounds %struct.C* %this, i64 0, i32 0, !dbg !51
%0 = load i32* %b, align 4, !dbg !51, !tbaa !42
@@ -130,7 +130,7 @@
if.end: ; preds = %entry, %if.then
tail call void @_Z3fn8v() #3, !dbg !53
%1 = load %struct.C** @x, align 8, !dbg !56, !tbaa !33
- tail call void @llvm.dbg.value(metadata !{%struct.C* %1}, i64 0, metadata !57, metadata !{}) #3, !dbg !58
+ tail call void @llvm.dbg.value(metadata !{%struct.C* %1}, i64 0, metadata !57) #3, !dbg !58
tail call void @_Z3fn8v() #3, !dbg !59
%b.i.i = getelementptr inbounds %struct.C* %1, i64 0, i32 0, !dbg !60
%2 = load i32* %b.i.i, align 4, !dbg !60, !tbaa !42
@@ -154,7 +154,7 @@
tailrecurse: ; preds = %tailrecurse.backedge, %entry
tail call void @_Z3fn8v() #3, !dbg !64
%0 = load %struct.C** @x, align 8, !dbg !66, !tbaa !33
- tail call void @llvm.dbg.value(metadata !{%struct.C* %0}, i64 0, metadata !67, metadata !{}) #3, !dbg !68
+ tail call void @llvm.dbg.value(metadata !{%struct.C* %0}, i64 0, metadata !67) #3, !dbg !68
tail call void @_Z3fn8v() #3, !dbg !69
%b.i.i = getelementptr inbounds %struct.C* %0, i64 0, i32 0, !dbg !70
%1 = load i32* %b.i.i, align 4, !dbg !70, !tbaa !42
@@ -188,7 +188,7 @@
declare void @_Z3fn2iiii(i32, i32, i32, i32) #1
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
+declare void @llvm.dbg.value(metadata, i64, metadata) #2
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
diff --git a/llvm/test/DebugInfo/X86/reference-argument.ll b/llvm/test/DebugInfo/X86/reference-argument.ll
index d6c925607..4a6bdca 100644
--- a/llvm/test/DebugInfo/X86/reference-argument.ll
+++ b/llvm/test/DebugInfo/X86/reference-argument.ll
@@ -13,15 +13,15 @@
%class.A = type { i8 }
declare void @_Z3barR4SVal(%class.SVal* %v)
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
declare i32 @main()
; Function Attrs: nounwind ssp uwtable
define linkonce_odr void @_ZN1A3fooE4SVal(%class.A* %this, %class.SVal* %v) nounwind ssp uwtable align 2 {
entry:
%this.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !59, metadata !{}), !dbg !61
- call void @llvm.dbg.declare(metadata !{%class.SVal* %v}, metadata !62, metadata !{}), !dbg !61
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !59), !dbg !61
+ call void @llvm.dbg.declare(metadata !{%class.SVal* %v}, metadata !62), !dbg !61
%this1 = load %class.A** %this.addr
call void @_Z3barR4SVal(%class.SVal* %v), !dbg !61
ret void, !dbg !61
diff --git a/llvm/test/DebugInfo/X86/rvalue-ref.ll b/llvm/test/DebugInfo/X86/rvalue-ref.ll
index 4825ae4..b8ed021 100644
--- a/llvm/test/DebugInfo/X86/rvalue-ref.ll
+++ b/llvm/test/DebugInfo/X86/rvalue-ref.ll
@@ -9,14 +9,14 @@
entry:
%i.addr = alloca i32*, align 8
store i32* %i, i32** %i.addr, align 8
- call void @llvm.dbg.declare(metadata !{i32** %i.addr}, metadata !11, metadata !{}), !dbg !12
+ call void @llvm.dbg.declare(metadata !{i32** %i.addr}, metadata !11), !dbg !12
%0 = load i32** %i.addr, align 8, !dbg !13
%1 = load i32* %0, align 4, !dbg !13
%call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i32 0, i32 0), i32 %1), !dbg !13
ret void, !dbg !15
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
declare i32 @printf(i8*, ...)
diff --git a/llvm/test/DebugInfo/X86/sret.ll b/llvm/test/DebugInfo/X86/sret.ll
index eead3ff..be425de 100644
--- a/llvm/test/DebugInfo/X86/sret.ll
+++ b/llvm/test/DebugInfo/X86/sret.ll
@@ -23,9 +23,9 @@
%this.addr = alloca %class.A*, align 8
%i.addr = alloca i32, align 4
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !67, metadata !{}), !dbg !69
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !67), !dbg !69
store i32 %i, i32* %i.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %i.addr}, metadata !70, metadata !{}), !dbg !71
+ call void @llvm.dbg.declare(metadata !{i32* %i.addr}, metadata !70), !dbg !71
%this1 = load %class.A** %this.addr
%0 = bitcast %class.A* %this1 to i8***, !dbg !72
store i8** getelementptr inbounds ([4 x i8*]* @_ZTV1A, i64 0, i64 2), i8*** %0, !dbg !72
@@ -36,7 +36,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind uwtable
define void @_ZN1AC2ERKS_(%class.A* %this, %class.A* %rhs) unnamed_addr #0 align 2 {
@@ -44,9 +44,9 @@
%this.addr = alloca %class.A*, align 8
%rhs.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !74, metadata !{}), !dbg !75
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !74), !dbg !75
store %class.A* %rhs, %class.A** %rhs.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %rhs.addr}, metadata !76, metadata !{}), !dbg !77
+ call void @llvm.dbg.declare(metadata !{%class.A** %rhs.addr}, metadata !76), !dbg !77
%this1 = load %class.A** %this.addr
%0 = bitcast %class.A* %this1 to i8***, !dbg !78
store i8** getelementptr inbounds ([4 x i8*]* @_ZTV1A, i64 0, i64 2), i8*** %0, !dbg !78
@@ -64,9 +64,9 @@
%this.addr = alloca %class.A*, align 8
%rhs.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !80, metadata !{}), !dbg !81
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !80), !dbg !81
store %class.A* %rhs, %class.A** %rhs.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %rhs.addr}, metadata !82, metadata !{}), !dbg !83
+ call void @llvm.dbg.declare(metadata !{%class.A** %rhs.addr}, metadata !82), !dbg !83
%this1 = load %class.A** %this.addr
%0 = load %class.A** %rhs.addr, align 8, !dbg !84
%m_int = getelementptr inbounds %class.A* %0, i32 0, i32 1, !dbg !84
@@ -81,7 +81,7 @@
entry:
%this.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !86, metadata !{}), !dbg !87
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !86), !dbg !87
%this1 = load %class.A** %this.addr
%m_int = getelementptr inbounds %class.A* %this1, i32 0, i32 1, !dbg !88
%0 = load i32* %m_int, align 4, !dbg !88
@@ -95,10 +95,10 @@
%nrvo = alloca i1
%cleanup.dest.slot = alloca i32
store %class.B* %this, %class.B** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.B** %this.addr}, metadata !89, metadata !{}), !dbg !91
+ call void @llvm.dbg.declare(metadata !{%class.B** %this.addr}, metadata !89), !dbg !91
%this1 = load %class.B** %this.addr
store i1 false, i1* %nrvo, !dbg !92
- call void @llvm.dbg.declare(metadata !{%class.A* %agg.result}, metadata !93, metadata !{}), !dbg !92
+ call void @llvm.dbg.declare(metadata !{%class.A* %agg.result}, metadata !93), !dbg !92
call void @_ZN1AC1Ei(%class.A* %agg.result, i32 12), !dbg !92
store i1 true, i1* %nrvo, !dbg !94
store i32 1, i32* %cleanup.dest.slot
@@ -118,7 +118,7 @@
entry:
%this.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !101, metadata !{}), !dbg !102
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !101), !dbg !102
%this1 = load %class.A** %this.addr
ret void, !dbg !103
}
@@ -138,12 +138,12 @@
%cleanup.dest.slot = alloca i32
store i32 0, i32* %retval
store i32 %argc, i32* %argc.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !104, metadata !{}), !dbg !105
+ call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !104), !dbg !105
store i8** %argv, i8*** %argv.addr, align 8
- call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !106, metadata !{}), !dbg !105
- call void @llvm.dbg.declare(metadata !{%class.B* %b}, metadata !107, metadata !{}), !dbg !108
+ call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !106), !dbg !105
+ call void @llvm.dbg.declare(metadata !{%class.B* %b}, metadata !107), !dbg !108
call void @_ZN1BC2Ev(%class.B* %b), !dbg !108
- call void @llvm.dbg.declare(metadata !{i32* %return_val}, metadata !109, metadata !{}), !dbg !110
+ call void @llvm.dbg.declare(metadata !{i32* %return_val}, metadata !109), !dbg !110
call void @_ZN1B9AInstanceEv(%class.A* sret %temp.lvalue, %class.B* %b), !dbg !110
%call = invoke i32 @_ZN1A7get_intEv(%class.A* %temp.lvalue)
to label %invoke.cont unwind label %lpad, !dbg !110
@@ -151,7 +151,7 @@
invoke.cont: ; preds = %entry
call void @_ZN1AD2Ev(%class.A* %temp.lvalue), !dbg !111
store i32 %call, i32* %return_val, align 4, !dbg !111
- call void @llvm.dbg.declare(metadata !{%class.A* %a}, metadata !113, metadata !{}), !dbg !114
+ call void @llvm.dbg.declare(metadata !{%class.A* %a}, metadata !113), !dbg !114
call void @_ZN1B9AInstanceEv(%class.A* sret %a, %class.B* %b), !dbg !114
%0 = load i32* %return_val, align 4, !dbg !115
store i32 %0, i32* %retval, !dbg !115
@@ -193,7 +193,7 @@
entry:
%this.addr = alloca %class.B*, align 8
store %class.B* %this, %class.B** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.B** %this.addr}, metadata !123, metadata !{}), !dbg !124
+ call void @llvm.dbg.declare(metadata !{%class.B** %this.addr}, metadata !123), !dbg !124
%this1 = load %class.B** %this.addr
ret void, !dbg !125
}
@@ -218,7 +218,7 @@
%exn.slot = alloca i8*
%ehselector.slot = alloca i32
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !126, metadata !{}), !dbg !127
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !126), !dbg !127
%this1 = load %class.A** %this.addr
invoke void @_ZN1AD2Ev(%class.A* %this1)
to label %invoke.cont unwind label %lpad, !dbg !128
diff --git a/llvm/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll b/llvm/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll
index 3a14b11..8816fe7 100644
--- a/llvm/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll
+++ b/llvm/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll
@@ -60,19 +60,19 @@
entry:
%a.addr = alloca i32, align 4
store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !15, metadata !{}), !dbg !16
+ call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !15), !dbg !16
%0 = load i32* %a.addr, align 4, !dbg !17
%call = call i32 @fn(i32 %0), !dbg !17
ret i32 %call, !dbg !17
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define i32 @fn(i32 %a) nounwind uwtable ssp {
entry:
%a.addr = alloca i32, align 4
store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !19, metadata !{}), !dbg !20
+ call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !19), !dbg !20
%0 = load i32* %a.addr, align 4, !dbg !21
ret i32 %0, !dbg !21
}
diff --git a/llvm/test/DebugInfo/X86/subrange-type.ll b/llvm/test/DebugInfo/X86/subrange-type.ll
index bdb3b24..14dca46 100644
--- a/llvm/test/DebugInfo/X86/subrange-type.ll
+++ b/llvm/test/DebugInfo/X86/subrange-type.ll
@@ -12,11 +12,11 @@
%retval = alloca i32, align 4
%i = alloca [2 x i32], align 4
store i32 0, i32* %retval
- call void @llvm.dbg.declare(metadata !{[2 x i32]* %i}, metadata !10, metadata !{}), !dbg !15
+ call void @llvm.dbg.declare(metadata !{[2 x i32]* %i}, metadata !10), !dbg !15
ret i32 0, !dbg !16
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!18}
diff --git a/llvm/test/DebugInfo/X86/subreg.ll b/llvm/test/DebugInfo/X86/subreg.ll
index c3b8241..ba13d35 100644
--- a/llvm/test/DebugInfo/X86/subreg.ll
+++ b/llvm/test/DebugInfo/X86/subreg.ll
@@ -10,13 +10,13 @@
define i16 @f(i16 signext %zzz) nounwind {
entry:
- call void @llvm.dbg.value(metadata !{i16 %zzz}, i64 0, metadata !0, metadata !{})
+ call void @llvm.dbg.value(metadata !{i16 %zzz}, i64 0, metadata !0)
%conv = sext i16 %zzz to i32, !dbg !7
%conv1 = trunc i32 %conv to i16
ret i16 %conv1
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!3}
!llvm.module.flags = !{!11}
diff --git a/llvm/test/DebugInfo/X86/subregisters.ll b/llvm/test/DebugInfo/X86/subregisters.ll
index 838ee74..2f2fd44 100644
--- a/llvm/test/DebugInfo/X86/subregisters.ll
+++ b/llvm/test/DebugInfo/X86/subregisters.ll
@@ -40,16 +40,16 @@
; Function Attrs: noinline nounwind ssp uwtable
define void @doSomething(%struct.bar* nocapture readonly %b) #0 {
entry:
- tail call void @llvm.dbg.value(metadata !{%struct.bar* %b}, i64 0, metadata !15, metadata !{}), !dbg !25
+ tail call void @llvm.dbg.value(metadata !{%struct.bar* %b}, i64 0, metadata !15), !dbg !25
%a1 = getelementptr inbounds %struct.bar* %b, i64 0, i32 0, !dbg !26
%0 = load i32* %a1, align 4, !dbg !26, !tbaa !27
- tail call void @llvm.dbg.value(metadata !{i32 %0}, i64 0, metadata !16, metadata !{}), !dbg !26
+ tail call void @llvm.dbg.value(metadata !{i32 %0}, i64 0, metadata !16), !dbg !26
%call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i64 0, i64 0), i32 %0) #4, !dbg !32
ret void, !dbg !33
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind
declare i32 @printf(i8* nocapture readonly, ...) #2
@@ -59,14 +59,14 @@
entry:
%myBar = alloca i64, align 8, !dbg !34
%tmpcast = bitcast i64* %myBar to %struct.bar*, !dbg !34
- tail call void @llvm.dbg.declare(metadata !{%struct.bar* %tmpcast}, metadata !21, metadata !{}), !dbg !34
+ tail call void @llvm.dbg.declare(metadata !{%struct.bar* %tmpcast}, metadata !21), !dbg !34
store i64 17179869187, i64* %myBar, align 8, !dbg !34
call void @doSomething(%struct.bar* %tmpcast), !dbg !35
ret i32 0, !dbg !36
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata) #1
attributes #0 = { noinline nounwind ssp uwtable }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/union-template.ll b/llvm/test/DebugInfo/X86/union-template.ll
index a6bb4ac..5fdb349 100644
--- a/llvm/test/DebugInfo/X86/union-template.ll
+++ b/llvm/test/DebugInfo/X86/union-template.ll
@@ -16,12 +16,12 @@
%value.addr = alloca float, align 4
%tempValue = alloca %"union.PR15637::Value", align 4
store float %value, float* %value.addr, align 4
- call void @llvm.dbg.declare(metadata !{float* %value.addr}, metadata !23, metadata !{}), !dbg !24
- call void @llvm.dbg.declare(metadata !{%"union.PR15637::Value"* %tempValue}, metadata !25, metadata !{}), !dbg !26
+ call void @llvm.dbg.declare(metadata !{float* %value.addr}, metadata !23), !dbg !24
+ call void @llvm.dbg.declare(metadata !{%"union.PR15637::Value"* %tempValue}, metadata !25), !dbg !26
ret void, !dbg !27
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
attributes #0 = { nounwind }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/vla.ll b/llvm/test/DebugInfo/X86/vla.ll
index 26370b0..3e6f4ce 100644
--- a/llvm/test/DebugInfo/X86/vla.ll
+++ b/llvm/test/DebugInfo/X86/vla.ll
@@ -27,13 +27,13 @@
%saved_stack = alloca i8*
%cleanup.dest.slot = alloca i32
store i32 %n, i32* %n.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %n.addr}, metadata !15, metadata !{}), !dbg !16
+ call void @llvm.dbg.declare(metadata !{i32* %n.addr}, metadata !15), !dbg !16
%0 = load i32* %n.addr, align 4, !dbg !17
%1 = zext i32 %0 to i64, !dbg !17
%2 = call i8* @llvm.stacksave(), !dbg !17
store i8* %2, i8** %saved_stack, !dbg !17
%vla = alloca i32, i64 %1, align 16, !dbg !17
- call void @llvm.dbg.declare(metadata !{i32* %vla}, metadata !18, metadata !{}), !dbg !17
+ call void @llvm.dbg.declare(metadata !{i32* %vla}, metadata !18), !dbg !17
%arrayidx = getelementptr inbounds i32* %vla, i64 0, !dbg !22
store i32 42, i32* %arrayidx, align 4, !dbg !22
%3 = load i32* %n.addr, align 4, !dbg !23
@@ -48,7 +48,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
; Function Attrs: nounwind
declare i8* @llvm.stacksave() nounwind
@@ -64,9 +64,9 @@
%argv.addr = alloca i8**, align 8
store i32 0, i32* %retval
store i32 %argc, i32* %argc.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !25, metadata !{}), !dbg !26
+ call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !25), !dbg !26
store i8** %argv, i8*** %argv.addr, align 8
- call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !27, metadata !{}), !dbg !26
+ call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !27), !dbg !26
%0 = load i32* %argc.addr, align 4, !dbg !28
%call = call i32 @vla(i32 %0), !dbg !28
ret i32 %call, !dbg !28
diff --git a/llvm/test/DebugInfo/array.ll b/llvm/test/DebugInfo/array.ll
index da43929..72b0b99 100644
--- a/llvm/test/DebugInfo/array.ll
+++ b/llvm/test/DebugInfo/array.ll
@@ -6,11 +6,11 @@
%retval = alloca i32, align 4
%a = alloca [0 x i32], align 4
store i32 0, i32* %retval
- call void @llvm.dbg.declare(metadata !{[0 x i32]* %a}, metadata !6, metadata !{}), !dbg !11
+ call void @llvm.dbg.declare(metadata !{[0 x i32]* %a}, metadata !6), !dbg !11
ret i32 0, !dbg !12
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!16}
diff --git a/llvm/test/DebugInfo/cross-cu-inlining.ll b/llvm/test/DebugInfo/cross-cu-inlining.ll
index 6cd29db..8a0e3c5 100644
--- a/llvm/test/DebugInfo/cross-cu-inlining.ll
+++ b/llvm/test/DebugInfo/cross-cu-inlining.ll
@@ -65,7 +65,7 @@
%1 = bitcast i32* %x.addr.i to i8*
call void @llvm.lifetime.start(i64 4, i8* %1)
store i32 %0, i32* %x.addr.i, align 4
- call void @llvm.dbg.declare(metadata !{i32* %x.addr.i}, metadata !20, metadata !{}), !dbg !21
+ call void @llvm.dbg.declare(metadata !{i32* %x.addr.i}, metadata !20), !dbg !21
%2 = load i32* %x.addr.i, align 4, !dbg !22
%mul.i = mul nsw i32 %2, 2, !dbg !22
%3 = bitcast i32* %x.addr.i to i8*, !dbg !22
@@ -78,14 +78,14 @@
entry:
%x.addr = alloca i32, align 4
store i32 %x, i32* %x.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %x.addr}, metadata !20, metadata !{}), !dbg !23
+ call void @llvm.dbg.declare(metadata !{i32* %x.addr}, metadata !20), !dbg !23
%0 = load i32* %x.addr, align 4, !dbg !24
%mul = mul nsw i32 %0, 2, !dbg !24
ret i32 %mul, !dbg !24
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #2
+declare void @llvm.dbg.declare(metadata, metadata) #2
; Function Attrs: nounwind
declare void @llvm.lifetime.start(i64, i8* nocapture) #3
diff --git a/llvm/test/DebugInfo/cross-cu-linkonce-distinct.ll b/llvm/test/DebugInfo/cross-cu-linkonce-distinct.ll
index 4440acf..67eb6c0 100644
--- a/llvm/test/DebugInfo/cross-cu-linkonce-distinct.ll
+++ b/llvm/test/DebugInfo/cross-cu-linkonce-distinct.ll
@@ -52,14 +52,14 @@
define linkonce_odr i32 @_Z4funci(i32 %i) #0 {
%1 = alloca i32, align 4
store i32 %i, i32* %1, align 4
- call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !22, metadata !{}), !dbg !23
+ call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !22), !dbg !23
%2 = load i32* %1, align 4, !dbg !24
%3 = mul nsw i32 %2, 2, !dbg !24
ret i32 %3, !dbg !24
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
attributes #0 = { inlinehint nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/cross-cu-linkonce.ll b/llvm/test/DebugInfo/cross-cu-linkonce.ll
index 2a9ae82..660d570 100644
--- a/llvm/test/DebugInfo/cross-cu-linkonce.ll
+++ b/llvm/test/DebugInfo/cross-cu-linkonce.ll
@@ -32,14 +32,14 @@
define linkonce_odr i32 @_Z4funci(i32 %i) #0 {
%1 = alloca i32, align 4
store i32 %i, i32* %1, align 4
- call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !20, metadata !{}), !dbg !21
+ call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !20), !dbg !21
%2 = load i32* %1, align 4, !dbg !22
%3 = mul nsw i32 %2, 2, !dbg !22
ret i32 %3, !dbg !22
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
attributes #0 = { inlinehint nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/cu-range-hole.ll b/llvm/test/DebugInfo/cu-range-hole.ll
index 9616441..65a4956 100644
--- a/llvm/test/DebugInfo/cu-range-hole.ll
+++ b/llvm/test/DebugInfo/cu-range-hole.ll
@@ -18,7 +18,7 @@
entry:
%c.addr = alloca i32, align 4
store i32 %c, i32* %c.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %c.addr}, metadata !13, metadata !{}), !dbg !14
+ call void @llvm.dbg.declare(metadata !{i32* %c.addr}, metadata !13), !dbg !14
%0 = load i32* %c.addr, align 4, !dbg !14
%add = add nsw i32 %0, 1, !dbg !14
ret i32 %add, !dbg !14
@@ -35,14 +35,14 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind uwtable
define i32 @d(i32 %e) #0 {
entry:
%e.addr = alloca i32, align 4
store i32 %e, i32* %e.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %e.addr}, metadata !15, metadata !{}), !dbg !16
+ call void @llvm.dbg.declare(metadata !{i32* %e.addr}, metadata !15), !dbg !16
%0 = load i32* %e.addr, align 4, !dbg !16
%add = add nsw i32 %0, 1, !dbg !16
ret i32 %add, !dbg !16
diff --git a/llvm/test/DebugInfo/cu-ranges.ll b/llvm/test/DebugInfo/cu-ranges.ll
index 12f9347..9262a22 100644
--- a/llvm/test/DebugInfo/cu-ranges.ll
+++ b/llvm/test/DebugInfo/cu-ranges.ll
@@ -22,21 +22,21 @@
entry:
%a.addr = alloca i32, align 4
store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !13, metadata !{}), !dbg !14
+ call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !13), !dbg !14
%0 = load i32* %a.addr, align 4, !dbg !15
%add = add nsw i32 %0, 5, !dbg !15
ret i32 %add, !dbg !15
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind uwtable
define i32 @bar(i32 %a) #0 {
entry:
%a.addr = alloca i32, align 4
store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !16, metadata !{}), !dbg !17
+ call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !16), !dbg !17
%0 = load i32* %a.addr, align 4, !dbg !18
%add = add nsw i32 %0, 5, !dbg !18
ret i32 %add, !dbg !18
diff --git a/llvm/test/DebugInfo/dead-argument-order.ll b/llvm/test/DebugInfo/dead-argument-order.ll
index 4ec3cd2..ea805a4 100644
--- a/llvm/test/DebugInfo/dead-argument-order.ll
+++ b/llvm/test/DebugInfo/dead-argument-order.ll
@@ -38,17 +38,17 @@
; Function Attrs: nounwind readnone uwtable
define i32 @_Z8function1Si(i32 %s.coerce, i32 %i) #0 {
entry:
- tail call void @llvm.dbg.declare(metadata !19, metadata !14, metadata !{}), !dbg !20
- tail call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !15, metadata !{}), !dbg !20
+ tail call void @llvm.dbg.declare(metadata !19, metadata !14), !dbg !20
+ tail call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !15), !dbg !20
%add = add nsw i32 %i, %s.coerce, !dbg !20
ret i32 %add, !dbg !20
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata) #1
attributes #0 = { nounwind readnone uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/debug-info-qualifiers.ll b/llvm/test/DebugInfo/debug-info-qualifiers.ll
index 715b904..b624d38 100644
--- a/llvm/test/DebugInfo/debug-info-qualifiers.ll
+++ b/llvm/test/DebugInfo/debug-info-qualifiers.ll
@@ -39,16 +39,16 @@
%a = alloca %class.A, align 1
%pl = alloca { i64, i64 }, align 8
%pr = alloca { i64, i64 }, align 8
- call void @llvm.dbg.declare(metadata !{%class.A* %a}, metadata !24, metadata !{}), !dbg !25
- call void @llvm.dbg.declare(metadata !{{ i64, i64 }* %pl}, metadata !26, metadata !{}), !dbg !31
+ call void @llvm.dbg.declare(metadata !{%class.A* %a}, metadata !24), !dbg !25
+ call void @llvm.dbg.declare(metadata !{{ i64, i64 }* %pl}, metadata !26), !dbg !31
store { i64, i64 } { i64 ptrtoint (void (%class.A*)* @_ZNKR1A1lEv to i64), i64 0 }, { i64, i64 }* %pl, align 8, !dbg !31
- call void @llvm.dbg.declare(metadata !{{ i64, i64 }* %pr}, metadata !32, metadata !{}), !dbg !35
+ call void @llvm.dbg.declare(metadata !{{ i64, i64 }* %pr}, metadata !32), !dbg !35
store { i64, i64 } { i64 ptrtoint (void (%class.A*)* @_ZNKO1A1rEv to i64), i64 0 }, { i64, i64 }* %pr, align 8, !dbg !35
ret void, !dbg !36
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
declare void @_ZNKR1A1lEv(%class.A*)
diff --git a/llvm/test/DebugInfo/dwarf-public-names.ll b/llvm/test/DebugInfo/dwarf-public-names.ll
index 61025ab..7218964 100644
--- a/llvm/test/DebugInfo/dwarf-public-names.ll
+++ b/llvm/test/DebugInfo/dwarf-public-names.ll
@@ -59,13 +59,13 @@
entry:
%this.addr = alloca %struct.C*, align 8
store %struct.C* %this, %struct.C** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr}, metadata !28, metadata !{}), !dbg !30
+ call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr}, metadata !28), !dbg !30
%this1 = load %struct.C** %this.addr
store i32 0, i32* @_ZN1C22static_member_variableE, align 4, !dbg !31
ret void, !dbg !32
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define i32 @_ZN1C22static_member_functionEv() nounwind uwtable align 2 {
entry:
diff --git a/llvm/test/DebugInfo/enum-types.ll b/llvm/test/DebugInfo/enum-types.ll
index 509dd0c..bcdba37 100644
--- a/llvm/test/DebugInfo/enum-types.ll
+++ b/llvm/test/DebugInfo/enum-types.ll
@@ -25,19 +25,19 @@
entry:
%sa.addr = alloca i32, align 4
store i32 %sa, i32* %sa.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %sa.addr}, metadata !22, metadata !{}), !dbg !23
+ call void @llvm.dbg.declare(metadata !{i32* %sa.addr}, metadata !22), !dbg !23
ret void, !dbg !24
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind ssp uwtable
define void @_Z4topB2EA(i32 %sa) #0 {
entry:
%sa.addr = alloca i32, align 4
store i32 %sa, i32* %sa.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %sa.addr}, metadata !25, metadata !{}), !dbg !26
+ call void @llvm.dbg.declare(metadata !{i32* %sa.addr}, metadata !25), !dbg !26
ret void, !dbg !27
}
diff --git a/llvm/test/DebugInfo/enum.ll b/llvm/test/DebugInfo/enum.ll
index c71ac40..df097a6 100644
--- a/llvm/test/DebugInfo/enum.ll
+++ b/llvm/test/DebugInfo/enum.ll
@@ -39,13 +39,13 @@
define void @_Z4funcv() #0 {
entry:
%b = alloca i32, align 4
- call void @llvm.dbg.declare(metadata !{i32* %b}, metadata !20, metadata !{}), !dbg !22
+ call void @llvm.dbg.declare(metadata !{i32* %b}, metadata !20), !dbg !22
store i32 0, i32* %b, align 4, !dbg !22
ret void, !dbg !23
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/incorrect-variable-debugloc.ll b/llvm/test/DebugInfo/incorrect-variable-debugloc.ll
index 92d1988..284704c 100644
--- a/llvm/test/DebugInfo/incorrect-variable-debugloc.ll
+++ b/llvm/test/DebugInfo/incorrect-variable-debugloc.ll
@@ -110,7 +110,7 @@
; <label>:30 ; preds = %24, %5
store i32 0, i32* %i.i, align 4, !dbg !39, !tbaa !41
- tail call void @llvm.dbg.value(metadata !{%struct.C* %8}, i64 0, metadata !27, metadata !{}), !dbg !46
+ tail call void @llvm.dbg.value(metadata !{%struct.C* %8}, i64 0, metadata !27), !dbg !46
call void @_ZN1C5m_fn3Ev(%struct.C* %8), !dbg !47
unreachable, !dbg !47
}
@@ -145,7 +145,7 @@
%16 = add i64 %15, 0, !dbg !48
%17 = inttoptr i64 %16 to i64*, !dbg !48
store i64 -868083113472691727, i64* %17, !dbg !48
- tail call void @llvm.dbg.value(metadata !{%struct.C* %this}, i64 0, metadata !30, metadata !{}), !dbg !48
+ tail call void @llvm.dbg.value(metadata !{%struct.C* %this}, i64 0, metadata !30), !dbg !48
%call = call i32 @_ZN1A5m_fn1Ev(%struct.A* %8), !dbg !49
%i.i = getelementptr inbounds %struct.C* %this, i64 0, i32 1, i32 0, !dbg !50
%18 = ptrtoint i32* %i.i to i64, !dbg !50
@@ -198,7 +198,7 @@
declare i32 @_ZN1A5m_fn1Ev(%struct.A*) #2
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #3
+declare void @llvm.dbg.value(metadata, i64, metadata) #3
define internal void @asan.module_ctor() {
tail call void @__asan_init_v3()
diff --git a/llvm/test/DebugInfo/inheritance.ll b/llvm/test/DebugInfo/inheritance.ll
index 05ed8a2..6b3ae09 100644
--- a/llvm/test/DebugInfo/inheritance.ll
+++ b/llvm/test/DebugInfo/inheritance.ll
@@ -16,7 +16,7 @@
%0 = alloca i32 ; <i32*> [#uses=2]
%tst = alloca %struct.test1 ; <%struct.test1*> [#uses=1]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.declare(metadata !{%struct.test1* %tst}, metadata !0, metadata !{}), !dbg !21
+ call void @llvm.dbg.declare(metadata !{%struct.test1* %tst}, metadata !0), !dbg !21
call void @_ZN5test1C1Ev(%struct.test1* %tst) nounwind, !dbg !22
store i32 0, i32* %0, align 4, !dbg !23
%1 = load i32* %0, align 4, !dbg !23 ; <i32> [#uses=1]
@@ -32,7 +32,7 @@
entry:
%this_addr = alloca %struct.test1* ; <%struct.test1**> [#uses=2]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.declare(metadata !{%struct.test1** %this_addr}, metadata !24, metadata !{}), !dbg !28
+ call void @llvm.dbg.declare(metadata !{%struct.test1** %this_addr}, metadata !24), !dbg !28
store %struct.test1* %this, %struct.test1** %this_addr
%0 = load %struct.test1** %this_addr, align 8, !dbg !28 ; <%struct.test1*> [#uses=1]
%1 = getelementptr inbounds %struct.test1* %0, i32 0, i32 0, !dbg !28 ; <i32 (...)***> [#uses=1]
@@ -43,13 +43,13 @@
ret void, !dbg !29
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define linkonce_odr void @_ZN5test1D1Ev(%struct.test1* %this) nounwind ssp align 2 {
entry:
%this_addr = alloca %struct.test1* ; <%struct.test1**> [#uses=3]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.declare(metadata !{%struct.test1** %this_addr}, metadata !32, metadata !{}), !dbg !34
+ call void @llvm.dbg.declare(metadata !{%struct.test1** %this_addr}, metadata !32), !dbg !34
store %struct.test1* %this, %struct.test1** %this_addr
%0 = load %struct.test1** %this_addr, align 8, !dbg !35 ; <%struct.test1*> [#uses=1]
%1 = getelementptr inbounds %struct.test1* %0, i32 0, i32 0, !dbg !35 ; <i32 (...)***> [#uses=1]
@@ -78,7 +78,7 @@
entry:
%this_addr = alloca %struct.test1* ; <%struct.test1**> [#uses=3]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.declare(metadata !{%struct.test1** %this_addr}, metadata !38, metadata !{}), !dbg !40
+ call void @llvm.dbg.declare(metadata !{%struct.test1** %this_addr}, metadata !38), !dbg !40
store %struct.test1* %this, %struct.test1** %this_addr
%0 = load %struct.test1** %this_addr, align 8, !dbg !41 ; <%struct.test1*> [#uses=1]
%1 = getelementptr inbounds %struct.test1* %0, i32 0, i32 0, !dbg !41 ; <i32 (...)***> [#uses=1]
diff --git a/llvm/test/DebugInfo/inline-debug-info-multiret.ll b/llvm/test/DebugInfo/inline-debug-info-multiret.ll
index 97e22e5..594512f 100644
--- a/llvm/test/DebugInfo/inline-debug-info-multiret.ll
+++ b/llvm/test/DebugInfo/inline-debug-info-multiret.ll
@@ -27,8 +27,8 @@
%k.addr = alloca i32, align 4
%k2 = alloca i32, align 4
store i32 %k, i32* %k.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %k.addr}, metadata !13, metadata !{}), !dbg !14
- call void @llvm.dbg.declare(metadata !{i32* %k2}, metadata !15, metadata !{}), !dbg !16
+ call void @llvm.dbg.declare(metadata !{i32* %k.addr}, metadata !13), !dbg !14
+ call void @llvm.dbg.declare(metadata !{i32* %k2}, metadata !15), !dbg !16
%0 = load i32* %k.addr, align 4, !dbg !16
%call = call i32 @_Z8test_exti(i32 %0), !dbg !16
store i32 %call, i32* %k2, align 4, !dbg !16
@@ -53,7 +53,7 @@
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
declare i32 @_Z8test_exti(i32)
@@ -85,7 +85,7 @@
br i1 %matches, label %catch, label %eh.resume, !dbg !23
catch: ; preds = %catch.dispatch
- call void @llvm.dbg.declare(metadata !{i32* %e}, metadata !24, metadata !{}), !dbg !25
+ call void @llvm.dbg.declare(metadata !{i32* %e}, metadata !24), !dbg !25
%exn = load i8** %exn.slot, !dbg !23
%5 = call i8* @__cxa_begin_catch(i8* %exn) #2, !dbg !23
%6 = bitcast i8* %5 to i32*, !dbg !23
diff --git a/llvm/test/DebugInfo/inline-debug-info.ll b/llvm/test/DebugInfo/inline-debug-info.ll
index aa8be6f..b56ca95 100644
--- a/llvm/test/DebugInfo/inline-debug-info.ll
+++ b/llvm/test/DebugInfo/inline-debug-info.ll
@@ -47,8 +47,8 @@
%k.addr = alloca i32, align 4
%k2 = alloca i32, align 4
store i32 %k, i32* %k.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %k.addr}, metadata !13, metadata !{}), !dbg !14
- call void @llvm.dbg.declare(metadata !{i32* %k2}, metadata !15, metadata !{}), !dbg !16
+ call void @llvm.dbg.declare(metadata !{i32* %k.addr}, metadata !13), !dbg !14
+ call void @llvm.dbg.declare(metadata !{i32* %k2}, metadata !15), !dbg !16
%0 = load i32* %k.addr, align 4, !dbg !16
%call = call i32 @_Z8test_exti(i32 %0), !dbg !16
store i32 %call, i32* %k2, align 4, !dbg !16
@@ -71,7 +71,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
declare i32 @_Z8test_exti(i32)
@@ -103,7 +103,7 @@
br i1 %matches, label %catch, label %eh.resume, !dbg !23
catch: ; preds = %catch.dispatch
- call void @llvm.dbg.declare(metadata !{i32* %e}, metadata !24, metadata !{}), !dbg !25
+ call void @llvm.dbg.declare(metadata !{i32* %e}, metadata !24), !dbg !25
%exn = load i8** %exn.slot, !dbg !23
%5 = call i8* @__cxa_begin_catch(i8* %exn) #2, !dbg !23
%6 = bitcast i8* %5 to i32*, !dbg !23
diff --git a/llvm/test/DebugInfo/inline-scopes.ll b/llvm/test/DebugInfo/inline-scopes.ll
index b28388b..b42c1f0 100644
--- a/llvm/test/DebugInfo/inline-scopes.ll
+++ b/llvm/test/DebugInfo/inline-scopes.ll
@@ -43,7 +43,7 @@
%b.i3 = alloca i8, align 1
%retval.i = alloca i32, align 4
%b.i = alloca i8, align 1
- call void @llvm.dbg.declare(metadata !{i8* %b.i}, metadata !16, metadata !{}), !dbg !19
+ call void @llvm.dbg.declare(metadata !{i8* %b.i}, metadata !16), !dbg !19
%call.i = call zeroext i1 @_Z1fv(), !dbg !19
%frombool.i = zext i1 %call.i to i8, !dbg !19
store i8 %frombool.i, i8* %b.i, align 1, !dbg !19
@@ -61,7 +61,7 @@
_Z2f1v.exit: ; preds = %if.then.i, %if.end.i
%1 = load i32* %retval.i, !dbg !23
- call void @llvm.dbg.declare(metadata !{i8* %b.i3}, metadata !24, metadata !{}), !dbg !27
+ call void @llvm.dbg.declare(metadata !{i8* %b.i3}, metadata !24), !dbg !27
%call.i4 = call zeroext i1 @_Z1fv(), !dbg !27
%frombool.i5 = zext i1 %call.i4 to i8, !dbg !27
store i8 %frombool.i5, i8* %b.i3, align 1, !dbg !27
@@ -83,7 +83,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
declare zeroext i1 @_Z1fv() #2
diff --git a/llvm/test/DebugInfo/inlined-arguments.ll b/llvm/test/DebugInfo/inlined-arguments.ll
index afd686d..b08dbec 100644
--- a/llvm/test/DebugInfo/inlined-arguments.ll
+++ b/llvm/test/DebugInfo/inlined-arguments.ll
@@ -24,16 +24,16 @@
; Function Attrs: uwtable
define void @_Z2f2v() #0 {
- tail call void @llvm.dbg.value(metadata !15, i64 0, metadata !16, metadata !{}), !dbg !18
- tail call void @llvm.dbg.value(metadata !19, i64 0, metadata !20, metadata !{}), !dbg !18
+ tail call void @llvm.dbg.value(metadata !15, i64 0, metadata !16), !dbg !18
+ tail call void @llvm.dbg.value(metadata !19, i64 0, metadata !20), !dbg !18
tail call void @_Z2f3i(i32 2), !dbg !21
ret void, !dbg !22
}
; Function Attrs: uwtable
define void @_Z2f1ii(i32 %x, i32 %y) #0 {
- tail call void @llvm.dbg.value(metadata !{i32 %x}, i64 0, metadata !13, metadata !{}), !dbg !23
- tail call void @llvm.dbg.value(metadata !{i32 %y}, i64 0, metadata !14, metadata !{}), !dbg !23
+ tail call void @llvm.dbg.value(metadata !{i32 %x}, i64 0, metadata !13), !dbg !23
+ tail call void @llvm.dbg.value(metadata !{i32 %y}, i64 0, metadata !14), !dbg !23
tail call void @_Z2f3i(i32 %y), !dbg !24
ret void, !dbg !25
}
@@ -41,7 +41,7 @@
declare void @_Z2f3i(i32) #1
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
+declare void @llvm.dbg.value(metadata, i64, metadata) #2
attributes #0 = { uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
diff --git a/llvm/test/DebugInfo/inlined-vars.ll b/llvm/test/DebugInfo/inlined-vars.ll
index d78a77e..9cfde1f 100644
--- a/llvm/test/DebugInfo/inlined-vars.ll
+++ b/llvm/test/DebugInfo/inlined-vars.ll
@@ -4,8 +4,8 @@
define i32 @main() uwtable {
entry:
- tail call void @llvm.dbg.value(metadata !1, i64 0, metadata !18, metadata !{}), !dbg !21
- tail call void @llvm.dbg.value(metadata !1, i64 0, metadata !22, metadata !{}), !dbg !23
+ tail call void @llvm.dbg.value(metadata !1, i64 0, metadata !18), !dbg !21
+ tail call void @llvm.dbg.value(metadata !1, i64 0, metadata !22), !dbg !23
tail call void @smth(i32 0), !dbg !24
tail call void @smth(i32 0), !dbg !25
ret i32 0, !dbg !19
@@ -13,7 +13,7 @@
declare void @smth(i32)
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!27}
diff --git a/llvm/test/DebugInfo/member-order.ll b/llvm/test/DebugInfo/member-order.ll
index 388e50c..652a6cd 100644
--- a/llvm/test/DebugInfo/member-order.ll
+++ b/llvm/test/DebugInfo/member-order.ll
@@ -29,13 +29,13 @@
entry:
%this.addr = alloca %struct.foo*, align 8
store %struct.foo* %this, %struct.foo** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.foo** %this.addr}, metadata !16, metadata !{}), !dbg !18
+ call void @llvm.dbg.declare(metadata !{%struct.foo** %this.addr}, metadata !16), !dbg !18
%this1 = load %struct.foo** %this.addr
ret void, !dbg !19
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/missing-abstract-variable.ll b/llvm/test/DebugInfo/missing-abstract-variable.ll
index 0276d90..2d4ba07 100644
--- a/llvm/test/DebugInfo/missing-abstract-variable.ll
+++ b/llvm/test/DebugInfo/missing-abstract-variable.ll
@@ -99,7 +99,7 @@
; Function Attrs: uwtable
define void @_Z1bv() #0 {
entry:
- tail call void @llvm.dbg.value(metadata !24, i64 0, metadata !25, metadata !{}), !dbg !27
+ tail call void @llvm.dbg.value(metadata !24, i64 0, metadata !25), !dbg !27
tail call void @_Z1fi(i32 0), !dbg !28
ret void, !dbg !29
}
@@ -107,13 +107,13 @@
; Function Attrs: uwtable
define void @_Z1ab(i1 zeroext %u) #0 {
entry:
- tail call void @llvm.dbg.value(metadata !{i1 %u}, i64 0, metadata !13, metadata !{}), !dbg !30
- tail call void @llvm.dbg.value(metadata !{i1 %u}, i64 0, metadata !31, metadata !{}), !dbg !33
+ tail call void @llvm.dbg.value(metadata !{i1 %u}, i64 0, metadata !13), !dbg !30
+ tail call void @llvm.dbg.value(metadata !{i1 %u}, i64 0, metadata !31), !dbg !33
br i1 %u, label %if.then.i, label %_Z1xb.exit, !dbg !34
if.then.i: ; preds = %entry
%0 = load i32* @t, align 4, !dbg !35, !tbaa !36
- tail call void @llvm.dbg.value(metadata !{i32 %0}, i64 0, metadata !40, metadata !{}), !dbg !35
+ tail call void @llvm.dbg.value(metadata !{i32 %0}, i64 0, metadata !40), !dbg !35
tail call void @_Z1fi(i32 %0), !dbg !41
br label %_Z1xb.exit, !dbg !42
@@ -125,7 +125,7 @@
declare void @_Z1fi(i32) #1
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
+declare void @llvm.dbg.value(metadata, i64, metadata) #2
attributes #0 = { uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
diff --git a/llvm/test/DebugInfo/namespace.ll b/llvm/test/DebugInfo/namespace.ll
index 51e7af7..a1b0ce7 100644
--- a/llvm/test/DebugInfo/namespace.ll
+++ b/llvm/test/DebugInfo/namespace.ll
@@ -152,12 +152,12 @@
entry:
%.addr = alloca i32, align 4
store i32 %0, i32* %.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %.addr}, metadata !42, metadata !{}), !dbg !43
+ call void @llvm.dbg.declare(metadata !{i32* %.addr}, metadata !42), !dbg !43
ret void, !dbg !43
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind uwtable
define i32 @_Z4funcb(i1 zeroext %b) #0 {
@@ -167,7 +167,7 @@
%x = alloca %"struct.A::B::bar", align 1
%frombool = zext i1 %b to i8
store i8 %frombool, i8* %b.addr, align 1
- call void @llvm.dbg.declare(metadata !{i8* %b.addr}, metadata !44, metadata !{}), !dbg !45
+ call void @llvm.dbg.declare(metadata !{i8* %b.addr}, metadata !44), !dbg !45
%0 = load i8* %b.addr, align 1, !dbg !46
%tobool = trunc i8 %0 to i1, !dbg !46
br i1 %tobool, label %if.then, label %if.end, !dbg !46
@@ -178,7 +178,7 @@
br label %return, !dbg !47
if.end: ; preds = %entry
- call void @llvm.dbg.declare(metadata !{%"struct.A::B::bar"* %x}, metadata !48, metadata !{}), !dbg !49
+ call void @llvm.dbg.declare(metadata !{%"struct.A::B::bar"* %x}, metadata !48), !dbg !49
%2 = load i32* @_ZN1A1B1iE, align 4, !dbg !50
%3 = load i32* @_ZN1A1B1iE, align 4, !dbg !50
%add = add nsw i32 %2, %3, !dbg !50
diff --git a/llvm/test/DebugInfo/namespace_inline_function_definition.ll b/llvm/test/DebugInfo/namespace_inline_function_definition.ll
index 7964ff9..65fa4a4 100644
--- a/llvm/test/DebugInfo/namespace_inline_function_definition.ll
+++ b/llvm/test/DebugInfo/namespace_inline_function_definition.ll
@@ -42,7 +42,7 @@
store i32 0, i32* %retval
%0 = load i32* @x, align 4, !dbg !16
store i32 %0, i32* %i.addr.i, align 4
- call void @llvm.dbg.declare(metadata !{i32* %i.addr.i}, metadata !17, metadata !{}), !dbg !18
+ call void @llvm.dbg.declare(metadata !{i32* %i.addr.i}, metadata !17), !dbg !18
%1 = load i32* %i.addr.i, align 4, !dbg !18
%mul.i = mul nsw i32 %1, 2, !dbg !18
ret i32 %mul.i, !dbg !16
@@ -53,14 +53,14 @@
entry:
%i.addr = alloca i32, align 4
store i32 %i, i32* %i.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %i.addr}, metadata !17, metadata !{}), !dbg !19
+ call void @llvm.dbg.declare(metadata !{i32* %i.addr}, metadata !17), !dbg !19
%0 = load i32* %i.addr, align 4, !dbg !19
%mul = mul nsw i32 %0, 2, !dbg !19
ret i32 %mul, !dbg !19
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #2
+declare void @llvm.dbg.declare(metadata, metadata) #2
attributes #0 = { uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { alwaysinline nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
diff --git a/llvm/test/DebugInfo/restrict.ll b/llvm/test/DebugInfo/restrict.ll
index 7d201ed..ceb844f 100644
--- a/llvm/test/DebugInfo/restrict.ll
+++ b/llvm/test/DebugInfo/restrict.ll
@@ -21,12 +21,12 @@
entry:
%dst.addr = alloca i8*, align 8
store i8* %dst, i8** %dst.addr, align 8
- call void @llvm.dbg.declare(metadata !{i8** %dst.addr}, metadata !13, metadata !{}), !dbg !14
+ call void @llvm.dbg.declare(metadata !{i8** %dst.addr}, metadata !13), !dbg !14
ret void, !dbg !15
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/sugared-constants.ll b/llvm/test/DebugInfo/sugared-constants.ll
index 3c218a0..0d2ebe6 100644
--- a/llvm/test/DebugInfo/sugared-constants.ll
+++ b/llvm/test/DebugInfo/sugared-constants.ll
@@ -24,11 +24,11 @@
; Function Attrs: uwtable
define i32 @main() #0 {
entry:
- tail call void @llvm.dbg.value(metadata !20, i64 0, metadata !10, metadata !{}), !dbg !21
+ tail call void @llvm.dbg.value(metadata !20, i64 0, metadata !10), !dbg !21
tail call void @_Z4funci(i32 42), !dbg !22
- tail call void @llvm.dbg.value(metadata !23, i64 0, metadata !12, metadata !{}), !dbg !24
+ tail call void @llvm.dbg.value(metadata !23, i64 0, metadata !12), !dbg !24
tail call void @_Z4funcj(i32 117), !dbg !25
- tail call void @llvm.dbg.value(metadata !26, i64 0, metadata !15, metadata !{}), !dbg !27
+ tail call void @llvm.dbg.value(metadata !26, i64 0, metadata !15), !dbg !27
tail call void @_Z4funcDs(i16 zeroext 7), !dbg !28
ret i32 0, !dbg !29
}
@@ -40,7 +40,7 @@
declare void @_Z4funcDs(i16 zeroext) #1
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
+declare void @llvm.dbg.value(metadata, i64, metadata) #2
attributes #0 = { uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
diff --git a/llvm/test/DebugInfo/tu-composite.ll b/llvm/test/DebugInfo/tu-composite.ll
index 44c8237..7a8ff57 100644
--- a/llvm/test/DebugInfo/tu-composite.ll
+++ b/llvm/test/DebugInfo/tu-composite.ll
@@ -91,13 +91,13 @@
entry:
%this.addr = alloca %struct.C*, align 8
store %struct.C* %this, %struct.C** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr}, metadata !36, metadata !{}), !dbg !38
+ call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr}, metadata !36), !dbg !38
%this1 = load %struct.C** %this.addr
ret void, !dbg !39
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind ssp uwtable
define void @_Z4testv() #0 {
@@ -108,12 +108,12 @@
%e = alloca %"struct.D::Nested", align 1
%p = alloca %"struct.D::Nested2"*, align 8
%t = alloca %"struct.D::virt", align 8
- call void @llvm.dbg.declare(metadata !{%struct.bar* %B}, metadata !40, metadata !{}), !dbg !42
- call void @llvm.dbg.declare(metadata !{[3 x %struct.bar]* %A}, metadata !43, metadata !{}), !dbg !47
- call void @llvm.dbg.declare(metadata !{%struct.bar* %B2}, metadata !48, metadata !{}), !dbg !50
- call void @llvm.dbg.declare(metadata !{%"struct.D::Nested"* %e}, metadata !51, metadata !{}), !dbg !52
- call void @llvm.dbg.declare(metadata !{%"struct.D::Nested2"** %p}, metadata !53, metadata !{}), !dbg !55
- call void @llvm.dbg.declare(metadata !{%"struct.D::virt"* %t}, metadata !56, metadata !{}), !dbg !57
+ call void @llvm.dbg.declare(metadata !{%struct.bar* %B}, metadata !40), !dbg !42
+ call void @llvm.dbg.declare(metadata !{[3 x %struct.bar]* %A}, metadata !43), !dbg !47
+ call void @llvm.dbg.declare(metadata !{%struct.bar* %B2}, metadata !48), !dbg !50
+ call void @llvm.dbg.declare(metadata !{%"struct.D::Nested"* %e}, metadata !51), !dbg !52
+ call void @llvm.dbg.declare(metadata !{%"struct.D::Nested2"** %p}, metadata !53), !dbg !55
+ call void @llvm.dbg.declare(metadata !{%"struct.D::virt"* %t}, metadata !56), !dbg !57
ret void, !dbg !58
}
diff --git a/llvm/test/DebugInfo/two-cus-from-same-file.ll b/llvm/test/DebugInfo/two-cus-from-same-file.ll
index 4e7fcb2..fab8382 100644
--- a/llvm/test/DebugInfo/two-cus-from-same-file.ll
+++ b/llvm/test/DebugInfo/two-cus-from-same-file.ll
@@ -23,14 +23,14 @@
define i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
entry:
- tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !21, metadata !{}), !dbg !26
- tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !22, metadata !{}), !dbg !27
+ tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !21), !dbg !26
+ tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !22), !dbg !27
%puts = tail call i32 @puts(i8* getelementptr inbounds ([6 x i8]* @str1, i32 0, i32 0)), !dbg !28
tail call void @foo() nounwind, !dbg !30
ret i32 0, !dbg !31
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!0, !9}
!llvm.module.flags = !{!33}
diff --git a/llvm/test/DebugInfo/unconditional-branch.ll b/llvm/test/DebugInfo/unconditional-branch.ll
index c245774..6c31375 100644
--- a/llvm/test/DebugInfo/unconditional-branch.ll
+++ b/llvm/test/DebugInfo/unconditional-branch.ll
@@ -22,7 +22,7 @@
entry:
%i.addr = alloca i32, align 4
store i32 %i, i32* %i.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %i.addr}, metadata !12, metadata !{}), !dbg !13
+ call void @llvm.dbg.declare(metadata !{i32* %i.addr}, metadata !12), !dbg !13
%0 = load i32* %i.addr, align 4, !dbg !14
switch i32 %0, label %sw.default [
], !dbg !14
@@ -35,7 +35,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/varargs.ll b/llvm/test/DebugInfo/varargs.ll
index 6987fd5..dfc2559 100644
--- a/llvm/test/DebugInfo/varargs.ll
+++ b/llvm/test/DebugInfo/varargs.ll
@@ -51,15 +51,15 @@
%a = alloca %struct.A, align 1
%fptr = alloca void (i32, ...)*, align 8
store i32 %c, i32* %1, align 4
- call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !21, metadata !{}), !dbg !22
- call void @llvm.dbg.declare(metadata !{%struct.A* %a}, metadata !23, metadata !{}), !dbg !24
- call void @llvm.dbg.declare(metadata !{void (i32, ...)** %fptr}, metadata !25, metadata !{}), !dbg !27
+ call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !21), !dbg !22
+ call void @llvm.dbg.declare(metadata !{%struct.A* %a}, metadata !23), !dbg !24
+ call void @llvm.dbg.declare(metadata !{void (i32, ...)** %fptr}, metadata !25), !dbg !27
store void (i32, ...)* @_Z1biz, void (i32, ...)** %fptr, align 8, !dbg !27
ret void, !dbg !28
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
attributes #0 = { nounwind ssp uwtable }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/Instrumentation/AddressSanitizer/coverage-dbg.ll b/llvm/test/Instrumentation/AddressSanitizer/coverage-dbg.ll
index 09ece29..3f7998d 100644
--- a/llvm/test/Instrumentation/AddressSanitizer/coverage-dbg.ll
+++ b/llvm/test/Instrumentation/AddressSanitizer/coverage-dbg.ll
@@ -27,14 +27,14 @@
; Function Attrs: nounwind readonly uwtable
define i32 @_ZN1A1fEv(%struct.A* nocapture readonly %this) #0 align 2 {
entry:
- tail call void @llvm.dbg.value(metadata !{%struct.A* %this}, i64 0, metadata !15, metadata !{}), !dbg !20
+ tail call void @llvm.dbg.value(metadata !{%struct.A* %this}, i64 0, metadata !15), !dbg !20
%x = getelementptr inbounds %struct.A* %this, i64 0, i32 0, !dbg !21
%0 = load i32* %x, align 4, !dbg !21
ret i32 %0, !dbg !21
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata) #1
attributes #0 = { sanitize_address nounwind readonly uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/Instrumentation/AddressSanitizer/coverage2-dbg.ll b/llvm/test/Instrumentation/AddressSanitizer/coverage2-dbg.ll
index 01a0119..ac79302 100644
--- a/llvm/test/Instrumentation/AddressSanitizer/coverage2-dbg.ll
+++ b/llvm/test/Instrumentation/AddressSanitizer/coverage2-dbg.ll
@@ -27,7 +27,7 @@
define void @_Z3fooPi(i32* %a) #0 {
entry:
- tail call void @llvm.dbg.value(metadata !{i32* %a}, i64 0, metadata !11, metadata !{}), !dbg !15
+ tail call void @llvm.dbg.value(metadata !{i32* %a}, i64 0, metadata !11), !dbg !15
%tobool = icmp eq i32* %a, null, !dbg !16
br i1 %tobool, label %if.end, label %if.then, !dbg !16
@@ -40,7 +40,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata) #1
attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" sanitize_address}
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/Instrumentation/AddressSanitizer/debug_info.ll b/llvm/test/Instrumentation/AddressSanitizer/debug_info.ll
index 195b089..336b98b 100644
--- a/llvm/test/Instrumentation/AddressSanitizer/debug_info.ll
+++ b/llvm/test/Instrumentation/AddressSanitizer/debug_info.ll
@@ -11,8 +11,8 @@
%p.addr = alloca i32, align 4
%r = alloca i32, align 4
store i32 %p, i32* %p.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %p.addr}, metadata !10, metadata !{}), !dbg !11
- call void @llvm.dbg.declare(metadata !{i32* %r}, metadata !12, metadata !{}), !dbg !14
+ call void @llvm.dbg.declare(metadata !{i32* %p.addr}, metadata !10), !dbg !11
+ call void @llvm.dbg.declare(metadata !{i32* %r}, metadata !12), !dbg !14
%0 = load i32* %p.addr, align 4, !dbg !14
%add = add nsw i32 %0, 1, !dbg !14
store i32 %add, i32* %r, align 4, !dbg !14
@@ -24,11 +24,11 @@
; CHECK: entry:
; Verify that llvm.dbg.declare calls are in the entry basic block.
; CHECK-NOT: %entry
-; CHECK: call void @llvm.dbg.declare(metadata {{.*}}, metadata ![[ARG_ID:[0-9]+]], metadata ![[OPDEREF:[0-9]+]])
+; CHECK: call void @llvm.dbg.declare(metadata {{.*}}, metadata ![[ARG_ID:[0-9]+]])
; CHECK-NOT: %entry
-; CHECK: call void @llvm.dbg.declare(metadata {{.*}}, metadata ![[VAR_ID:[0-9]+]], metadata ![[OPDEREF:[0-9]+]])
+; CHECK: call void @llvm.dbg.declare(metadata {{.*}}, metadata ![[VAR_ID:[0-9]+]])
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!17}
@@ -47,9 +47,9 @@
; Verify that debug descriptors for argument and local variable will be replaced
; with descriptors that end with OpDeref (encoded as 2).
-; CHECK: ![[ARG_ID]] = {{.*}} ; [ DW_TAG_arg_variable ] [p] [line 1]
-; CHECK: ![[OPDEREF]] = metadata !{i32 786690, i64 6}
-; CHECK: ![[VAR_ID]] = {{.*}} ; [ DW_TAG_auto_variable ] [r] [line 2]
+; CHECK: ![[ARG_ID]] = {{.*}}metadata ![[OPDEREF:[0-9]+]]} ; [ DW_TAG_arg_variable ] [p] [line 1]
+; CHECK: ![[OPDEREF]] = metadata !{i64 2}
+; CHECK: ![[VAR_ID]] = {{.*}}metadata ![[OPDEREF]]} ; [ DW_TAG_auto_variable ] [r] [line 2]
; Verify that there are no more variable descriptors.
; CHECK-NOT: DW_TAG_arg_variable
; CHECK-NOT: DW_TAG_auto_variable
diff --git a/llvm/test/Instrumentation/MemorySanitizer/store-origin.ll b/llvm/test/Instrumentation/MemorySanitizer/store-origin.ll
index e1ea63b..0bd9777 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/store-origin.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/store-origin.ll
@@ -11,14 +11,14 @@
; Function Attrs: nounwind
define void @Store(i32* nocapture %p, i32 %x) #0 {
entry:
- tail call void @llvm.dbg.value(metadata !{i32* %p}, i64 0, metadata !11, metadata !{}), !dbg !16
- tail call void @llvm.dbg.value(metadata !{i32 %x}, i64 0, metadata !12, metadata !{}), !dbg !16
+ tail call void @llvm.dbg.value(metadata !{i32* %p}, i64 0, metadata !11), !dbg !16
+ tail call void @llvm.dbg.value(metadata !{i32 %x}, i64 0, metadata !12), !dbg !16
store i32 %x, i32* %p, align 4, !dbg !17, !tbaa !18
ret void, !dbg !22
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata) #1
attributes #0 = { nounwind sanitize_memory "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/JitListener/test-common-symbols.ll b/llvm/test/JitListener/test-common-symbols.ll
index 0f50412..a389bf7 100644
--- a/llvm/test/JitListener/test-common-symbols.ll
+++ b/llvm/test/JitListener/test-common-symbols.ll
@@ -34,7 +34,7 @@
br label %if.end, !dbg !24
if.end: ; preds = %if.then, %entry
- call void @llvm.dbg.declare(metadata !{i32* %i}, metadata !25, metadata !{}), !dbg !27
+ call void @llvm.dbg.declare(metadata !{i32* %i}, metadata !25), !dbg !27
store i32 1, i32* %i, align 4, !dbg !28
br label %for.cond, !dbg !28
@@ -73,7 +73,7 @@
ret i32 %cond, !dbg !33
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!35}
diff --git a/llvm/test/JitListener/test-inline.ll b/llvm/test/JitListener/test-inline.ll
index 567c358..0d365b1 100644
--- a/llvm/test/JitListener/test-inline.ll
+++ b/llvm/test/JitListener/test-inline.ll
@@ -42,18 +42,18 @@
%l.addr = alloca i64, align 8
%result = alloca double, align 8
store float* %pf, float** %pf.addr, align 8
- call void @llvm.dbg.declare(metadata !{float** %pf.addr}, metadata !46, metadata !{}), !dbg !47
+ call void @llvm.dbg.declare(metadata !{float** %pf.addr}, metadata !46), !dbg !47
store [2 x double]* %ppd, [2 x double]** %ppd.addr, align 8
- call void @llvm.dbg.declare(metadata !{[2 x double]** %ppd.addr}, metadata !48, metadata !{}), !dbg !47
+ call void @llvm.dbg.declare(metadata !{[2 x double]** %ppd.addr}, metadata !48), !dbg !47
store %struct.char_struct* %s, %struct.char_struct** %s.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.char_struct** %s.addr}, metadata !49, metadata !{}), !dbg !47
+ call void @llvm.dbg.declare(metadata !{%struct.char_struct** %s.addr}, metadata !49), !dbg !47
store i32** %ppn, i32*** %ppn.addr, align 8
- call void @llvm.dbg.declare(metadata !{i32*** %ppn.addr}, metadata !50, metadata !{}), !dbg !47
+ call void @llvm.dbg.declare(metadata !{i32*** %ppn.addr}, metadata !50), !dbg !47
store i16 %us, i16* %us.addr, align 2
- call void @llvm.dbg.declare(metadata !{i16* %us.addr}, metadata !51, metadata !{}), !dbg !47
+ call void @llvm.dbg.declare(metadata !{i16* %us.addr}, metadata !51), !dbg !47
store i64 %l, i64* %l.addr, align 8
- call void @llvm.dbg.declare(metadata !{i64* %l.addr}, metadata !52, metadata !{}), !dbg !47
- call void @llvm.dbg.declare(metadata !{double* %result}, metadata !53, metadata !{}), !dbg !55
+ call void @llvm.dbg.declare(metadata !{i64* %l.addr}, metadata !52), !dbg !47
+ call void @llvm.dbg.declare(metadata !{double* %result}, metadata !53), !dbg !55
%0 = load float** %pf.addr, align 8, !dbg !55
%arrayidx = getelementptr inbounds float* %0, i64 0, !dbg !55
%1 = load float* %arrayidx, align 4, !dbg !55
@@ -84,7 +84,7 @@
ret double %8, !dbg !56
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define linkonce_odr i32 @_Z3foov() nounwind uwtable inlinehint {
entry:
@@ -102,13 +102,13 @@
%result = alloca double, align 8
store i32 0, i32* %retval
store i32 %argc, i32* %argc.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !59, metadata !{}), !dbg !60
+ call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !59), !dbg !60
store i8** %argv, i8*** %argv.addr, align 8
- call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !61, metadata !{}), !dbg !60
- call void @llvm.dbg.declare(metadata !{%struct.char_struct* %s}, metadata !62, metadata !{}), !dbg !64
- call void @llvm.dbg.declare(metadata !{float* %f}, metadata !65, metadata !{}), !dbg !66
+ call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !61), !dbg !60
+ call void @llvm.dbg.declare(metadata !{%struct.char_struct* %s}, metadata !62), !dbg !64
+ call void @llvm.dbg.declare(metadata !{float* %f}, metadata !65), !dbg !66
store float 0.000000e+00, float* %f, align 4, !dbg !66
- call void @llvm.dbg.declare(metadata !{[2 x [2 x double]]* %d}, metadata !67, metadata !{}), !dbg !70
+ call void @llvm.dbg.declare(metadata !{[2 x [2 x double]]* %d}, metadata !67), !dbg !70
%0 = bitcast [2 x [2 x double]]* %d to i8*, !dbg !70
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* bitcast ([2 x [2 x double]]* @_ZZ4mainE1d to i8*), i64 32, i32 16, i1 false), !dbg !70
%c = getelementptr inbounds %struct.char_struct* %s, i32 0, i32 0, !dbg !71
@@ -119,7 +119,7 @@
%c21 = getelementptr inbounds %struct.char_struct* %s, i32 0, i32 1, !dbg !73
%arrayidx2 = getelementptr inbounds [2 x i8]* %c21, i32 0, i64 1, !dbg !73
store i8 49, i8* %arrayidx2, align 1, !dbg !73
- call void @llvm.dbg.declare(metadata !{double* %result}, metadata !74, metadata !{}), !dbg !75
+ call void @llvm.dbg.declare(metadata !{double* %result}, metadata !74), !dbg !75
%arraydecay = getelementptr inbounds [2 x [2 x double]]* %d, i32 0, i32 0, !dbg !75
%call = call double @_Z15test_parametersPfPA2_dR11char_structPPitm(float* %f, [2 x double]* %arraydecay, %struct.char_struct* %s, i32** null, i16 zeroext 10, i64 42), !dbg !75
store double %call, double* %result, align 8, !dbg !75
diff --git a/llvm/test/JitListener/test-parameters.ll b/llvm/test/JitListener/test-parameters.ll
index fccf53d..7feb6bb 100644
--- a/llvm/test/JitListener/test-parameters.ll
+++ b/llvm/test/JitListener/test-parameters.ll
@@ -46,18 +46,18 @@
%l.addr = alloca i64, align 8
%result = alloca double, align 8
store float* %pf, float** %pf.addr, align 8
- call void @llvm.dbg.declare(metadata !{float** %pf.addr}, metadata !48, metadata !{}), !dbg !49
+ call void @llvm.dbg.declare(metadata !{float** %pf.addr}, metadata !48), !dbg !49
store [2 x double]* %ppd, [2 x double]** %ppd.addr, align 8
- call void @llvm.dbg.declare(metadata !{[2 x double]** %ppd.addr}, metadata !50, metadata !{}), !dbg !49
+ call void @llvm.dbg.declare(metadata !{[2 x double]** %ppd.addr}, metadata !50), !dbg !49
store %struct.char_struct* %s, %struct.char_struct** %s.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.char_struct** %s.addr}, metadata !51, metadata !{}), !dbg !49
+ call void @llvm.dbg.declare(metadata !{%struct.char_struct** %s.addr}, metadata !51), !dbg !49
store i32** %ppn, i32*** %ppn.addr, align 8
- call void @llvm.dbg.declare(metadata !{i32*** %ppn.addr}, metadata !52, metadata !{}), !dbg !49
+ call void @llvm.dbg.declare(metadata !{i32*** %ppn.addr}, metadata !52), !dbg !49
store i16 %us, i16* %us.addr, align 2
- call void @llvm.dbg.declare(metadata !{i16* %us.addr}, metadata !53, metadata !{}), !dbg !49
+ call void @llvm.dbg.declare(metadata !{i16* %us.addr}, metadata !53), !dbg !49
store i64 %l, i64* %l.addr, align 8
- call void @llvm.dbg.declare(metadata !{i64* %l.addr}, metadata !54, metadata !{}), !dbg !49
- call void @llvm.dbg.declare(metadata !{double* %result}, metadata !55, metadata !{}), !dbg !57
+ call void @llvm.dbg.declare(metadata !{i64* %l.addr}, metadata !54), !dbg !49
+ call void @llvm.dbg.declare(metadata !{double* %result}, metadata !55), !dbg !57
%0 = load float** %pf.addr, align 8, !dbg !57
%arrayidx = getelementptr inbounds float* %0, i64 0, !dbg !57
%1 = load float* %arrayidx, align 4, !dbg !57
@@ -88,7 +88,7 @@
ret double %8, !dbg !58
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define i32 @main(i32 %argc, i8** %argv) nounwind uwtable {
entry:
@@ -101,13 +101,13 @@
%result = alloca double, align 8
store i32 0, i32* %retval
store i32 %argc, i32* %argc.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !59, metadata !{}), !dbg !60
+ call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !59), !dbg !60
store i8** %argv, i8*** %argv.addr, align 8
- call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !61, metadata !{}), !dbg !60
- call void @llvm.dbg.declare(metadata !{%struct.char_struct* %s}, metadata !62, metadata !{}), !dbg !64
- call void @llvm.dbg.declare(metadata !{float* %f}, metadata !65, metadata !{}), !dbg !66
+ call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !61), !dbg !60
+ call void @llvm.dbg.declare(metadata !{%struct.char_struct* %s}, metadata !62), !dbg !64
+ call void @llvm.dbg.declare(metadata !{float* %f}, metadata !65), !dbg !66
store float 0.000000e+00, float* %f, align 4, !dbg !66
- call void @llvm.dbg.declare(metadata !{[2 x [2 x double]]* %d}, metadata !67, metadata !{}), !dbg !70
+ call void @llvm.dbg.declare(metadata !{[2 x [2 x double]]* %d}, metadata !67), !dbg !70
%0 = bitcast [2 x [2 x double]]* %d to i8*, !dbg !70
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* bitcast ([2 x [2 x double]]* @_ZZ4mainE1d to i8*), i64 32, i32 16, i1 false), !dbg !70
%c = getelementptr inbounds %struct.char_struct* %s, i32 0, i32 0, !dbg !71
@@ -118,7 +118,7 @@
%c21 = getelementptr inbounds %struct.char_struct* %s, i32 0, i32 1, !dbg !73
%arrayidx2 = getelementptr inbounds [2 x i8]* %c21, i32 0, i64 1, !dbg !73
store i8 49, i8* %arrayidx2, align 1, !dbg !73
- call void @llvm.dbg.declare(metadata !{double* %result}, metadata !74, metadata !{}), !dbg !75
+ call void @llvm.dbg.declare(metadata !{double* %result}, metadata !74), !dbg !75
%arraydecay = getelementptr inbounds [2 x [2 x double]]* %d, i32 0, i32 0, !dbg !75
%call = call double @_Z15test_parametersPfPA2_dR11char_structPPitm(float* %f, [2 x double]* %arraydecay, %struct.char_struct* %s, i32** null, i16 zeroext 10, i64 42), !dbg !75
store double %call, double* %result, align 8, !dbg !75
diff --git a/llvm/test/Linker/2011-08-18-unique-class-type.ll b/llvm/test/Linker/2011-08-18-unique-class-type.ll
index 6d73055..b077f23 100644
--- a/llvm/test/Linker/2011-08-18-unique-class-type.ll
+++ b/llvm/test/Linker/2011-08-18-unique-class-type.ll
@@ -11,11 +11,11 @@
define void @_Z3fooN2N11AE() nounwind uwtable ssp {
entry:
%mya = alloca %"class.N1::A", align 1
- call void @llvm.dbg.declare(metadata !{%"class.N1::A"* %mya}, metadata !9, metadata !{}), !dbg !13
+ call void @llvm.dbg.declare(metadata !{%"class.N1::A"* %mya}, metadata !9), !dbg !13
ret void, !dbg !14
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!18}
diff --git a/llvm/test/Linker/2011-08-18-unique-class-type2.ll b/llvm/test/Linker/2011-08-18-unique-class-type2.ll
index accaa44..7bfcd91 100644
--- a/llvm/test/Linker/2011-08-18-unique-class-type2.ll
+++ b/llvm/test/Linker/2011-08-18-unique-class-type2.ll
@@ -9,11 +9,11 @@
define void @_Z3barN2N11AE() nounwind uwtable ssp {
entry:
%youra = alloca %"class.N1::A", align 1
- call void @llvm.dbg.declare(metadata !{%"class.N1::A"* %youra}, metadata !9, metadata !{}), !dbg !13
+ call void @llvm.dbg.declare(metadata !{%"class.N1::A"* %youra}, metadata !9), !dbg !13
ret void, !dbg !14
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!18}
diff --git a/llvm/test/Linker/DbgDeclare.ll b/llvm/test/Linker/DbgDeclare.ll
index c4a0545..4cca9d5 100644
--- a/llvm/test/Linker/DbgDeclare.ll
+++ b/llvm/test/Linker/DbgDeclare.ll
@@ -4,12 +4,12 @@
; rdar://13089880
; CHECK: define i32 @main(i32 %argc, i8** %argv)
-; CHECK: call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !{{[0-9]+}}, metadata {{.*}})
-; CHECK: call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !{{[0-9]+}}, metadata {{.*}})
+; CHECK: call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !{{[0-9]+}})
+; CHECK: call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !{{[0-9]+}})
; CHECK: define void @test(i32 %argc, i8** %argv)
-; CHECK: call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !{{[0-9]+}}, metadata {{.*}})
-; CHECK: call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !{{[0-9]+}}, metadata {{.*}})
-; CHECK: call void @llvm.dbg.declare(metadata !{i32* %i}, metadata !{{[0-9]+}}, metadata {{.*}})
+; CHECK: call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !{{[0-9]+}})
+; CHECK: call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !{{[0-9]+}})
+; CHECK: call void @llvm.dbg.declare(metadata !{i32* %i}, metadata !{{[0-9]+}})
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.9.0"
@@ -21,16 +21,16 @@
%argv.addr = alloca i8**, align 8
store i32 0, i32* %retval
store i32 %argc, i32* %argc.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !14, metadata !{}), !dbg !15
+ call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !14), !dbg !15
store i8** %argv, i8*** %argv.addr, align 8
- call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !16, metadata !{}), !dbg !15
+ call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !16), !dbg !15
%0 = load i32* %argc.addr, align 4, !dbg !17
%1 = load i8*** %argv.addr, align 8, !dbg !17
call void @test(i32 %0, i8** %1), !dbg !17
ret i32 0, !dbg !19
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
declare void @test(i32, i8**)
diff --git a/llvm/test/Linker/DbgDeclare2.ll b/llvm/test/Linker/DbgDeclare2.ll
index 70d8807..2649fcc 100644
--- a/llvm/test/Linker/DbgDeclare2.ll
+++ b/llvm/test/Linker/DbgDeclare2.ll
@@ -11,10 +11,10 @@
%argv.addr = alloca i8**, align 8
%i = alloca i32, align 4
store i32 %argc, i32* %argc.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !14, metadata !{}), !dbg !15
+ call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !14), !dbg !15
store i8** %argv, i8*** %argv.addr, align 8
- call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !16, metadata !{}), !dbg !15
- call void @llvm.dbg.declare(metadata !{i32* %i}, metadata !17, metadata !{}), !dbg !20
+ call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !16), !dbg !15
+ call void @llvm.dbg.declare(metadata !{i32* %i}, metadata !17), !dbg !20
store i32 0, i32* %i, align 4, !dbg !20
br label %for.cond, !dbg !20
@@ -43,7 +43,7 @@
ret void, !dbg !24
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
declare i32 @puts(i8*)
diff --git a/llvm/test/Linker/Inputs/type-unique-inheritance-a.ll b/llvm/test/Linker/Inputs/type-unique-inheritance-a.ll
index a5a0b0d..381210c 100644
--- a/llvm/test/Linker/Inputs/type-unique-inheritance-a.ll
+++ b/llvm/test/Linker/Inputs/type-unique-inheritance-a.ll
@@ -52,13 +52,13 @@
%a.addr = alloca i32, align 4
%t = alloca %class.A, align 4
store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !20, metadata !{}), !dbg !21
- call void @llvm.dbg.declare(metadata !{%class.A* %t}, metadata !22, metadata !{}), !dbg !23
+ call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !20), !dbg !21
+ call void @llvm.dbg.declare(metadata !{%class.A* %t}, metadata !22), !dbg !23
ret void, !dbg !24
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
attributes #0 = { nounwind ssp uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/Linker/Inputs/type-unique-inheritance-b.ll b/llvm/test/Linker/Inputs/type-unique-inheritance-b.ll
index d6bf74f..0cd43f6 100644
--- a/llvm/test/Linker/Inputs/type-unique-inheritance-b.ll
+++ b/llvm/test/Linker/Inputs/type-unique-inheritance-b.ll
@@ -10,13 +10,13 @@
%a.addr = alloca i32, align 4
%t = alloca %class.B, align 8
store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !28, metadata !{}), !dbg !29
- call void @llvm.dbg.declare(metadata !{%class.B* %t}, metadata !30, metadata !{}), !dbg !31
+ call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !28), !dbg !29
+ call void @llvm.dbg.declare(metadata !{%class.B* %t}, metadata !30), !dbg !31
ret void, !dbg !32
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: ssp uwtable
define i32 @main() #2 {
@@ -24,7 +24,7 @@
%retval = alloca i32, align 4
%a = alloca %class.A, align 4
store i32 0, i32* %retval
- call void @llvm.dbg.declare(metadata !{%class.A* %a}, metadata !33, metadata !{}), !dbg !34
+ call void @llvm.dbg.declare(metadata !{%class.A* %a}, metadata !33), !dbg !34
call void @_Z1fi(i32 0), !dbg !35
call void @_Z1gi(i32 1), !dbg !36
ret i32 0, !dbg !37
diff --git a/llvm/test/Linker/Inputs/type-unique-simple2-a.ll b/llvm/test/Linker/Inputs/type-unique-simple2-a.ll
index f1d52e7..676b410 100644
--- a/llvm/test/Linker/Inputs/type-unique-simple2-a.ll
+++ b/llvm/test/Linker/Inputs/type-unique-simple2-a.ll
@@ -49,13 +49,13 @@
%a.addr = alloca i32, align 4
%t = alloca %struct.Base, align 8
store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !17, metadata !{}), !dbg !18
- call void @llvm.dbg.declare(metadata !{%struct.Base* %t}, metadata !19, metadata !{}), !dbg !20
+ call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !17), !dbg !18
+ call void @llvm.dbg.declare(metadata !{%struct.Base* %t}, metadata !19), !dbg !20
ret void, !dbg !21
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
attributes #0 = { nounwind ssp uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/Linker/Inputs/type-unique-simple2-b.ll b/llvm/test/Linker/Inputs/type-unique-simple2-b.ll
index 38836b6..3ec79e5 100644
--- a/llvm/test/Linker/Inputs/type-unique-simple2-b.ll
+++ b/llvm/test/Linker/Inputs/type-unique-simple2-b.ll
@@ -8,13 +8,13 @@
%a.addr = alloca i32, align 4
%t = alloca %struct.Base, align 8
store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !20, metadata !{}), !dbg !21
- call void @llvm.dbg.declare(metadata !{%struct.Base* %t}, metadata !22, metadata !{}), !dbg !23
+ call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !20), !dbg !21
+ call void @llvm.dbg.declare(metadata !{%struct.Base* %t}, metadata !22), !dbg !23
ret void, !dbg !24
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: ssp uwtable
define i32 @main() #2 {
diff --git a/llvm/test/Linker/type-unique-odr-a.ll b/llvm/test/Linker/type-unique-odr-a.ll
index 0ff58ebd..91c8033 100644
--- a/llvm/test/Linker/type-unique-odr-a.ll
+++ b/llvm/test/Linker/type-unique-odr-a.ll
@@ -59,12 +59,12 @@
define internal void @_ZL3barv() #0 {
entry:
%a = alloca %class.A, align 4
- call void @llvm.dbg.declare(metadata !{%class.A* %a}, metadata !24, metadata !{}), !dbg !25
+ call void @llvm.dbg.declare(metadata !{%class.A* %a}, metadata !24), !dbg !25
ret void, !dbg !26
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
attributes #0 = { nounwind }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/Linker/type-unique-odr-b.ll b/llvm/test/Linker/type-unique-odr-b.ll
index d589cdc..3c8b7a1 100644
--- a/llvm/test/Linker/type-unique-odr-b.ll
+++ b/llvm/test/Linker/type-unique-odr-b.ll
@@ -26,13 +26,13 @@
entry:
%this.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !24, metadata !{}), !dbg !26
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !24), !dbg !26
%this1 = load %class.A** %this.addr
ret void, !dbg !27
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind
define void @_Z1fv() #0 {
diff --git a/llvm/test/Linker/type-unique-simple-a.ll b/llvm/test/Linker/type-unique-simple-a.ll
index 68e0022..350cd1f 100644
--- a/llvm/test/Linker/type-unique-simple-a.ll
+++ b/llvm/test/Linker/type-unique-simple-a.ll
@@ -54,13 +54,13 @@
%a.addr = alloca i32, align 4
%t = alloca %struct.Base, align 4
store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !15, metadata !{}), !dbg !16
- call void @llvm.dbg.declare(metadata !{%struct.Base* %t}, metadata !17, metadata !{}), !dbg !18
+ call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !15), !dbg !16
+ call void @llvm.dbg.declare(metadata !{%struct.Base* %t}, metadata !17), !dbg !18
ret void, !dbg !19
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
attributes #0 = { nounwind ssp uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/Linker/type-unique-simple-b.ll b/llvm/test/Linker/type-unique-simple-b.ll
index f10ab3a..854ec15 100644
--- a/llvm/test/Linker/type-unique-simple-b.ll
+++ b/llvm/test/Linker/type-unique-simple-b.ll
@@ -10,13 +10,13 @@
%a.addr = alloca i32, align 4
%t = alloca %struct.Base, align 4
store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !18, metadata !{}), !dbg !19
- call void @llvm.dbg.declare(metadata !{%struct.Base* %t}, metadata !20, metadata !{}), !dbg !21
+ call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !18), !dbg !19
+ call void @llvm.dbg.declare(metadata !{%struct.Base* %t}, metadata !20), !dbg !21
ret void, !dbg !22
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: ssp uwtable
define i32 @main() #2 {
diff --git a/llvm/test/Linker/type-unique-simple2-a.ll b/llvm/test/Linker/type-unique-simple2-a.ll
index 6459e75..289d613 100644
--- a/llvm/test/Linker/type-unique-simple2-a.ll
+++ b/llvm/test/Linker/type-unique-simple2-a.ll
@@ -48,7 +48,7 @@
entry:
%this.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !39, metadata !{}), !dbg !41
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !39), !dbg !41
%this1 = load %class.A** %this.addr
call void @_ZN1AC2Ev(%class.A* %this1) #1, !dbg !42
ret void, !dbg !42
@@ -57,14 +57,14 @@
declare i32 @_ZN1A6getFooEv(%class.A*)
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #4
+declare void @llvm.dbg.declare(metadata, metadata) #4
; Function Attrs: inlinehint nounwind
define linkonce_odr void @_ZN1AC2Ev(%class.A* %this) unnamed_addr #2 align 2 {
entry:
%this.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !44, metadata !{}), !dbg !45
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !44), !dbg !45
%this1 = load %class.A** %this.addr
%0 = bitcast %class.A* %this1 to i8***, !dbg !46
store i8** getelementptr inbounds ([4 x i8*]* @_ZTV1A, i64 0, i64 2), i8*** %0, !dbg !46
diff --git a/llvm/test/Linker/type-unique-simple2-b.ll b/llvm/test/Linker/type-unique-simple2-b.ll
index 849a511..af5001c 100644
--- a/llvm/test/Linker/type-unique-simple2-b.ll
+++ b/llvm/test/Linker/type-unique-simple2-b.ll
@@ -22,20 +22,20 @@
entry:
%this.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !32, metadata !{}), !dbg !34
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !32), !dbg !34
%this1 = load %class.A** %this.addr
ret void, !dbg !35
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind
define i32 @_ZN1A6getFooEv(%class.A* %this) unnamed_addr #0 align 2 {
entry:
%this.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !36, metadata !{}), !dbg !37
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !36), !dbg !37
%this1 = load %class.A** %this.addr
ret i32 1, !dbg !38
}
diff --git a/llvm/test/Linker/type-unique-type-array-a.ll b/llvm/test/Linker/type-unique-type-array-a.ll
index 423a8c4..8ac3b77 100644
--- a/llvm/test/Linker/type-unique-type-array-a.ll
+++ b/llvm/test/Linker/type-unique-type-array-a.ll
@@ -51,8 +51,8 @@
%coerce.dive = getelementptr %struct.SA* %sa, i32 0, i32 0
store i32 %sa.coerce, i32* %coerce.dive
store %class.A* %a, %class.A** %a.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %a.addr}, metadata !24, metadata !{}), !dbg !25
- call void @llvm.dbg.declare(metadata !{%struct.SA* %sa}, metadata !26, metadata !{}), !dbg !27
+ call void @llvm.dbg.declare(metadata !{%class.A** %a.addr}, metadata !24), !dbg !25
+ call void @llvm.dbg.declare(metadata !{%struct.SA* %sa}, metadata !26), !dbg !27
%0 = load %class.A** %a.addr, align 8, !dbg !28
%1 = bitcast %struct.SA* %agg.tmp to i8*, !dbg !28
%2 = bitcast %struct.SA* %sa to i8*, !dbg !28
@@ -64,7 +64,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind ssp uwtable
define linkonce_odr void @_ZN1A5testAE2SA(%class.A* %this, i32 %a.coerce) #2 align 2 {
@@ -74,8 +74,8 @@
%coerce.dive = getelementptr %struct.SA* %a, i32 0, i32 0
store i32 %a.coerce, i32* %coerce.dive
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !30, metadata !{}), !dbg !31
- call void @llvm.dbg.declare(metadata !{%struct.SA* %a}, metadata !32, metadata !{}), !dbg !33
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !30), !dbg !31
+ call void @llvm.dbg.declare(metadata !{%struct.SA* %a}, metadata !32), !dbg !33
%this1 = load %class.A** %this.addr
ret void, !dbg !34
}
diff --git a/llvm/test/Linker/type-unique-type-array-b.ll b/llvm/test/Linker/type-unique-type-array-b.ll
index f2b4c31..7089fa2 100644
--- a/llvm/test/Linker/type-unique-type-array-b.ll
+++ b/llvm/test/Linker/type-unique-type-array-b.ll
@@ -30,8 +30,8 @@
%coerce.dive = getelementptr %struct.SA* %sa, i32 0, i32 0
store i32 %sa.coerce, i32* %coerce.dive
store %class.B* %b, %class.B** %b.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.B** %b.addr}, metadata !24, metadata !{}), !dbg !25
- call void @llvm.dbg.declare(metadata !{%struct.SA* %sa}, metadata !26, metadata !{}), !dbg !27
+ call void @llvm.dbg.declare(metadata !{%class.B** %b.addr}, metadata !24), !dbg !25
+ call void @llvm.dbg.declare(metadata !{%struct.SA* %sa}, metadata !26), !dbg !27
%0 = load %class.B** %b.addr, align 8, !dbg !28
%1 = bitcast %struct.SA* %agg.tmp to i8*, !dbg !28
%2 = bitcast %struct.SA* %sa to i8*, !dbg !28
@@ -43,7 +43,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind ssp uwtable
define linkonce_odr void @_ZN1B5testBE2SA(%class.B* %this, i32 %sa.coerce) #2 align 2 {
@@ -53,8 +53,8 @@
%coerce.dive = getelementptr %struct.SA* %sa, i32 0, i32 0
store i32 %sa.coerce, i32* %coerce.dive
store %class.B* %this, %class.B** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.B** %this.addr}, metadata !30, metadata !{}), !dbg !31
- call void @llvm.dbg.declare(metadata !{%struct.SA* %sa}, metadata !32, metadata !{}), !dbg !33
+ call void @llvm.dbg.declare(metadata !{%class.B** %this.addr}, metadata !30), !dbg !31
+ call void @llvm.dbg.declare(metadata !{%struct.SA* %sa}, metadata !32), !dbg !33
%this1 = load %class.B** %this.addr
ret void, !dbg !34
}
diff --git a/llvm/test/Transforms/AddDiscriminators/no-discriminators.ll b/llvm/test/Transforms/AddDiscriminators/no-discriminators.ll
index abdecfe..7d97fa7 100644
--- a/llvm/test/Transforms/AddDiscriminators/no-discriminators.ll
+++ b/llvm/test/Transforms/AddDiscriminators/no-discriminators.ll
@@ -17,7 +17,7 @@
%retval = alloca i32, align 4
%i.addr = alloca i64, align 8
store i64 %i, i64* %i.addr, align 8
- call void @llvm.dbg.declare(metadata !{i64* %i.addr}, metadata !13, metadata !{}), !dbg !14
+ call void @llvm.dbg.declare(metadata !{i64* %i.addr}, metadata !13), !dbg !14
%0 = load i64* %i.addr, align 8, !dbg !15
; CHECK: %0 = load i64* %i.addr, align 8, !dbg !15
%cmp = icmp slt i64 %0, 5, !dbg !15
@@ -39,7 +39,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/Transforms/DeadArgElim/2010-04-30-DbgInfo.ll b/llvm/test/Transforms/DeadArgElim/2010-04-30-DbgInfo.ll
index df92252..26982db 100644
--- a/llvm/test/Transforms/DeadArgElim/2010-04-30-DbgInfo.ll
+++ b/llvm/test/Transforms/DeadArgElim/2010-04-30-DbgInfo.ll
@@ -4,24 +4,24 @@
define i8* @vfs_addname(i8* %name, i32 %len, i32 %hash, i32 %flags) nounwind ssp {
entry:
- call void @llvm.dbg.value(metadata !{i8* %name}, i64 0, metadata !0, metadata !{})
- call void @llvm.dbg.value(metadata !{i32 %len}, i64 0, metadata !10, metadata !{})
- call void @llvm.dbg.value(metadata !{i32 %hash}, i64 0, metadata !11, metadata !{})
- call void @llvm.dbg.value(metadata !{i32 %flags}, i64 0, metadata !12, metadata !{})
+ call void @llvm.dbg.value(metadata !{i8* %name}, i64 0, metadata !0)
+ call void @llvm.dbg.value(metadata !{i32 %len}, i64 0, metadata !10)
+ call void @llvm.dbg.value(metadata !{i32 %hash}, i64 0, metadata !11)
+ call void @llvm.dbg.value(metadata !{i32 %flags}, i64 0, metadata !12)
; CHECK: call fastcc i8* @add_name_internal(i8* %name, i32 %hash) [[NUW:#[0-9]+]], !dbg !{{[0-9]+}}
%0 = call fastcc i8* @add_name_internal(i8* %name, i32 %len, i32 %hash, i8 zeroext 0, i32 %flags) nounwind, !dbg !13 ; <i8*> [#uses=1]
ret i8* %0, !dbg !13
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define internal fastcc i8* @add_name_internal(i8* %name, i32 %len, i32 %hash, i8 zeroext %extra, i32 %flags) noinline nounwind ssp {
entry:
- call void @llvm.dbg.value(metadata !{i8* %name}, i64 0, metadata !15, metadata !{})
- call void @llvm.dbg.value(metadata !{i32 %len}, i64 0, metadata !20, metadata !{})
- call void @llvm.dbg.value(metadata !{i32 %hash}, i64 0, metadata !21, metadata !{})
- call void @llvm.dbg.value(metadata !{i8 %extra}, i64 0, metadata !22, metadata !{})
- call void @llvm.dbg.value(metadata !{i32 %flags}, i64 0, metadata !23, metadata !{})
+ call void @llvm.dbg.value(metadata !{i8* %name}, i64 0, metadata !15)
+ call void @llvm.dbg.value(metadata !{i32 %len}, i64 0, metadata !20)
+ call void @llvm.dbg.value(metadata !{i32 %hash}, i64 0, metadata !21)
+ call void @llvm.dbg.value(metadata !{i8 %extra}, i64 0, metadata !22)
+ call void @llvm.dbg.value(metadata !{i32 %flags}, i64 0, metadata !23)
%0 = icmp eq i32 %hash, 0, !dbg !24 ; <i1> [#uses=1]
br i1 %0, label %bb, label %bb1, !dbg !24
@@ -36,7 +36,7 @@
ret i8* %.0, !dbg !27
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
; CHECK: attributes #0 = { nounwind ssp }
; CHECK: attributes #1 = { nounwind readnone }
diff --git a/llvm/test/Transforms/DeadStoreElimination/inst-limits.ll b/llvm/test/Transforms/DeadStoreElimination/inst-limits.ll
index 0abf5a4..9df8801 100644
--- a/llvm/test/Transforms/DeadStoreElimination/inst-limits.ll
+++ b/llvm/test/Transforms/DeadStoreElimination/inst-limits.ll
@@ -117,7 +117,7 @@
; Insert a meaningless dbg.value intrinsic; it should have no
; effect on the working of DSE in any way.
- call void @llvm.dbg.value(metadata !12, i64 0, metadata !10, metadata !{})
+ call void @llvm.dbg.value(metadata !12, i64 0, metadata !10)
; CHECK: store i32 -1, i32* @x, align 4
store i32 -1, i32* @x, align 4
@@ -239,7 +239,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata)
+declare void @llvm.dbg.value(metadata, i64, metadata)
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!11, !13}
diff --git a/llvm/test/Transforms/GCOVProfiling/linezero.ll b/llvm/test/Transforms/GCOVProfiling/linezero.ll
index ee57498..e2f8324 100644
--- a/llvm/test/Transforms/GCOVProfiling/linezero.ll
+++ b/llvm/test/Transforms/GCOVProfiling/linezero.ll
@@ -20,17 +20,17 @@
%__begin = alloca i8*, align 8
%__end = alloca i8*, align 8
%spec = alloca i8, align 1
- call void @llvm.dbg.declare(metadata !{%struct.vector** %__range}, metadata !27, metadata !{}), !dbg !30
+ call void @llvm.dbg.declare(metadata !{%struct.vector** %__range}, metadata !27), !dbg !30
br label %0
; <label>:0 ; preds = %entry
call void @_Z13TagFieldSpecsv(), !dbg !31
store %struct.vector* %ref.tmp, %struct.vector** %__range, align 8, !dbg !31
- call void @llvm.dbg.declare(metadata !{i8** %__begin}, metadata !32, metadata !{}), !dbg !30
+ call void @llvm.dbg.declare(metadata !{i8** %__begin}, metadata !32), !dbg !30
%1 = load %struct.vector** %__range, align 8, !dbg !31
%call = call i8* @_ZN6vector5beginEv(%struct.vector* %1), !dbg !31
store i8* %call, i8** %__begin, align 8, !dbg !31
- call void @llvm.dbg.declare(metadata !{i8** %__end}, metadata !33, metadata !{}), !dbg !30
+ call void @llvm.dbg.declare(metadata !{i8** %__end}, metadata !33), !dbg !30
%2 = load %struct.vector** %__range, align 8, !dbg !31
%call1 = call i8* @_ZN6vector3endEv(%struct.vector* %2), !dbg !31
store i8* %call1, i8** %__end, align 8, !dbg !31
@@ -43,7 +43,7 @@
br i1 %cmp, label %for.body, label %for.end, !dbg !34
for.body: ; preds = %for.cond
- call void @llvm.dbg.declare(metadata !{i8* %spec}, metadata !37, metadata !{}), !dbg !31
+ call void @llvm.dbg.declare(metadata !{i8* %spec}, metadata !37), !dbg !31
%5 = load i8** %__begin, align 8, !dbg !38
%6 = load i8* %5, align 1, !dbg !38
store i8 %6, i8* %spec, align 1, !dbg !38
@@ -65,7 +65,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
declare void @_Z13TagFieldSpecsv() #2
diff --git a/llvm/test/Transforms/GlobalOpt/2009-03-05-dbg.ll b/llvm/test/Transforms/GlobalOpt/2009-03-05-dbg.ll
index e491297..0108960 100644
--- a/llvm/test/Transforms/GlobalOpt/2009-03-05-dbg.ll
+++ b/llvm/test/Transforms/GlobalOpt/2009-03-05-dbg.ll
@@ -6,14 +6,14 @@
define i32 @foo(i32 %i) nounwind ssp {
entry:
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !3, metadata !{})
+ call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !3)
%0 = icmp eq i32 %i, 1, !dbg !7 ; <i1> [#uses=1]
br i1 %0, label %bb, label %bb1, !dbg !7
bb: ; preds = %entry
store i32 0, i32* @Stop, align 4, !dbg !9
%1 = mul nsw i32 %i, 42, !dbg !10 ; <i32> [#uses=1]
- call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !3, metadata !{}), !dbg !10
+ call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !3), !dbg !10
br label %bb2, !dbg !10
bb1: ; preds = %entry
@@ -28,7 +28,7 @@
ret i32 %i_addr.0, !dbg !12
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
define i32 @bar() nounwind ssp {
entry:
@@ -51,7 +51,7 @@
ret i32 %.0, !dbg !19
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.gv = !{!0}
diff --git a/llvm/test/Transforms/Inline/ignore-debug-info.ll b/llvm/test/Transforms/Inline/ignore-debug-info.ll
index 6e11eff..543a89b 100644
--- a/llvm/test/Transforms/Inline/ignore-debug-info.ll
+++ b/llvm/test/Transforms/Inline/ignore-debug-info.ll
@@ -7,16 +7,16 @@
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata) #1
define <4 x float> @inner_vectors(<4 x float> %a, <4 x float> %b) {
entry:
- call void @llvm.dbg.value(metadata !{}, i64 0, metadata !{}, metadata !{})
+ call void @llvm.dbg.value(metadata !{}, i64 0, metadata !{})
%mul = fmul <4 x float> %a, <float 3.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00>
- call void @llvm.dbg.value(metadata !{}, i64 0, metadata !{}, metadata !{})
+ call void @llvm.dbg.value(metadata !{}, i64 0, metadata !{})
%mul1 = fmul <4 x float> %b, <float 5.000000e+00, float 5.000000e+00, float 5.000000e+00, float 5.000000e+00>
- call void @llvm.dbg.value(metadata !{}, i64 0, metadata !{}, metadata !{})
+ call void @llvm.dbg.value(metadata !{}, i64 0, metadata !{})
%add = fadd <4 x float> %mul, %mul1
ret <4 x float> %add
}
@@ -27,10 +27,10 @@
; CHECK: ret float
entry:
- call void @llvm.dbg.value(metadata !{}, i64 0, metadata !{}, metadata !{})
- call void @llvm.dbg.value(metadata !{}, i64 0, metadata !{}, metadata !{})
+ call void @llvm.dbg.value(metadata !{}, i64 0, metadata !{})
+ call void @llvm.dbg.value(metadata !{}, i64 0, metadata !{})
%call = call <4 x float> @inner_vectors(<4 x float> %a, <4 x float> %b)
- call void @llvm.dbg.value(metadata !{}, i64 0, metadata !{}, metadata !{})
+ call void @llvm.dbg.value(metadata !{}, i64 0, metadata !{})
%vecext = extractelement <4 x float> %call, i32 0
%vecext1 = extractelement <4 x float> %call, i32 1
%add = fadd float %vecext, %vecext1
diff --git a/llvm/test/Transforms/InstCombine/debuginfo.ll b/llvm/test/Transforms/InstCombine/debuginfo.ll
index c97b007..75082dc 100644
--- a/llvm/test/Transforms/InstCombine/debuginfo.ll
+++ b/llvm/test/Transforms/InstCombine/debuginfo.ll
@@ -1,6 +1,6 @@
; RUN: opt < %s -instcombine -S | FileCheck %s
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
declare i64 @llvm.objectsize.i64.p0i8(i8*, i1) nounwind readnone
@@ -14,11 +14,11 @@
store i8* %__dest, i8** %__dest.addr, align 8
; CHECK-NOT: call void @llvm.dbg.declare
; CHECK: call void @llvm.dbg.value
- call void @llvm.dbg.declare(metadata !{i8** %__dest.addr}, metadata !0, metadata !{}), !dbg !16
+ call void @llvm.dbg.declare(metadata !{i8** %__dest.addr}, metadata !0), !dbg !16
store i32 %__val, i32* %__val.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %__val.addr}, metadata !7, metadata !{}), !dbg !18
+ call void @llvm.dbg.declare(metadata !{i32* %__val.addr}, metadata !7), !dbg !18
store i64 %__len, i64* %__len.addr, align 8
- call void @llvm.dbg.declare(metadata !{i64* %__len.addr}, metadata !9, metadata !{}), !dbg !20
+ call void @llvm.dbg.declare(metadata !{i64* %__len.addr}, metadata !9), !dbg !20
%tmp = load i8** %__dest.addr, align 8, !dbg !21
%tmp1 = load i32* %__val.addr, align 4, !dbg !21
%tmp2 = load i64* %__len.addr, align 8, !dbg !21
diff --git a/llvm/test/Transforms/LICM/debug-value.ll b/llvm/test/Transforms/LICM/debug-value.ll
index 1a4f6d3..e5c774f 100644
--- a/llvm/test/Transforms/LICM/debug-value.ll
+++ b/llvm/test/Transforms/LICM/debug-value.ll
@@ -15,7 +15,7 @@
if.then27: ; preds = %if.then
; CHECK: tail call void @llvm.dbg.value
- tail call void @llvm.dbg.value(metadata !18, i64 0, metadata !19, metadata !{}), !dbg !21
+ tail call void @llvm.dbg.value(metadata !18, i64 0, metadata !19), !dbg !21
br label %for.body61.us
if.end.if.end.split_crit_edge.critedge: ; preds = %if.then
@@ -31,7 +31,7 @@
ret void, !dbg !24
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.module.flags = !{!26}
!llvm.dbg.sp = !{!0, !6, !9, !10}
diff --git a/llvm/test/Transforms/LoopIdiom/debug-line.ll b/llvm/test/Transforms/LoopIdiom/debug-line.ll
index 91f7522..ef4a478 100644
--- a/llvm/test/Transforms/LoopIdiom/debug-line.ll
+++ b/llvm/test/Transforms/LoopIdiom/debug-line.ll
@@ -5,8 +5,8 @@
define void @foo(double* nocapture %a) nounwind ssp {
entry:
- tail call void @llvm.dbg.value(metadata !{double* %a}, i64 0, metadata !5, metadata !{}), !dbg !8
- tail call void @llvm.dbg.value(metadata !9, i64 0, metadata !10, metadata !{}), !dbg !14
+ tail call void @llvm.dbg.value(metadata !{double* %a}, i64 0, metadata !5), !dbg !8
+ tail call void @llvm.dbg.value(metadata !9, i64 0, metadata !10), !dbg !14
br label %for.body
for.body: ; preds = %entry, %for.body
@@ -19,13 +19,13 @@
br i1 %exitcond, label %for.body, label %for.end, !dbg !14
for.end: ; preds = %for.body
- tail call void @llvm.dbg.value(metadata !{null}, i64 0, metadata !10, metadata !{}), !dbg !16
+ tail call void @llvm.dbg.value(metadata !{null}, i64 0, metadata !10), !dbg !16
ret void, !dbg !17
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.module.flags = !{!19}
!llvm.dbg.sp = !{!0}
diff --git a/llvm/test/Transforms/LoopRotate/dbgvalue.ll b/llvm/test/Transforms/LoopRotate/dbgvalue.ll
index 79029c6..50fc965 100644
--- a/llvm/test/Transforms/LoopRotate/dbgvalue.ll
+++ b/llvm/test/Transforms/LoopRotate/dbgvalue.ll
@@ -1,7 +1,7 @@
; RUN: opt -S -loop-rotate < %s | FileCheck %s
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
define i32 @tak(i32 %x, i32 %y, i32 %z) nounwind ssp {
; CHECK-LABEL: define i32 @tak(
@@ -15,9 +15,9 @@
%x.tr = phi i32 [ %x, %entry ], [ %call, %if.then ]
%y.tr = phi i32 [ %y, %entry ], [ %call9, %if.then ]
%z.tr = phi i32 [ %z, %entry ], [ %call14, %if.then ]
- tail call void @llvm.dbg.value(metadata !{i32 %x.tr}, i64 0, metadata !6, metadata !{}), !dbg !7
- tail call void @llvm.dbg.value(metadata !{i32 %y.tr}, i64 0, metadata !8, metadata !{}), !dbg !9
- tail call void @llvm.dbg.value(metadata !{i32 %z.tr}, i64 0, metadata !10, metadata !{}), !dbg !11
+ tail call void @llvm.dbg.value(metadata !{i32 %x.tr}, i64 0, metadata !6), !dbg !7
+ tail call void @llvm.dbg.value(metadata !{i32 %y.tr}, i64 0, metadata !8), !dbg !9
+ tail call void @llvm.dbg.value(metadata !{i32 %z.tr}, i64 0, metadata !10), !dbg !11
%cmp = icmp slt i32 %y.tr, %x.tr, !dbg !12
br i1 %cmp, label %if.then, label %if.end, !dbg !12
@@ -72,7 +72,7 @@
for.inc:
%dec = add i64 %i.0, -1
- tail call void @llvm.dbg.value(metadata !{i64 %dec}, i64 0, metadata !{metadata !"undef"}, metadata !{})
+ tail call void @llvm.dbg.value(metadata !{i64 %dec}, i64 0, metadata !{metadata !"undef"})
br label %for.cond
for.end:
diff --git a/llvm/test/Transforms/LoopStrengthReduce/pr12018.ll b/llvm/test/Transforms/LoopStrengthReduce/pr12018.ll
index b68a0fe..ee7b1e8 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/pr12018.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/pr12018.ll
@@ -16,7 +16,7 @@
%tmp = bitcast %struct.nsTArrayHeader* %add.ptr.i to %struct.nsTArray*
%arrayidx = getelementptr inbounds %struct.nsTArray* %tmp, i32 %i.06
%add = add nsw i32 %i.06, 1
- call void @llvm.dbg.value(metadata !{%struct.nsTArray* %aValues}, i64 0, metadata !0, metadata !{}) nounwind
+ call void @llvm.dbg.value(metadata !{%struct.nsTArray* %aValues}, i64 0, metadata !0) nounwind
br label %_ZN8nsTArray9ElementAtEi.exit
_ZN8nsTArray9ElementAtEi.exit: ; preds = %for.body
@@ -33,6 +33,6 @@
declare %struct.nsTArrayHeader* @_ZN8nsTArray4Hdr2Ev()
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!0 = metadata !{i32 786689} ; [ DW_TAG_arg_variable ]
diff --git a/llvm/test/Transforms/LoopVectorize/dbg.value.ll b/llvm/test/Transforms/LoopVectorize/dbg.value.ll
index a42a21a..1b0a886 100644
--- a/llvm/test/Transforms/LoopVectorize/dbg.value.ll
+++ b/llvm/test/Transforms/LoopVectorize/dbg.value.ll
@@ -11,7 +11,7 @@
; CHECK-LABEL: @test(
define i32 @test() #0 {
entry:
- tail call void @llvm.dbg.value(metadata !1, i64 0, metadata !9, metadata !{}), !dbg !18
+ tail call void @llvm.dbg.value(metadata !1, i64 0, metadata !9), !dbg !18
br label %for.body, !dbg !18
for.body:
@@ -25,7 +25,7 @@
%arrayidx4 = getelementptr inbounds [1024 x i32]* @A, i64 0, i64 %indvars.iv, !dbg !19
store i32 %add, i32* %arrayidx4, align 4, !dbg !19
%indvars.iv.next = add i64 %indvars.iv, 1, !dbg !18
- tail call void @llvm.dbg.value(metadata !{null}, i64 0, metadata !9, metadata !{}), !dbg !18
+ tail call void @llvm.dbg.value(metadata !{null}, i64 0, metadata !9), !dbg !18
%lftr.wideiv = trunc i64 %indvars.iv.next to i32, !dbg !18
%exitcond = icmp ne i32 %lftr.wideiv, 1024, !dbg !18
br i1 %exitcond, label %for.body, label %for.end, !dbg !18
@@ -34,9 +34,9 @@
ret i32 0, !dbg !24
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata) #1
attributes #0 = { nounwind ssp uwtable "fp-contract-model"="standard" "no-frame-pointer-elim" "no-frame-pointer-elim-non-leaf" "relocation-model"="pic" "ssp-buffers-size"="8" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/Transforms/LoopVectorize/debugloc.ll b/llvm/test/Transforms/LoopVectorize/debugloc.ll
index 5250b1e..abf6200 100644
--- a/llvm/test/Transforms/LoopVectorize/debugloc.ll
+++ b/llvm/test/Transforms/LoopVectorize/debugloc.ll
@@ -19,10 +19,10 @@
define i32 @f(i32* nocapture %a, i32 %size) #0 {
entry:
- tail call void @llvm.dbg.value(metadata !{i32* %a}, i64 0, metadata !13, metadata !{}), !dbg !19
- tail call void @llvm.dbg.value(metadata !{i32 %size}, i64 0, metadata !14, metadata !{}), !dbg !19
- tail call void @llvm.dbg.value(metadata !2, i64 0, metadata !15, metadata !{}), !dbg !20
- tail call void @llvm.dbg.value(metadata !2, i64 0, metadata !16, metadata !{}), !dbg !21
+ tail call void @llvm.dbg.value(metadata !{i32* %a}, i64 0, metadata !13), !dbg !19
+ tail call void @llvm.dbg.value(metadata !{i32 %size}, i64 0, metadata !14), !dbg !19
+ tail call void @llvm.dbg.value(metadata !2, i64 0, metadata !15), !dbg !20
+ tail call void @llvm.dbg.value(metadata !2, i64 0, metadata !16), !dbg !21
%cmp4 = icmp eq i32 %size, 0, !dbg !21
br i1 %cmp4, label %for.end, label %for.body.lr.ph, !dbg !21
@@ -35,9 +35,9 @@
%arrayidx = getelementptr inbounds i32* %a, i64 %indvars.iv, !dbg !22
%0 = load i32* %arrayidx, align 4, !dbg !22
%add = add i32 %0, %sum.05, !dbg !22
- tail call void @llvm.dbg.value(metadata !{i32 %add.lcssa}, i64 0, metadata !15, metadata !{}), !dbg !22
+ tail call void @llvm.dbg.value(metadata !{i32 %add.lcssa}, i64 0, metadata !15), !dbg !22
%indvars.iv.next = add i64 %indvars.iv, 1, !dbg !21
- tail call void @llvm.dbg.value(metadata !{null}, i64 0, metadata !16, metadata !{}), !dbg !21
+ tail call void @llvm.dbg.value(metadata !{null}, i64 0, metadata !16), !dbg !21
%lftr.wideiv = trunc i64 %indvars.iv.next to i32, !dbg !21
%exitcond = icmp ne i32 %lftr.wideiv, %size, !dbg !21
br i1 %exitcond, label %for.body, label %for.cond.for.end_crit_edge, !dbg !21
@@ -52,10 +52,10 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata) #1
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata) #1
attributes #0 = { nounwind readonly ssp uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "unsafe-fp-math"="true" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/Transforms/Mem2Reg/ConvertDebugInfo.ll b/llvm/test/Transforms/Mem2Reg/ConvertDebugInfo.ll
index ae79ebf..33eaed6 100644
--- a/llvm/test/Transforms/Mem2Reg/ConvertDebugInfo.ll
+++ b/llvm/test/Transforms/Mem2Reg/ConvertDebugInfo.ll
@@ -7,13 +7,13 @@
%retval = alloca double ; <double*> [#uses=2]
%0 = alloca double ; <double*> [#uses=2]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.declare(metadata !{i32* %i_addr}, metadata !0, metadata !{}), !dbg !8
-; CHECK: call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata ![[IVAR:[0-9]*]], metadata {{.*}})
-; CHECK: call void @llvm.dbg.value(metadata !{double %j}, i64 0, metadata ![[JVAR:[0-9]*]], metadata {{.*}})
+ call void @llvm.dbg.declare(metadata !{i32* %i_addr}, metadata !0), !dbg !8
+; CHECK: call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata ![[IVAR:[0-9]*]])
+; CHECK: call void @llvm.dbg.value(metadata !{double %j}, i64 0, metadata ![[JVAR:[0-9]*]])
; CHECK: ![[IVAR]] = {{.*}} ; [ DW_TAG_arg_variable ] [i]
; CHECK: ![[JVAR]] = {{.*}} ; [ DW_TAG_arg_variable ] [j]
store i32 %i, i32* %i_addr
- call void @llvm.dbg.declare(metadata !{double* %j_addr}, metadata !9, metadata !{}), !dbg !8
+ call void @llvm.dbg.declare(metadata !{double* %j_addr}, metadata !9), !dbg !8
store double %j, double* %j_addr
%1 = load i32* %i_addr, align 4, !dbg !10 ; <i32> [#uses=1]
%2 = add nsw i32 %1, 1, !dbg !10 ; <i32> [#uses=1]
@@ -30,7 +30,7 @@
ret double %retval1, !dbg !10
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!3}
!llvm.module.flags = !{!14}
diff --git a/llvm/test/Transforms/Mem2Reg/ConvertDebugInfo2.ll b/llvm/test/Transforms/Mem2Reg/ConvertDebugInfo2.ll
index 93112f2..32acdd6 100644
--- a/llvm/test/Transforms/Mem2Reg/ConvertDebugInfo2.ll
+++ b/llvm/test/Transforms/Mem2Reg/ConvertDebugInfo2.ll
@@ -1,6 +1,6 @@
; RUN: opt -mem2reg < %s | llvm-dis | grep ".dbg " | count 7
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
declare void @foo(i32, i64, i8*)
@@ -11,14 +11,14 @@
%z_addr.i = alloca i8* ; <i8**> [#uses=2]
%a_addr = alloca i32 ; <i32*> [#uses=2]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.declare(metadata !{i32* %a_addr}, metadata !0, metadata !{}), !dbg !7
+ call void @llvm.dbg.declare(metadata !{i32* %a_addr}, metadata !0), !dbg !7
store i32 %a, i32* %a_addr
%0 = load i32* %a_addr, align 4, !dbg !8 ; <i32> [#uses=1]
- call void @llvm.dbg.declare(metadata !{i32* %x_addr.i}, metadata !9, metadata !{}) nounwind, !dbg !15
+ call void @llvm.dbg.declare(metadata !{i32* %x_addr.i}, metadata !9) nounwind, !dbg !15
store i32 %0, i32* %x_addr.i
- call void @llvm.dbg.declare(metadata !{i64* %y_addr.i}, metadata !16, metadata !{}) nounwind, !dbg !15
+ call void @llvm.dbg.declare(metadata !{i64* %y_addr.i}, metadata !16) nounwind, !dbg !15
store i64 55, i64* %y_addr.i
- call void @llvm.dbg.declare(metadata !{i8** %z_addr.i}, metadata !17, metadata !{}) nounwind, !dbg !15
+ call void @llvm.dbg.declare(metadata !{i8** %z_addr.i}, metadata !17) nounwind, !dbg !15
store i8* bitcast (void (i32)* @baz to i8*), i8** %z_addr.i
%1 = load i32* %x_addr.i, align 4, !dbg !18 ; <i32> [#uses=1]
%2 = load i64* %y_addr.i, align 8, !dbg !18 ; <i64> [#uses=1]
diff --git a/llvm/test/Transforms/ObjCARC/allocas.ll b/llvm/test/Transforms/ObjCARC/allocas.ll
index d2e7841..7347a8f 100644
--- a/llvm/test/Transforms/ObjCARC/allocas.ll
+++ b/llvm/test/Transforms/ObjCARC/allocas.ll
@@ -23,7 +23,7 @@
declare void @bar(i32 ()*)
declare void @use_alloca(i8**)
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata)
+declare void @llvm.dbg.value(metadata, i64, metadata)
declare i8* @objc_msgSend(i8*, i8*, ...)
diff --git a/llvm/test/Transforms/ObjCARC/basic.ll b/llvm/test/Transforms/ObjCARC/basic.ll
index 6f524ce..885935c 100644
--- a/llvm/test/Transforms/ObjCARC/basic.ll
+++ b/llvm/test/Transforms/ObjCARC/basic.ll
@@ -22,7 +22,7 @@
declare i8* @returner()
declare void @bar(i32 ()*)
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata)
+declare void @llvm.dbg.value(metadata, i64, metadata)
declare i8* @objc_msgSend(i8*, i8*, ...)
@@ -2679,8 +2679,8 @@
invoke.cont:
%0 = bitcast {}* %self to i8*
%1 = tail call i8* @objc_retain(i8* %0) nounwind
- tail call void @llvm.dbg.value(metadata !{{}* %self}, i64 0, metadata !0, metadata !{})
- tail call void @llvm.dbg.value(metadata !{{}* %self}, i64 0, metadata !0, metadata !{})
+ tail call void @llvm.dbg.value(metadata !{{}* %self}, i64 0, metadata !0)
+ tail call void @llvm.dbg.value(metadata !{{}* %self}, i64 0, metadata !0)
%ivar = load i64* @"OBJC_IVAR_$_A.myZ", align 8
%add.ptr = getelementptr i8* %0, i64 %ivar
%tmp1 = bitcast i8* %add.ptr to float*
diff --git a/llvm/test/Transforms/ObjCARC/ensure-that-exception-unwind-path-is-visited.ll b/llvm/test/Transforms/ObjCARC/ensure-that-exception-unwind-path-is-visited.ll
index 84d4c07..79e300c 100644
--- a/llvm/test/Transforms/ObjCARC/ensure-that-exception-unwind-path-is-visited.ll
+++ b/llvm/test/Transforms/ObjCARC/ensure-that-exception-unwind-path-is-visited.ll
@@ -41,10 +41,10 @@
%tmp2 = bitcast %struct._class_t* %tmp to i8*, !dbg !37
; CHECK: call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* %tmp2, i8* %tmp1)
%call = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* %tmp2, i8* %tmp1), !dbg !37, !clang.arc.no_objc_arc_exceptions !38
- call void @llvm.dbg.value(metadata !{i8* %call}, i64 0, metadata !12, metadata !{}), !dbg !37
+ call void @llvm.dbg.value(metadata !{i8* %call}, i64 0, metadata !12), !dbg !37
; CHECK: call i8* @objc_retain(i8* %call) [[NUW:#[0-9]+]]
%tmp3 = call i8* @objc_retain(i8* %call) nounwind, !dbg !39
- call void @llvm.dbg.value(metadata !{i8* %call}, i64 0, metadata !25, metadata !{}), !dbg !39
+ call void @llvm.dbg.value(metadata !{i8* %call}, i64 0, metadata !25), !dbg !39
invoke fastcc void @ThrowFunc(i8* %call)
to label %eh.cont unwind label %lpad, !dbg !40, !clang.arc.no_objc_arc_exceptions !38
@@ -58,7 +58,7 @@
catch i8* null, !dbg !40
%tmp5 = extractvalue { i8*, i32 } %tmp4, 0, !dbg !40
%exn.adjusted = call i8* @objc_begin_catch(i8* %tmp5) nounwind, !dbg !44
- call void @llvm.dbg.value(metadata !45, i64 0, metadata !21, metadata !{}), !dbg !46
+ call void @llvm.dbg.value(metadata !45, i64 0, metadata !21), !dbg !46
call void @objc_end_catch(), !dbg !49, !clang.arc.no_objc_arc_exceptions !38
; CHECK: call void @objc_release(i8* %call)
call void @objc_release(i8* %call) nounwind, !dbg !42, !clang.imprecise_release !38
@@ -72,7 +72,7 @@
ret i32 0, !dbg !54
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
declare i8* @objc_msgSend(i8*, i8*, ...) nonlazybind
@@ -87,7 +87,7 @@
define internal fastcc void @ThrowFunc(i8* %obj) uwtable noinline ssp {
entry:
%tmp = call i8* @objc_retain(i8* %obj) nounwind
- call void @llvm.dbg.value(metadata !{i8* %obj}, i64 0, metadata !32, metadata !{}), !dbg !55
+ call void @llvm.dbg.value(metadata !{i8* %obj}, i64 0, metadata !32), !dbg !55
%tmp1 = load %struct._class_t** @"\01L_OBJC_CLASSLIST_REFERENCES_$_1", align 8, !dbg !56
%tmp2 = load i8** @"\01L_OBJC_SELECTOR_REFERENCES_5", align 8, !dbg !56, !invariant.load !38
%tmp3 = bitcast %struct._class_t* %tmp1 to i8*, !dbg !56
@@ -102,7 +102,7 @@
declare void @NSLog(i8*, ...)
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
; CHECK: attributes #0 = { ssp uwtable }
; CHECK: attributes #1 = { nounwind readnone }
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/debug_info.ll b/llvm/test/Transforms/SLPVectorizer/X86/debug_info.ll
index ac8aa1e..f4e68f2 100644
--- a/llvm/test/Transforms/SLPVectorizer/X86/debug_info.ll
+++ b/llvm/test/Transforms/SLPVectorizer/X86/debug_info.ll
@@ -23,11 +23,11 @@
define i32 @depth(double* nocapture %A, i32 %m) #0 {
entry:
- tail call void @llvm.dbg.value(metadata !{double* %A}, i64 0, metadata !12, metadata !{}), !dbg !19
- tail call void @llvm.dbg.value(metadata !{i32 %m}, i64 0, metadata !13, metadata !{}), !dbg !19
- tail call void @llvm.dbg.value(metadata !20, i64 0, metadata !14, metadata !{}), !dbg !21
- tail call void @llvm.dbg.value(metadata !22, i64 0, metadata !15, metadata !{}), !dbg !21
- tail call void @llvm.dbg.value(metadata !2, i64 0, metadata !16, metadata !{}), !dbg !23
+ tail call void @llvm.dbg.value(metadata !{double* %A}, i64 0, metadata !12), !dbg !19
+ tail call void @llvm.dbg.value(metadata !{i32 %m}, i64 0, metadata !13), !dbg !19
+ tail call void @llvm.dbg.value(metadata !20, i64 0, metadata !14), !dbg !21
+ tail call void @llvm.dbg.value(metadata !22, i64 0, metadata !15), !dbg !21
+ tail call void @llvm.dbg.value(metadata !2, i64 0, metadata !16), !dbg !23
%cmp8 = icmp sgt i32 %m, 0, !dbg !23
br i1 %cmp8, label %for.body.lr.ph, label %for.end, !dbg !23
@@ -49,7 +49,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata) #1
attributes #0 = { nounwind ssp uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/Transforms/SampleProfile/branch.ll b/llvm/test/Transforms/SampleProfile/branch.ll
index 693a40c..65f1f17 100644
--- a/llvm/test/Transforms/SampleProfile/branch.ll
+++ b/llvm/test/Transforms/SampleProfile/branch.ll
@@ -32,8 +32,8 @@
; CHECK: Printing analysis 'Branch Probability Analysis' for function 'main':
entry:
- tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !13, metadata !{}), !dbg !27
- tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !14, metadata !{}), !dbg !27
+ tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !13), !dbg !27
+ tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !14), !dbg !27
%cmp = icmp slt i32 %argc, 2, !dbg !28
br i1 %cmp, label %return, label %if.end, !dbg !28
; CHECK: edge entry -> return probability is 1 / 2 = 50%
@@ -43,7 +43,7 @@
%arrayidx = getelementptr inbounds i8** %argv, i64 1, !dbg !30
%0 = load i8** %arrayidx, align 8, !dbg !30, !tbaa !31
%call = tail call i32 @atoi(i8* %0) #4, !dbg !30
- tail call void @llvm.dbg.value(metadata !{i32 %call}, i64 0, metadata !17, metadata !{}), !dbg !30
+ tail call void @llvm.dbg.value(metadata !{i32 %call}, i64 0, metadata !17), !dbg !30
%cmp1 = icmp sgt i32 %call, 100, !dbg !35
br i1 %cmp1, label %for.body, label %if.end6, !dbg !35
; CHECK: edge if.end -> for.body probability is 1 / 2 = 50%
@@ -55,14 +55,14 @@
%add = fadd double %s.015, 3.049000e+00, !dbg !36
%conv = sitofp i32 %u.016 to double, !dbg !36
%add4 = fadd double %add, %conv, !dbg !36
- tail call void @llvm.dbg.value(metadata !{double %add4}, i64 0, metadata !18, metadata !{}), !dbg !36
+ tail call void @llvm.dbg.value(metadata !{double %add4}, i64 0, metadata !18), !dbg !36
%div = fdiv double 3.940000e+00, %s.015, !dbg !37
%mul = fmul double %div, 3.200000e-01, !dbg !37
%add5 = fadd double %add4, %mul, !dbg !37
%sub = fsub double %add4, %add5, !dbg !37
- tail call void @llvm.dbg.value(metadata !{double %sub}, i64 0, metadata !18, metadata !{}), !dbg !37
+ tail call void @llvm.dbg.value(metadata !{double %sub}, i64 0, metadata !18), !dbg !37
%inc = add nsw i32 %u.016, 1, !dbg !38
- tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !21, metadata !{}), !dbg !38
+ tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !21), !dbg !38
%exitcond = icmp eq i32 %inc, %call, !dbg !38
br i1 %exitcond, label %if.end6, label %for.body, !dbg !38
; CHECK: edge for.body -> if.end6 probability is 1 / 10227 = 0.00977804
@@ -86,7 +86,7 @@
declare i32 @printf(i8* nocapture readonly, ...) #2
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #3
+declare void @llvm.dbg.value(metadata, i64, metadata) #3
attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readonly "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
diff --git a/llvm/test/Transforms/ScalarRepl/debuginfo-preserved.ll b/llvm/test/Transforms/ScalarRepl/debuginfo-preserved.ll
index 1df899a..71bf22a 100644
--- a/llvm/test/Transforms/ScalarRepl/debuginfo-preserved.ll
+++ b/llvm/test/Transforms/ScalarRepl/debuginfo-preserved.ll
@@ -17,10 +17,10 @@
%b.addr = alloca i32, align 4
%c = alloca i32, align 4
store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !6, metadata !{}), !dbg !7
+ call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !6), !dbg !7
store i32 %b, i32* %b.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %b.addr}, metadata !8, metadata !{}), !dbg !9
- call void @llvm.dbg.declare(metadata !{i32* %c}, metadata !10, metadata !{}), !dbg !12
+ call void @llvm.dbg.declare(metadata !{i32* %b.addr}, metadata !8), !dbg !9
+ call void @llvm.dbg.declare(metadata !{i32* %c}, metadata !10), !dbg !12
%tmp = load i32* %a.addr, align 4, !dbg !13
store i32 %tmp, i32* %c, align 4, !dbg !13
%tmp1 = load i32* %a.addr, align 4, !dbg !14
@@ -37,7 +37,7 @@
ret i32 %add7, !dbg !16
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!20}
diff --git a/llvm/test/Transforms/Scalarizer/dbginfo.ll b/llvm/test/Transforms/Scalarizer/dbginfo.ll
index 9d29f7b..546e89d 100644
--- a/llvm/test/Transforms/Scalarizer/dbginfo.ll
+++ b/llvm/test/Transforms/Scalarizer/dbginfo.ll
@@ -16,9 +16,9 @@
; CHECK: %b.i1 = getelementptr i32* %b.i0, i32 1
; CHECK: %b.i2 = getelementptr i32* %b.i0, i32 2
; CHECK: %b.i3 = getelementptr i32* %b.i0, i32 3
-; CHECK: tail call void @llvm.dbg.value(metadata !{<4 x i32>* %a}, i64 0, metadata !{{[0-9]+}}, metadata {{.*}}), !dbg !{{[0-9]+}}
-; CHECK: tail call void @llvm.dbg.value(metadata !{<4 x i32>* %b}, i64 0, metadata !{{[0-9]+}}, metadata {{.*}}), !dbg !{{[0-9]+}}
-; CHECK: tail call void @llvm.dbg.value(metadata !{<4 x i32>* %c}, i64 0, metadata !{{[0-9]+}}, metadata {{.*}}), !dbg !{{[0-9]+}}
+; CHECK: tail call void @llvm.dbg.value(metadata !{<4 x i32>* %a}, i64 0, metadata !{{[0-9]+}}), !dbg !{{[0-9]+}}
+; CHECK: tail call void @llvm.dbg.value(metadata !{<4 x i32>* %b}, i64 0, metadata !{{[0-9]+}}), !dbg !{{[0-9]+}}
+; CHECK: tail call void @llvm.dbg.value(metadata !{<4 x i32>* %c}, i64 0, metadata !{{[0-9]+}}), !dbg !{{[0-9]+}}
; CHECK: %bval.i0 = load i32* %b.i0, align 16, !dbg ![[TAG1:[0-9]+]], !tbaa ![[TAG2:[0-9]+]]
; CHECK: %bval.i1 = load i32* %b.i1, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]]
; CHECK: %bval.i2 = load i32* %b.i2, align 8, !dbg ![[TAG1]], !tbaa ![[TAG2]]
@@ -37,9 +37,9 @@
; CHECK: store i32 %add.i3, i32* %a.i3, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]]
; CHECK: ret void
entry:
- tail call void @llvm.dbg.value(metadata !{<4 x i32>* %a}, i64 0, metadata !15, metadata !{}), !dbg !20
- tail call void @llvm.dbg.value(metadata !{<4 x i32>* %b}, i64 0, metadata !16, metadata !{}), !dbg !20
- tail call void @llvm.dbg.value(metadata !{<4 x i32>* %c}, i64 0, metadata !17, metadata !{}), !dbg !20
+ tail call void @llvm.dbg.value(metadata !{<4 x i32>* %a}, i64 0, metadata !15), !dbg !20
+ tail call void @llvm.dbg.value(metadata !{<4 x i32>* %b}, i64 0, metadata !16), !dbg !20
+ tail call void @llvm.dbg.value(metadata !{<4 x i32>* %c}, i64 0, metadata !17), !dbg !20
%bval = load <4 x i32>* %b, align 16, !dbg !21, !tbaa !22
%cval = load <4 x i32>* %c, align 16, !dbg !21, !tbaa !22
%add = add <4 x i32> %bval, %cval, !dbg !21
@@ -48,7 +48,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata) #1
attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/Transforms/SimplifyCFG/branch-fold-dbg.ll b/llvm/test/Transforms/SimplifyCFG/branch-fold-dbg.ll
index b65ea75..9d8086c 100644
--- a/llvm/test/Transforms/SimplifyCFG/branch-fold-dbg.ll
+++ b/llvm/test/Transforms/SimplifyCFG/branch-fold-dbg.ll
@@ -25,7 +25,7 @@
BB3: ; preds = %BB2
%6 = getelementptr inbounds [5 x %0]* @0, i32 0, i32 %0, !dbg !6
- call void @llvm.dbg.value(metadata !{%0* %6}, i64 0, metadata !7, metadata !{}), !dbg !12
+ call void @llvm.dbg.value(metadata !{%0* %6}, i64 0, metadata !7), !dbg !12
%7 = icmp eq %0* %6, null, !dbg !13
br i1 %7, label %BB5, label %BB4, !dbg !13
@@ -37,7 +37,7 @@
ret void, !dbg !14
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.sp = !{!0}
diff --git a/llvm/test/Transforms/SimplifyCFG/hoist-dbgvalue.ll b/llvm/test/Transforms/SimplifyCFG/hoist-dbgvalue.ll
index f3a8bd7..0547fa9 100644
--- a/llvm/test/Transforms/SimplifyCFG/hoist-dbgvalue.ll
+++ b/llvm/test/Transforms/SimplifyCFG/hoist-dbgvalue.ll
@@ -1,8 +1,8 @@
; RUN: opt -simplifycfg -S < %s | FileCheck %s
define i32 @foo(i32 %i) nounwind ssp {
- call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !6, metadata !{}), !dbg !7
- call void @llvm.dbg.value(metadata !8, i64 0, metadata !9, metadata !{}), !dbg !11
+ call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !6), !dbg !7
+ call void @llvm.dbg.value(metadata !8, i64 0, metadata !9), !dbg !11
%1 = icmp ne i32 %i, 0, !dbg !12
;CHECK: call i32 (...)* @bar()
;CHECK-NEXT: llvm.dbg.value
@@ -10,12 +10,12 @@
; <label>:2 ; preds = %0
%3 = call i32 (...)* @bar(), !dbg !13
- call void @llvm.dbg.value(metadata !{i32 %3}, i64 0, metadata !9, metadata !{}), !dbg !13
+ call void @llvm.dbg.value(metadata !{i32 %3}, i64 0, metadata !9), !dbg !13
br label %6, !dbg !15
; <label>:4 ; preds = %0
%5 = call i32 (...)* @bar(), !dbg !16
- call void @llvm.dbg.value(metadata !{i32 %5}, i64 0, metadata !9, metadata !{}), !dbg !16
+ call void @llvm.dbg.value(metadata !{i32 %5}, i64 0, metadata !9), !dbg !16
br label %6, !dbg !18
; <label>:6 ; preds = %4, %2
@@ -23,11 +23,11 @@
ret i32 %k.0, !dbg !19
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
declare i32 @bar(...)
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.module.flags = !{!21}
!llvm.dbg.sp = !{!0}
diff --git a/llvm/test/Transforms/StripSymbols/2010-06-30-StripDebug.ll b/llvm/test/Transforms/StripSymbols/2010-06-30-StripDebug.ll
index 78888b9..5353744 100644
--- a/llvm/test/Transforms/StripSymbols/2010-06-30-StripDebug.ll
+++ b/llvm/test/Transforms/StripSymbols/2010-06-30-StripDebug.ll
@@ -6,11 +6,11 @@
define void @foo() nounwind readnone optsize ssp {
entry:
- tail call void @llvm.dbg.value(metadata !9, i64 0, metadata !5, metadata !{}), !dbg !10
+ tail call void @llvm.dbg.value(metadata !9, i64 0, metadata !5), !dbg !10
ret void, !dbg !11
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!13}
diff --git a/llvm/test/Transforms/StripSymbols/strip-dead-debug-info.ll b/llvm/test/Transforms/StripSymbols/strip-dead-debug-info.ll
index 4b086bb..8ce7b87 100644
--- a/llvm/test/Transforms/StripSymbols/strip-dead-debug-info.ll
+++ b/llvm/test/Transforms/StripSymbols/strip-dead-debug-info.ll
@@ -7,7 +7,7 @@
@xyz = global i32 2
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #0
+declare void @llvm.dbg.value(metadata, i64, metadata) #0
; Function Attrs: nounwind readnone ssp
define i32 @fn() #1 {
@@ -18,7 +18,7 @@
; Function Attrs: nounwind readonly ssp
define i32 @foo(i32 %i) #2 {
entry:
- tail call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !15, metadata !{}), !dbg !20
+ tail call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !15), !dbg !20
%.0 = load i32* @xyz, align 4
ret i32 %.0, !dbg !21
}