commit b4d67b593e917c53f570540ad950e52873bd0aa4
author Richard Sandiford <rsandifo@linux.vnet.ibm.com> Thu Mar 06 12:03:36 2014 +0000
committer Richard Sandiford <rsandifo@linux.vnet.ibm.com> Thu Mar 06 12:03:36 2014 +0000
tree a276530296feddb63f0bfcb904c1b65b42290603
parent 69bd9ca91cc678ba7da002d6cbb0269d57d8decd

[SystemZ] Remove "virtual" from override methods

Also fix a couple of cases where "override" was missing.  No behavioural
change intended.

llvm-svn: 203110

llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp

diff --git a/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp b/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
index 799d22b..a3dd4b6 100644
--- a/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
+++ b/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
@@ -162,7 +162,7 @@
   }
 
   // Token operands
-  virtual bool isToken() const override {
+  bool isToken() const override {
     return Kind == KindToken;
   }
   StringRef getToken() const {
@@ -171,13 +171,13 @@
   }
 
   // Register operands.
-  virtual bool isReg() const override {
+  bool isReg() const override {
     return Kind == KindReg;
   }
   bool isReg(RegisterKind RegKind) const {
     return Kind == KindReg && Reg.Kind == RegKind;
   }
-  virtual unsigned getReg() const override {
+  unsigned getReg() const override {
     assert(Kind == KindReg && "Not a register");
     return Reg.Num;
   }
@@ -189,7 +189,7 @@
   }
 
   // Immediate operands.
-  virtual bool isImm() const override {
+  bool isImm() const override {
     return Kind == KindImm;
   }
   bool isImm(int64_t MinValue, int64_t MaxValue) const {
@@ -201,7 +201,7 @@
   }
 
   // Memory operands.
-  virtual bool isMem() const override {
+  bool isMem() const override {
     return Kind == KindMem;
   }
   bool isMem(RegisterKind RegKind, MemoryKind MemKind) const {
@@ -221,9 +221,9 @@
   }
 
   // Override MCParsedAsmOperand.
-  virtual SMLoc getStartLoc() const override { return StartLoc; }
-  virtual SMLoc getEndLoc() const override { return EndLoc; }
-  virtual void print(raw_ostream &OS) const override;
+  SMLoc getStartLoc() const override { return StartLoc; }
+  SMLoc getEndLoc() const override { return EndLoc; }
+  void print(raw_ostream &OS) const override;
 
   // Used by the TableGen code to add particular types of operand
   // to an instruction.
@@ -340,18 +340,16 @@
   }
 
   // Override MCTargetAsmParser.
-  virtual bool ParseDirective(AsmToken DirectiveID) override;
-  virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
-                             SMLoc &EndLoc) override;
-  virtual bool
-  ParseInstruction(ParseInstructionInfo &Info,
-                   StringRef Name, SMLoc NameLoc,
-                   SmallVectorImpl<MCParsedAsmOperand*> &Operands) override;
-  virtual bool
-    MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
-                            SmallVectorImpl<MCParsedAsmOperand*> &Operands,
-                            MCStreamer &Out, unsigned &ErrorInfo,
-                            bool MatchingInlineAsm) override;
+  bool ParseDirective(AsmToken DirectiveID) override;
+  bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override;
+  bool ParseInstruction(ParseInstructionInfo &Info,
+                        StringRef Name, SMLoc NameLoc,
+                        SmallVectorImpl<MCParsedAsmOperand*> &Operands)
+    override;
+  bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
+                               SmallVectorImpl<MCParsedAsmOperand*> &Operands,
+                               MCStreamer &Out, unsigned &ErrorInfo,
+                               bool MatchingInlineAsm) override;
 
   // Used by the TableGen code to parse particular operand types.
   OperandMatchResultTy