commit b5088da452d82a11e9f0f518df100e440d7266d6
author Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> Fri Mar 23 11:50:43 2018 +0000
committer Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> Fri Mar 23 11:50:43 2018 +0000
tree ea5d784471b5fc11a841a9fada01880cc2f3130d
parent 29538c6ddbdc74889d2f76bb4f710782e39989b3

[llvm-mca] Pass the InstrBuilder to the constructor of Backend.

This is done in preparation for the fix for PR36784.
No functional change.

llvm-svn: 328306

llvm/tools/llvm-mca/Backend.cpp

diff --git a/llvm/tools/llvm-mca/Backend.cpp b/llvm/tools/llvm-mca/Backend.cpp
index 94edf87..d0afa45 100644
--- a/llvm/tools/llvm-mca/Backend.cpp
+++ b/llvm/tools/llvm-mca/Backend.cpp
@@ -34,7 +34,7 @@
   while (SM.hasNext()) {
     InstRef IR = SM.peekNext();
     std::unique_ptr<Instruction> NewIS =
-        IB->createInstruction(IR.first, *IR.second);
+        IB.createInstruction(IR.first, *IR.second);
     const InstrDesc &Desc = NewIS->getDesc();
     if (!DU->isAvailable(Desc.NumMicroOps) ||
         !DU->canDispatch(IR.first, *NewIS))

llvm/tools/llvm-mca/Backend.h

diff --git a/llvm/tools/llvm-mca/Backend.h b/llvm/tools/llvm-mca/Backend.h
index 027850e..902327a 100644
--- a/llvm/tools/llvm-mca/Backend.h
+++ b/llvm/tools/llvm-mca/Backend.h
@@ -47,7 +47,7 @@
 class Backend {
   const llvm::MCSubtargetInfo &STI;
 
-  std::unique_ptr<InstrBuilder> IB;
+  InstrBuilder &IB;
   std::unique_ptr<Scheduler> HWS;
   std::unique_ptr<DispatchUnit> DU;
   SourceMgr &SM;
@@ -59,12 +59,12 @@
   void runCycle(unsigned Cycle);
 
 public:
-  Backend(const llvm::MCSubtargetInfo &Subtarget, const llvm::MCInstrInfo &MCII,
-          const llvm::MCRegisterInfo &MRI, SourceMgr &Source,
+  Backend(const llvm::MCSubtargetInfo &Subtarget,
+          const llvm::MCRegisterInfo &MRI, InstrBuilder &B, SourceMgr &Source,
           unsigned DispatchWidth = 0, unsigned RegisterFileSize = 0,
           unsigned MaxRetirePerCycle = 0, unsigned LoadQueueSize = 0,
           unsigned StoreQueueSize = 0, bool AssumeNoAlias = false)
-      : STI(Subtarget),
+      : STI(Subtarget), IB(B),
         HWS(llvm::make_unique<Scheduler>(this, Subtarget.getSchedModel(),
                                          LoadQueueSize, StoreQueueSize,
                                          AssumeNoAlias)),
@@ -72,7 +72,6 @@
             this, MRI, Subtarget.getSchedModel().MicroOpBufferSize,
             RegisterFileSize, MaxRetirePerCycle, DispatchWidth, HWS.get())),
         SM(Source), Cycles(0) {
-    IB = llvm::make_unique<InstrBuilder>(Subtarget, MCII);
     HWS->setDispatchUnit(DU.get());
   }
 
@@ -98,7 +97,6 @@
   void notifyReleasedBuffers(llvm::ArrayRef<unsigned> Buffers);
   void notifyCycleEnd(unsigned Cycle);
 };
-
 } // namespace mca
 
 #endif

llvm/tools/llvm-mca/llvm-mca.cpp

diff --git a/llvm/tools/llvm-mca/llvm-mca.cpp b/llvm/tools/llvm-mca/llvm-mca.cpp
index 0ae9c88..5c085af 100644
--- a/llvm/tools/llvm-mca/llvm-mca.cpp
+++ b/llvm/tools/llvm-mca/llvm-mca.cpp
@@ -321,8 +321,12 @@
   if (DispatchWidth)
     Width = DispatchWidth;
 
+  // Create an instruction builder.
+  std::unique_ptr<mca::InstrBuilder> IB =
+      llvm::make_unique<mca::InstrBuilder>(*STI, *MCII);
+
   std::unique_ptr<mca::Backend> B = llvm::make_unique<mca::Backend>(
-      *STI, *MCII, *MRI, *S, Width, RegisterFileSize, MaxRetirePerCycle,
+      *STI, *MRI, *IB, *S, Width, RegisterFileSize, MaxRetirePerCycle,
       LoadQueueSize, StoreQueueSize, AssumeNoAlias);
 
   std::unique_ptr<mca::BackendPrinter> Printer =