commit b598f7b8698d63910e8a5496f5a480d780c53091
author Matt Arsenault <Matthew.Arsenault@amd.com> Mon Feb 24 21:01:18 2014 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Mon Feb 24 21:01:18 2014 +0000
tree 083a3bff53dbb37450e9c48be6d7800e25492166
parent 58a76396982ac9313f6fa46746881238c080f5bc

Add missing const

llvm-svn: 202074

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 3ab8ad8..e81c159 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -6483,7 +6483,7 @@
                                         unsigned &SplatBitSize,
                                         bool &HasAnyUndefs,
                                         unsigned MinSplatBits,
-                                        bool isBigEndian) {
+                                        bool isBigEndian) const {
   EVT VT = getValueType(0);
   assert(VT.isVector() && "Expected a vector type");
   unsigned sz = VT.getSizeInBits();