| commit | b81495dccb2977e8861fa40e0b38657b46f148e6 | [log] [tgz] |
|---|---|---|
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | Wed Sep 20 05:01:53 2017 +0000 |
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | Wed Sep 20 05:01:53 2017 +0000 |
| tree | 5b9cc193b82458716f81e05376caf19c023f973f | |
| parent | e08ccfe3a116e4c0907fed266788d05681cb5db2 [diff] |
AMDGPU: Match load d16 hi instructions Also starts selecting global loads for constant address in some cases. Some end up selecting to mubuf still, which requires investigation. We still get sub-optimal regalloc and extra waitcnts inserted due to not really tracking the liveness of the separate register halves. llvm-svn: 313716