[X86] Cleanup 'x' and 'y' mnemonic suffixes for vcvtpd2dq/vcvttpd2dq/vcvtpd2ps and similar instructions.
-Don't print the 'x' suffix for the 128-bit reg/mem VEX encoded instructions in Intel syntax. This is consistent with the EVEX versions.
-Don't print the 'y' suffix for the 256-bit reg/reg VEX encoded instructions in Intel or AT&T syntax. This is consistent with the EVEX versions.
-Allow the 'x' and 'y' suffixes to be used for the reg/mem forms when we're assembling using Intel syntax.
-Allow the 'x' and 'y' suffixes on the reg/reg EVEX encoded instructions in Intel or AT&T syntax. This is consistent with what VEX was already allowing.
This should fix at least some of PR28850.
llvm-svn: 286787
diff --git a/llvm/test/CodeGen/X86/avx-cvt.ll b/llvm/test/CodeGen/X86/avx-cvt.ll
index 2733989..c8e8068 100644
--- a/llvm/test/CodeGen/X86/avx-cvt.ll
+++ b/llvm/test/CodeGen/X86/avx-cvt.ll
@@ -44,7 +44,7 @@
define <4 x i32> @fptosi01(<4 x double> %a) {
; CHECK-LABEL: fptosi01:
; CHECK: # BB#0:
-; CHECK-NEXT: vcvttpd2dqy %ymm0, %xmm0
+; CHECK-NEXT: vcvttpd2dq %ymm0, %xmm0
; CHECK-NEXT: vzeroupper
; CHECK-NEXT: retq
%b = fptosi <4 x double> %a to <4 x i32>
@@ -54,8 +54,8 @@
define <8 x float> @fptrunc00(<8 x double> %b) nounwind {
; CHECK-LABEL: fptrunc00:
; CHECK: # BB#0:
-; CHECK-NEXT: vcvtpd2psy %ymm0, %xmm0
-; CHECK-NEXT: vcvtpd2psy %ymm1, %xmm1
+; CHECK-NEXT: vcvtpd2ps %ymm0, %xmm0
+; CHECK-NEXT: vcvtpd2ps %ymm1, %xmm1
; CHECK-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; CHECK-NEXT: retq
%a = fptrunc <8 x double> %b to <8 x float>
diff --git a/llvm/test/CodeGen/X86/avx-fp2int.ll b/llvm/test/CodeGen/X86/avx-fp2int.ll
index 8beaac6..f06564b 100644
--- a/llvm/test/CodeGen/X86/avx-fp2int.ll
+++ b/llvm/test/CodeGen/X86/avx-fp2int.ll
@@ -3,10 +3,10 @@
;; Check that FP_TO_SINT and FP_TO_UINT generate convert with truncate
; CHECK-LABEL: test1:
-; CHECK: vcvttpd2dqy
+; CHECK: vcvttpd2dq
; CHECK: ret
; CHECK-LABEL: test2:
-; CHECK: vcvttpd2dqy
+; CHECK: vcvttpd2dq
; CHECK: ret
define <4 x i8> @test1(<4 x double> %d) {
diff --git a/llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll
index 079a57e..fe4fc65 100644
--- a/llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll
@@ -605,13 +605,13 @@
define <2 x i64> @test_mm256_cvtpd_epi32(<4 x double> %a0) nounwind {
; X32-LABEL: test_mm256_cvtpd_epi32:
; X32: # BB#0:
-; X32-NEXT: vcvtpd2dqy %ymm0, %xmm0
+; X32-NEXT: vcvtpd2dq %ymm0, %xmm0
; X32-NEXT: vzeroupper
; X32-NEXT: retl
;
; X64-LABEL: test_mm256_cvtpd_epi32:
; X64: # BB#0:
-; X64-NEXT: vcvtpd2dqy %ymm0, %xmm0
+; X64-NEXT: vcvtpd2dq %ymm0, %xmm0
; X64-NEXT: vzeroupper
; X64-NEXT: retq
%cvt = call <4 x i32> @llvm.x86.avx.cvt.pd2dq.256(<4 x double> %a0)
@@ -623,13 +623,13 @@
define <4 x float> @test_mm256_cvtpd_ps(<4 x double> %a0) nounwind {
; X32-LABEL: test_mm256_cvtpd_ps:
; X32: # BB#0:
-; X32-NEXT: vcvtpd2psy %ymm0, %xmm0
+; X32-NEXT: vcvtpd2ps %ymm0, %xmm0
; X32-NEXT: vzeroupper
; X32-NEXT: retl
;
; X64-LABEL: test_mm256_cvtpd_ps:
; X64: # BB#0:
-; X64-NEXT: vcvtpd2psy %ymm0, %xmm0
+; X64-NEXT: vcvtpd2ps %ymm0, %xmm0
; X64-NEXT: vzeroupper
; X64-NEXT: retq
%res = call <4 x float> @llvm.x86.avx.cvt.pd2.ps.256(<4 x double> %a0)
@@ -670,13 +670,13 @@
define <2 x i64> @test_mm256_cvttpd_epi32(<4 x double> %a0) nounwind {
; X32-LABEL: test_mm256_cvttpd_epi32:
; X32: # BB#0:
-; X32-NEXT: vcvttpd2dqy %ymm0, %xmm0
+; X32-NEXT: vcvttpd2dq %ymm0, %xmm0
; X32-NEXT: vzeroupper
; X32-NEXT: retl
;
; X64-LABEL: test_mm256_cvttpd_epi32:
; X64: # BB#0:
-; X64-NEXT: vcvttpd2dqy %ymm0, %xmm0
+; X64-NEXT: vcvttpd2dq %ymm0, %xmm0
; X64-NEXT: vzeroupper
; X64-NEXT: retq
%cvt = call <4 x i32> @llvm.x86.avx.cvtt.pd2dq.256(<4 x double> %a0)
diff --git a/llvm/test/CodeGen/X86/avx-intrinsics-x86.ll b/llvm/test/CodeGen/X86/avx-intrinsics-x86.ll
index ce40345..fb92f25 100644
--- a/llvm/test/CodeGen/X86/avx-intrinsics-x86.ll
+++ b/llvm/test/CodeGen/X86/avx-intrinsics-x86.ll
@@ -2833,7 +2833,7 @@
define <4 x float> @test_x86_avx_cvt_pd2_ps_256(<4 x double> %a0) {
; AVX-LABEL: test_x86_avx_cvt_pd2_ps_256:
; AVX: ## BB#0:
-; AVX-NEXT: vcvtpd2psy %ymm0, %xmm0 ## encoding: [0xc5,0xfd,0x5a,0xc0]
+; AVX-NEXT: vcvtpd2ps %ymm0, %xmm0 ## encoding: [0xc5,0xfd,0x5a,0xc0]
; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
; AVX-NEXT: retl ## encoding: [0xc3]
;
@@ -2850,7 +2850,7 @@
define <4 x i32> @test_x86_avx_cvt_pd2dq_256(<4 x double> %a0) {
; AVX-LABEL: test_x86_avx_cvt_pd2dq_256:
; AVX: ## BB#0:
-; AVX-NEXT: vcvtpd2dqy %ymm0, %xmm0 ## encoding: [0xc5,0xff,0xe6,0xc0]
+; AVX-NEXT: vcvtpd2dq %ymm0, %xmm0 ## encoding: [0xc5,0xff,0xe6,0xc0]
; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
; AVX-NEXT: retl ## encoding: [0xc3]
;
@@ -2894,7 +2894,7 @@
define <4 x i32> @test_x86_avx_cvtt_pd2dq_256(<4 x double> %a0) {
; AVX-LABEL: test_x86_avx_cvtt_pd2dq_256:
; AVX: ## BB#0:
-; AVX-NEXT: vcvttpd2dqy %ymm0, %xmm0 ## encoding: [0xc5,0xfd,0xe6,0xc0]
+; AVX-NEXT: vcvttpd2dq %ymm0, %xmm0 ## encoding: [0xc5,0xfd,0xe6,0xc0]
; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
; AVX-NEXT: retl ## encoding: [0xc3]
;
diff --git a/llvm/test/CodeGen/X86/avx512-cvt.ll b/llvm/test/CodeGen/X86/avx512-cvt.ll
index ff4270a..c370b79 100644
--- a/llvm/test/CodeGen/X86/avx512-cvt.ll
+++ b/llvm/test/CodeGen/X86/avx512-cvt.ll
@@ -361,15 +361,10 @@
}
define <4 x i32> @fptosi03(<4 x double> %a) {
-; KNL-LABEL: fptosi03:
-; KNL: ## BB#0:
-; KNL-NEXT: vcvttpd2dqy %ymm0, %xmm0
-; KNL-NEXT: retq
-;
-; SKX-LABEL: fptosi03:
-; SKX: ## BB#0:
-; SKX-NEXT: vcvttpd2dq %ymm0, %xmm0
-; SKX-NEXT: retq
+; ALL-LABEL: fptosi03:
+; ALL: ## BB#0:
+; ALL-NEXT: vcvttpd2dq %ymm0, %xmm0
+; ALL-NEXT: retq
%b = fptosi <4 x double> %a to <4 x i32>
ret <4 x i32> %b
}
@@ -393,15 +388,10 @@
}
define <4 x float> @fptrunc01(<4 x double> %b) {
-; KNL-LABEL: fptrunc01:
-; KNL: ## BB#0:
-; KNL-NEXT: vcvtpd2psy %ymm0, %xmm0
-; KNL-NEXT: retq
-;
-; SKX-LABEL: fptrunc01:
-; SKX: ## BB#0:
-; SKX-NEXT: vcvtpd2ps %ymm0, %xmm0
-; SKX-NEXT: retq
+; ALL-LABEL: fptrunc01:
+; ALL: ## BB#0:
+; ALL-NEXT: vcvtpd2ps %ymm0, %xmm0
+; ALL-NEXT: retq
%a = fptrunc <4 x double> %b to <4 x float>
ret <4 x float> %a
}
@@ -411,7 +401,7 @@
; KNL: ## BB#0:
; KNL-NEXT: vpslld $31, %xmm1, %xmm1
; KNL-NEXT: vpsrad $31, %xmm1, %xmm1
-; KNL-NEXT: vcvtpd2psy %ymm0, %xmm0
+; KNL-NEXT: vcvtpd2ps %ymm0, %xmm0
; KNL-NEXT: vpand %xmm0, %xmm1, %xmm0
; KNL-NEXT: retq
;
diff --git a/llvm/test/CodeGen/X86/combine-fcopysign.ll b/llvm/test/CodeGen/X86/combine-fcopysign.ll
index 1c559ff..807ac4e 100644
--- a/llvm/test/CodeGen/X86/combine-fcopysign.ll
+++ b/llvm/test/CodeGen/X86/combine-fcopysign.ll
@@ -315,7 +315,7 @@
; AVX: # BB#0:
; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm2
; AVX-NEXT: vandpd %xmm2, %xmm0, %xmm0
-; AVX-NEXT: vcvtpd2psy %ymm1, %xmm1
+; AVX-NEXT: vcvtpd2ps %ymm1, %xmm1
; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm2
; AVX-NEXT: vandpd %xmm2, %xmm1, %xmm1
; AVX-NEXT: vorpd %xmm1, %xmm0, %xmm0
diff --git a/llvm/test/CodeGen/X86/fp-trunc.ll b/llvm/test/CodeGen/X86/fp-trunc.ll
index b1ffd5a..2f700cd 100644
--- a/llvm/test/CodeGen/X86/fp-trunc.ll
+++ b/llvm/test/CodeGen/X86/fp-trunc.ll
@@ -50,7 +50,7 @@
;
; AVX-LABEL: test3:
; AVX: # BB#0:
-; AVX-NEXT: vcvtpd2psy %ymm0, %xmm0
+; AVX-NEXT: vcvtpd2ps %ymm0, %xmm0
; AVX-NEXT: vzeroupper
; AVX-NEXT: retl
%y = fptrunc <4 x double> %x to <4 x float>
@@ -72,8 +72,8 @@
;
; AVX-LABEL: test4:
; AVX: # BB#0:
-; AVX-NEXT: vcvtpd2psy %ymm0, %xmm0
-; AVX-NEXT: vcvtpd2psy %ymm1, %xmm1
+; AVX-NEXT: vcvtpd2ps %ymm0, %xmm0
+; AVX-NEXT: vcvtpd2ps %ymm1, %xmm1
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX-NEXT: retl
%y = fptrunc <8 x double> %x to <8 x float>
diff --git a/llvm/test/CodeGen/X86/vec_fp_to_int.ll b/llvm/test/CodeGen/X86/vec_fp_to_int.ll
index 2b5bf8f..2e9faba 100644
--- a/llvm/test/CodeGen/X86/vec_fp_to_int.ll
+++ b/llvm/test/CodeGen/X86/vec_fp_to_int.ll
@@ -117,27 +117,15 @@
; AVX-LABEL: fptosi_4f64_to_2i32:
; AVX: # BB#0:
; AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
-; AVX-NEXT: vcvttpd2dqy %ymm0, %xmm0
+; AVX-NEXT: vcvttpd2dq %ymm0, %xmm0
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
-; AVX512F-LABEL: fptosi_4f64_to_2i32:
-; AVX512F: # BB#0:
-; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
-; AVX512F-NEXT: vcvttpd2dqy %ymm0, %xmm0
-; AVX512F-NEXT: retq
-;
-; AVX512VL-LABEL: fptosi_4f64_to_2i32:
-; AVX512VL: # BB#0:
-; AVX512VL-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
-; AVX512VL-NEXT: vcvttpd2dq %ymm0, %xmm0
-; AVX512VL-NEXT: retq
-;
-; AVX512VLDQ-LABEL: fptosi_4f64_to_2i32:
-; AVX512VLDQ: # BB#0:
-; AVX512VLDQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
-; AVX512VLDQ-NEXT: vcvttpd2dq %ymm0, %xmm0
-; AVX512VLDQ-NEXT: retq
+; AVX512-LABEL: fptosi_4f64_to_2i32:
+; AVX512: # BB#0:
+; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; AVX512-NEXT: vcvttpd2dq %ymm0, %xmm0
+; AVX512-NEXT: retq
%ext = shufflevector <2 x double> %a, <2 x double> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
%cvt = fptosi <4 x double> %ext to <4 x i32>
ret <4 x i32> %cvt
@@ -252,24 +240,14 @@
;
; AVX-LABEL: fptosi_4f64_to_4i32:
; AVX: # BB#0:
-; AVX-NEXT: vcvttpd2dqy %ymm0, %xmm0
+; AVX-NEXT: vcvttpd2dq %ymm0, %xmm0
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
-; AVX512F-LABEL: fptosi_4f64_to_4i32:
-; AVX512F: # BB#0:
-; AVX512F-NEXT: vcvttpd2dqy %ymm0, %xmm0
-; AVX512F-NEXT: retq
-;
-; AVX512VL-LABEL: fptosi_4f64_to_4i32:
-; AVX512VL: # BB#0:
-; AVX512VL-NEXT: vcvttpd2dq %ymm0, %xmm0
-; AVX512VL-NEXT: retq
-;
-; AVX512VLDQ-LABEL: fptosi_4f64_to_4i32:
-; AVX512VLDQ: # BB#0:
-; AVX512VLDQ-NEXT: vcvttpd2dq %ymm0, %xmm0
-; AVX512VLDQ-NEXT: retq
+; AVX512-LABEL: fptosi_4f64_to_4i32:
+; AVX512: # BB#0:
+; AVX512-NEXT: vcvttpd2dq %ymm0, %xmm0
+; AVX512-NEXT: retq
%cvt = fptosi <4 x double> %a to <4 x i32>
ret <4 x i32> %cvt
}