[X86] Tag CLFLUSHOPT with same scheduling behaviour as CLFLUSH
llvm-svn: 319253
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td
index 0a6f93b..4a3d365 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.td
+++ b/llvm/lib/Target/X86/X86InstrInfo.td
@@ -2708,9 +2708,10 @@
// Memory Instructions
//
-let Predicates = [HasCLFLUSHOPT] in
+let Predicates = [HasCLFLUSHOPT], SchedRW = [WriteLoad] in
def CLFLUSHOPT : I<0xAE, MRM7m, (outs), (ins i8mem:$src),
- "clflushopt\t$src", [(int_x86_clflushopt addr:$src)]>, PD;
+ "clflushopt\t$src", [(int_x86_clflushopt addr:$src)],
+ IIC_SSE_PREFETCH>, PD;
let Predicates = [HasCLWB] in
def CLWB : I<0xAE, MRM6m, (outs), (ins i8mem:$src), "clwb\t$src",
diff --git a/llvm/test/CodeGen/X86/clflushopt-schedule.ll b/llvm/test/CodeGen/X86/clflushopt-schedule.ll
index 57f9ee1..3ba02f0 100644
--- a/llvm/test/CodeGen/X86/clflushopt-schedule.ll
+++ b/llvm/test/CodeGen/X86/clflushopt-schedule.ll
@@ -13,7 +13,7 @@
;
; GLM-LABEL: clflushopt:
; GLM: # BB#0:
-; GLM-NEXT: clflushopt (%rdi)
+; GLM-NEXT: clflushopt (%rdi) # sched: [3:1.00]
; GLM-NEXT: retq # sched: [4:1.00]
;
; SKYLAKE-LABEL: clflushopt:
@@ -28,7 +28,7 @@
;
; ZNVER1-LABEL: clflushopt:
; ZNVER1: # BB#0:
-; ZNVER1-NEXT: clflushopt (%rdi)
+; ZNVER1-NEXT: clflushopt (%rdi) # sched: [8:0.50]
; ZNVER1-NEXT: retq # sched: [1:0.50]
tail call void @llvm.x86.clflushopt(i8* %p)
ret void