commit b9b7f4b8d3c804544d9764e00b365bfc8d9c793c
author Evandro Menezes <e.menezes@samsung.com> Tue Feb 21 22:16:11 2017 +0000
committer Evandro Menezes <e.menezes@samsung.com> Tue Feb 21 22:16:11 2017 +0000
tree b0c310826d9522e706d49f25f344ab5048a47775
parent bc9a13db0ec3c166ae92206fa9ab8848aef2ca1a

[AArch64, X86] Guard against both instrs being wild cards

If both instrs are wild cards, the result can be a crash.

llvm-svn: 295776

llvm/lib/Target/AArch64/AArch64MacroFusion.cpp

diff --git a/llvm/lib/Target/AArch64/AArch64MacroFusion.cpp b/llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
index a6965e8..cde2dab 100644
--- a/llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
+++ b/llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
@@ -34,12 +34,13 @@
                                    const AArch64Subtarget &ST,
                                    const MachineInstr *First,
                                    const MachineInstr *Second) {
+  assert((First || Second) && "At least one instr must be specified");
   unsigned FirstOpcode =
-      First ? First->getOpcode()
-            : static_cast<unsigned>(AArch64::INSTRUCTION_LIST_END);
+    First ? First->getOpcode()
+	  : static_cast<unsigned>(AArch64::INSTRUCTION_LIST_END);
   unsigned SecondOpcode =
-      Second ? Second->getOpcode()
-             : static_cast<unsigned>(AArch64::INSTRUCTION_LIST_END);
+    Second ? Second->getOpcode()
+           : static_cast<unsigned>(AArch64::INSTRUCTION_LIST_END);
 
   if (ST.hasArithmeticBccFusion())
     // Fuse CMN, CMP, TST followed by Bcc.

llvm/lib/Target/X86/X86MacroFusion.cpp

diff --git a/llvm/lib/Target/X86/X86MacroFusion.cpp b/llvm/lib/Target/X86/X86MacroFusion.cpp
index d09d8f3..ac44d92 100644
--- a/llvm/lib/Target/X86/X86MacroFusion.cpp
+++ b/llvm/lib/Target/X86/X86MacroFusion.cpp
@@ -44,12 +44,13 @@
     FuseInc
   } FuseKind;
 
+  assert((First || Second) && "At least one instr must be specified");
   unsigned FirstOpcode = First
-                             ? First->getOpcode()
-                             : static_cast<unsigned>(X86::INSTRUCTION_LIST_END);
-  unsigned SecondOpcode =
-      Second ? Second->getOpcode()
-             : static_cast<unsigned>(X86::INSTRUCTION_LIST_END);
+                         ? First->getOpcode()
+                         : static_cast<unsigned>(X86::INSTRUCTION_LIST_END);
+  unsigned SecondOpcode = Second
+                          ? Second->getOpcode()
+                          : static_cast<unsigned>(X86::INSTRUCTION_LIST_END);
 
   switch (SecondOpcode) {
   default:
@@ -215,7 +216,7 @@
   // For now, assume targets can only fuse with the branch.
   SUnit &ExitSU = DAG->ExitSU;
   MachineInstr *Branch = ExitSU.getInstr();
-  if (!shouldScheduleAdjacent(ST, nullptr, Branch))
+  if (!Branch || !shouldScheduleAdjacent(ST, nullptr, Branch))
     return;
 
   for (SDep &PredDep : ExitSU.Preds) {