commit ba637db2986af2db841ac09cf11300d6bb6d155a
author Bill Schmidt <wschmidt@linux.vnet.ibm.com> Fri Oct 17 21:19:59 2014 +0000
committer Bill Schmidt <wschmidt@linux.vnet.ibm.com> Fri Oct 17 21:19:59 2014 +0000
tree 7b185e9a6f170e6e922e598d8fb362182c8c4332
parent a708358e933da870b670d77693f236ccd2e53e12

[PowerPC] Change assert to better form

llvm-svn: 220092

llvm/lib/Target/PowerPC/PPCInstrInfo.cpp

diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index 3b0f1ef..ff2633e 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -1730,9 +1730,9 @@
 
         // For virtual registers, verify that the addend source register
         // is live here (as should have been assured above).
-        if (TargetRegisterInfo::isVirtualRegister(AddendSrcReg))
-          assert(LIS->getInterval(AddendSrcReg).liveAt(FMAIdx) &&
-                 "Addend source register is not available!");
+        assert((!TargetRegisterInfo::isVirtualRegister(AddendSrcReg) ||
+                LIS->getInterval(AddendSrcReg).liveAt(FMAIdx)) &&
+               "Addend source register is not live!");
 
         // Transform: (O2 * O3) + O1 -> (O2 * O1) + O3.