commit ba75e816447f4927bda39f6ab03964a02ec6fea5
author Bob Wilson <bob.wilson@apple.com> Tue Mar 16 00:31:15 2010 +0000
committer Bob Wilson <bob.wilson@apple.com> Tue Mar 16 00:31:15 2010 +0000
tree 210d5b6f49c6454c3a08e2013cc7a4e4f12ceecf
parent db035a0af2ac5dfbefe952a874903b08d9b48152

Wrap a long line and add some parens to be consistent.

llvm-svn: 98596

llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
index 77dd466..8fbcf45 100644
--- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -243,8 +243,9 @@
     BaseKill = true;  // New base is always killed right its use.
   }
 
-  bool isDPR = Opcode == ARM::VLDRD || Opcode == ARM::VSTRD;
-  bool isDef = isi32Load(Opcode) || Opcode == ARM::VLDRS || Opcode == ARM::VLDRD;
+  bool isDPR = (Opcode == ARM::VLDRD || Opcode == ARM::VSTRD);
+  bool isDef = (isi32Load(Opcode) || Opcode == ARM::VLDRS ||
+                Opcode == ARM::VLDRD);
   Opcode = getLoadStoreMultipleOpcode(Opcode);
   MachineInstrBuilder MIB = (isAM4)
     ? BuildMI(MBB, MBBI, dl, TII->get(Opcode))