TableGen: Use StringInit instead of std::string for DagInit arg names
llvm-svn: 288644
diff --git a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
index 64b0550..440f963 100644
--- a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
+++ b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
@@ -2073,7 +2073,7 @@
if (R->isSubClassOf("SDNode") || R->isSubClassOf("PatFrag"))
return ParseTreePattern(
DagInit::get(DI, nullptr,
- std::vector<std::pair<Init*, std::string> >()),
+ std::vector<std::pair<Init*, StringInit*> >()),
OpName);
// Input argument?
@@ -2127,7 +2127,8 @@
if (Dag->getNumArgs() != 1)
error("Type cast only takes one operand!");
- TreePatternNode *New = ParseTreePattern(Dag->getArg(0), Dag->getArgName(0));
+ TreePatternNode *New = ParseTreePattern(Dag->getArg(0),
+ Dag->getArgNameStr(0));
// Apply the type cast.
assert(New->getNumTypes() == 1 && "FIXME: Unhandled");
@@ -2178,7 +2179,7 @@
// Parse all the operands.
for (unsigned i = 0, e = Dag->getNumArgs(); i != e; ++i)
- Children.push_back(ParseTreePattern(Dag->getArg(i), Dag->getArgName(i)));
+ Children.push_back(ParseTreePattern(Dag->getArg(i), Dag->getArgNameStr(i)));
// If the operator is an intrinsic, then this is just syntactic sugar for for
// (intrinsic_* <number>, ..children..). Pick the right intrinsic node, and
@@ -2484,13 +2485,14 @@
if (!isa<DefInit>(OpsList->getArg(j)) ||
cast<DefInit>(OpsList->getArg(j))->getDef()->getName() != "node")
P->error("Operands list should all be 'node' values.");
- if (OpsList->getArgName(j).empty())
+ if (!OpsList->getArgName(j))
P->error("Operands list should have names for each operand!");
- if (!OperandsSet.count(OpsList->getArgName(j)))
- P->error("'" + OpsList->getArgName(j) +
+ StringRef ArgNameStr = OpsList->getArgNameStr(j);
+ if (!OperandsSet.count(ArgNameStr))
+ P->error("'" + ArgNameStr +
"' does not occur in pattern or was multiply specified!");
- OperandsSet.erase(OpsList->getArgName(j));
- Args.push_back(OpsList->getArgName(j));
+ OperandsSet.erase(ArgNameStr);
+ Args.push_back(ArgNameStr);
}
if (!OperandsSet.empty())
@@ -2542,7 +2544,7 @@
// Clone the DefaultInfo dag node, changing the operator from 'ops' to
// SomeSDnode so that we can parse this.
- std::vector<std::pair<Init*, std::string> > Ops;
+ std::vector<std::pair<Init*, StringInit*> > Ops;
for (unsigned op = 0, e = DefaultInfo->getNumArgs(); op != e; ++op)
Ops.push_back(std::make_pair(DefaultInfo->getArg(op),
DefaultInfo->getArgName(op)));
diff --git a/llvm/utils/TableGen/CodeGenInstruction.cpp b/llvm/utils/TableGen/CodeGenInstruction.cpp
index 6007e1c..bb2ec2a 100644
--- a/llvm/utils/TableGen/CodeGenInstruction.cpp
+++ b/llvm/utils/TableGen/CodeGenInstruction.cpp
@@ -53,13 +53,13 @@
OperandList.reserve(e);
for (unsigned i = 0; i != e; ++i){
Init *ArgInit;
- std::string ArgName;
+ StringRef ArgName;
if (i < NumDefs) {
ArgInit = OutDI->getArg(i);
- ArgName = OutDI->getArgName(i);
+ ArgName = OutDI->getArgNameStr(i);
} else {
ArgInit = InDI->getArg(i-NumDefs);
- ArgName = InDI->getArgName(i-NumDefs);
+ ArgName = InDI->getArgNameStr(i-NumDefs);
}
DefInit *Arg = dyn_cast<DefInit>(ArgInit);
@@ -193,7 +193,7 @@
// Find the operand with the right name.
for (unsigned i = 0, e = MIOpInfo->getNumArgs(); i != e; ++i)
- if (MIOpInfo->getArgName(i) == SubOpName)
+ if (MIOpInfo->getArgNameStr(i) == SubOpName)
return std::make_pair(OpIdx, i);
// Otherwise, didn't find it!
@@ -449,10 +449,10 @@
if (ADI && ADI->getDef() == InstOpRec) {
// If the operand is a record, it must have a name, and the record type
// must match up with the instruction's argument type.
- if (Result->getArgName(AliasOpNo).empty())
+ if (!Result->getArgName(AliasOpNo))
PrintFatalError(Loc, "result argument #" + Twine(AliasOpNo) +
" must have a name!");
- ResOp = ResultOperand(Result->getArgName(AliasOpNo), ResultRecord);
+ ResOp = ResultOperand(Result->getArgNameStr(AliasOpNo), ResultRecord);
return true;
}
@@ -470,7 +470,7 @@
if (!T.getRegisterClass(InstOpRec)
.hasSubClass(&T.getRegisterClass(ADI->getDef())))
return false;
- ResOp = ResultOperand(Result->getArgName(AliasOpNo), ResultRecord);
+ ResOp = ResultOperand(Result->getArgNameStr(AliasOpNo), ResultRecord);
return true;
}
@@ -492,7 +492,7 @@
" is not a member of the " + InstOpRec->getName() +
" register class!");
- if (!Result->getArgName(AliasOpNo).empty())
+ if (Result->getArgName(AliasOpNo))
PrintFatalError(Loc, "result fixed register argument must "
"not have a name!");
@@ -521,7 +521,7 @@
if (hasSubOps || !InstOpRec->isSubClassOf("Operand"))
return false;
// Integer arguments can't have names.
- if (!Result->getArgName(AliasOpNo).empty())
+ if (Result->getArgName(AliasOpNo))
PrintFatalError(Loc, "result argument #" + Twine(AliasOpNo) +
" must not have a name!");
ResOp = ResultOperand(II->getValue());
@@ -552,7 +552,7 @@
// MIOperandInfo perhaps?
if (InstOpRec->getValueInit("Type") != ADI->getDef()->getValueInit("Type"))
return false;
- ResOp = ResultOperand(Result->getArgName(AliasOpNo), ADI->getDef());
+ ResOp = ResultOperand(Result->getArgNameStr(AliasOpNo), ADI->getDef());
return true;
}
@@ -597,14 +597,14 @@
StringMap<Record*> NameClass;
for (unsigned i = 0, e = Result->getNumArgs(); i != e; ++i) {
DefInit *ADI = dyn_cast<DefInit>(Result->getArg(i));
- if (!ADI || Result->getArgName(i).empty())
+ if (!ADI || !Result->getArgName(i))
continue;
// Verify we don't have something like: (someinst GR16:$foo, GR32:$foo)
// $foo can exist multiple times in the result list, but it must have the
// same type.
- Record *&Entry = NameClass[Result->getArgName(i)];
+ Record *&Entry = NameClass[Result->getArgNameStr(i)];
if (Entry && Entry != ADI->getDef())
- PrintFatalError(R->getLoc(), "result value $" + Result->getArgName(i) +
+ PrintFatalError(R->getLoc(), "result value $" + Result->getArgNameStr(i) +
" is both " + Entry->getName() + " and " +
ADI->getDef()->getName() + "!");
Entry = ADI->getDef();
@@ -647,9 +647,9 @@
// Take care to instantiate each of the suboperands with the correct
// nomenclature: $foo.bar
- ResultOperands.emplace_back(Result->getArgName(AliasOpNo).str()
- + "." + MIOI->getArgName(SubOp).str(),
- SubRec);
+ ResultOperands.emplace_back(
+ Result->getArgName(AliasOpNo)->getAsUnquotedString() + "." +
+ MIOI->getArgName(SubOp)->getAsUnquotedString(), SubRec);
ResultInstOperandIndex.push_back(std::make_pair(i, SubOp));
}
++AliasOpNo;
diff --git a/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp b/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
index 010f415..e1aaecc 100644
--- a/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
+++ b/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
@@ -1759,13 +1759,15 @@
// Gather the outputs/inputs of the instruction, so we can find their
// positions in the encoding. This assumes for now that they appear in the
// MCInst in the order that they're listed.
- std::vector<std::pair<Init*, std::string>> InOutOperands;
+ std::vector<std::pair<Init*, StringRef>> InOutOperands;
DagInit *Out = Def.getValueAsDag("OutOperandList");
DagInit *In = Def.getValueAsDag("InOperandList");
for (unsigned i = 0; i < Out->getNumArgs(); ++i)
- InOutOperands.push_back(std::make_pair(Out->getArg(i), Out->getArgName(i)));
+ InOutOperands.push_back(std::make_pair(Out->getArg(i),
+ Out->getArgNameStr(i)));
for (unsigned i = 0; i < In->getNumArgs(); ++i)
- InOutOperands.push_back(std::make_pair(In->getArg(i), In->getArgName(i)));
+ InOutOperands.push_back(std::make_pair(In->getArg(i),
+ In->getArgNameStr(i)));
// Search for tied operands, so that we can correctly instantiate
// operands that are not explicitly represented in the encoding.
diff --git a/llvm/utils/TableGen/PseudoLoweringEmitter.cpp b/llvm/utils/TableGen/PseudoLoweringEmitter.cpp
index 01e41d1..63bdd36 100644
--- a/llvm/utils/TableGen/PseudoLoweringEmitter.cpp
+++ b/llvm/utils/TableGen/PseudoLoweringEmitter.cpp
@@ -177,10 +177,10 @@
if (OperandMap[Insn.Operands[i].MIOperandNo].Kind != OpData::Operand)
continue;
StringMap<unsigned>::iterator SourceOp =
- SourceOperands.find(Dag->getArgName(i));
+ SourceOperands.find(Dag->getArgNameStr(i));
if (SourceOp == SourceOperands.end())
PrintFatalError(Rec->getLoc(),
- "Pseudo output operand '" + Dag->getArgName(i) +
+ "Pseudo output operand '" + Dag->getArgNameStr(i) +
"' has no matching source operand.");
// Map the source operand to the destination operand index for each
// MachineInstr operand.