Mark all these as needing SSE2. Should fix PPC and
maybe even Linux.
llvm-svn: 115291
diff --git a/llvm/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll b/llvm/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll
index 336f17e..01852a6 100644
--- a/llvm/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll
+++ b/llvm/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+mmx | not grep movl
+; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | not grep movl
define <8 x i8> @a(i8 zeroext %x) nounwind {
%r = insertelement <8 x i8> undef, i8 %x, i32 0
diff --git a/llvm/test/CodeGen/X86/fast-isel-bc.ll b/llvm/test/CodeGen/X86/fast-isel-bc.ll
index db84688..4abc3b5 100644
--- a/llvm/test/CodeGen/X86/fast-isel-bc.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-bc.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -regalloc=linearscan -march=x86-64 -mattr=+mmx | FileCheck %s
+; RUN: llc < %s -O0 -regalloc=linearscan -march=x86-64 -mattr=+mmx,+sse2 | FileCheck %s
; PR4684
target datalayout =
diff --git a/llvm/test/CodeGen/X86/mmx-insert-element.ll b/llvm/test/CodeGen/X86/mmx-insert-element.ll
index 9f9bd8d..348dac8 100644
--- a/llvm/test/CodeGen/X86/mmx-insert-element.ll
+++ b/llvm/test/CodeGen/X86/mmx-insert-element.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 -mattr=+mmx,+sse | grep movq
-; RUN: llc < %s -march=x86 -mattr=+mmx,+sse | grep pshufd
+; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep movq
+; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep pshufd
; This is not an MMX operation; promoted to XMM.
define x86_mmx @qux(i32 %A) nounwind {
diff --git a/llvm/test/CodeGen/X86/mmx-punpckhdq.ll b/llvm/test/CodeGen/X86/mmx-punpckhdq.ll
index 4d2aba5..2bd5643 100644
--- a/llvm/test/CodeGen/X86/mmx-punpckhdq.ll
+++ b/llvm/test/CodeGen/X86/mmx-punpckhdq.ll
@@ -1,5 +1,5 @@
-; RRUN: llc < %s -march=x86 -mattr=+mmx | grep pextrd
-; RRUN: llc < %s -march=x86 -mattr=+mmx | grep punpckhdq | count 1
+; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep pextrd
+; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep punpckhdq | count 1
; There are no MMX operations in bork; promoted to XMM.
define void @bork(<1 x i64>* %x) {
diff --git a/llvm/test/CodeGen/X86/mmx-vzmovl-2.ll b/llvm/test/CodeGen/X86/mmx-vzmovl-2.ll
index 4ad420b..a7ce7d9 100644
--- a/llvm/test/CodeGen/X86/mmx-vzmovl-2.ll
+++ b/llvm/test/CodeGen/X86/mmx-vzmovl-2.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep pxor
-; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep punpckldq
+; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | grep pxor
+; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | grep punpckldq
%struct.vS1024 = type { [8 x <4 x i32>] }
%struct.vS512 = type { [4 x <4 x i32>] }
diff --git a/llvm/test/CodeGen/X86/mmx-vzmovl.ll b/llvm/test/CodeGen/X86/mmx-vzmovl.ll
index e8b3426..191e261 100644
--- a/llvm/test/CodeGen/X86/mmx-vzmovl.ll
+++ b/llvm/test/CodeGen/X86/mmx-vzmovl.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep movq | count 2
+; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | grep movq | count 2
; There are no MMX operations here; this is promoted to XMM.
define void @foo(<1 x i64>* %a, <1 x i64>* %b) nounwind {
diff --git a/llvm/test/CodeGen/X86/vec_insert-7.ll b/llvm/test/CodeGen/X86/vec_insert-7.ll
index 4018bed..7cf7cfc 100644
--- a/llvm/test/CodeGen/X86/vec_insert-7.ll
+++ b/llvm/test/CodeGen/X86/vec_insert-7.ll
@@ -1,4 +1,4 @@
-; RRUN: llc < %s -march=x86 -mattr=+mmx,+sse -mtriple=i686-apple-darwin9 -o - | grep pinsrd | count 2
+; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 -mtriple=i686-apple-darwin9 -o - | grep pinsrd | count 2
; MMX insertelement is not available; these are promoted to XMM.
; (Without SSE they are split to two ints, and the code is much better.)