| commit | f9a42ed0a7f67979cdd20391366e2a059c2e14c8 | [log] [tgz] |
|---|---|---|
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | Fri Oct 18 18:26:37 2019 +0000 |
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | Fri Oct 18 18:26:37 2019 +0000 |
| tree | ad19a609b7288c58ae0c10475fca36c72f12959e | |
| parent | 1ac3f80a6a097afd776e925fee4b1176b4383d7f [diff] |
AMDGPU: Relax 32-bit SGPR register class Mostly use SReg_32 instead of SReg_32_XM0 for arbitrary values. This will allow the register coalescer to do a better job eliminating copies to m0. For GlobalISel, as a terrible hack, use SGPR_32 for things that should use SCC until booleans are solved. llvm-svn: 375267