Revert "TargetMachine: Merge TargetMachine and LLVMTargetMachine"
Reverting to investigate layering effects of MCJIT not linking
libCodeGen but using TargetMachine::getNameWithPrefix() breaking the
lldb bots.
This reverts commit r315633.
llvm-svn: 315637
diff --git a/llvm/include/llvm/CodeGen/TargetPassConfig.h b/llvm/include/llvm/CodeGen/TargetPassConfig.h
index 16cbc1e..1aaa85d 100644
--- a/llvm/include/llvm/CodeGen/TargetPassConfig.h
+++ b/llvm/include/llvm/CodeGen/TargetPassConfig.h
@@ -21,10 +21,10 @@
namespace llvm {
+class LLVMTargetMachine;
struct MachineSchedContext;
class PassConfigImpl;
class ScheduleDAGInstrs;
-class TargetMachine;
// The old pass manager infrastructure is hidden in a legacy namespace now.
namespace legacy {
@@ -121,7 +121,7 @@
void setStartStopPasses();
protected:
- TargetMachine *TM;
+ LLVMTargetMachine *TM;
PassConfigImpl *Impl = nullptr; // Internal data structures
bool Initialized = false; // Flagged after all passes are configured.
@@ -141,7 +141,7 @@
bool addCoreISelPasses();
public:
- TargetPassConfig(TargetMachine &TM, PassManagerBase &pm);
+ TargetPassConfig(LLVMTargetMachine &TM, PassManagerBase &pm);
// Dummy constructor.
TargetPassConfig();
@@ -378,6 +378,7 @@
virtual void addFastRegAlloc(FunctionPass *RegAllocPass);
/// addOptimizedRegAlloc - Add passes related to register allocation.
+ /// LLVMTargetMachine provides standard regalloc passes for most targets.
virtual void addOptimizedRegAlloc(FunctionPass *RegAllocPass);
/// addPreRewrite - Add passes to the optimized register allocation pipeline
diff --git a/llvm/include/llvm/MC/MCAsmInfo.h b/llvm/include/llvm/MC/MCAsmInfo.h
index 345dca0..234762f 100644
--- a/llvm/include/llvm/MC/MCAsmInfo.h
+++ b/llvm/include/llvm/MC/MCAsmInfo.h
@@ -353,7 +353,7 @@
/// The integrated assembler should be enabled by default (by the
/// constructors) when failing to parse a valid piece of assembly (inline
/// or otherwise) is considered a bug. It may then be overridden after
- /// construction (see TargetMachine::initAsmInfo()).
+ /// construction (see LLVMTargetMachine::initAsmInfo()).
bool UseIntegratedAssembler;
/// Preserve Comments in assembly
diff --git a/llvm/include/llvm/Target/TargetMachine.h b/llvm/include/llvm/Target/TargetMachine.h
index ee7b36b..5421b22 100644
--- a/llvm/include/llvm/Target/TargetMachine.h
+++ b/llvm/include/llvm/Target/TargetMachine.h
@@ -7,7 +7,7 @@
//
//===----------------------------------------------------------------------===//
//
-/// \file Defines the TargetMachine interface.
+// This file defines the TargetMachine and LLVMTargetMachine classes.
//
//===----------------------------------------------------------------------===//
@@ -49,16 +49,16 @@
using legacy::PassManagerBase;
//===----------------------------------------------------------------------===//
-
+///
/// Primary interface to the complete machine description for the target
/// machine. All target-specific information should be accessible through this
/// interface.
+///
class TargetMachine {
protected: // Can only create subclasses.
TargetMachine(const Target &T, StringRef DataLayoutString,
const Triple &TargetTriple, StringRef CPU, StringRef FS,
- const TargetOptions &Options, Reloc::Model RM,
- CodeModel::Model CM, CodeGenOpt::Level OL);
+ const TargetOptions &Options);
/// The Target that this machine was created for.
const Target &TheTarget;
@@ -91,8 +91,6 @@
unsigned RequireStructuredCFG : 1;
unsigned O0WantsFastISel : 1;
- void initAsmInfo();
-
public:
const TargetOptions DefaultOptions;
mutable TargetOptions Options;
@@ -227,18 +225,23 @@
/// supported, or false on success.
/// \p MMI is an optional parameter that, if set to non-nullptr,
/// will be used to set the MachineModuloInfo for this PM.
- virtual bool addPassesToEmitFile(PassManagerBase &PM, raw_pwrite_stream &Out,
- CodeGenFileType FileType,
- bool DisableVerify = true,
- MachineModuleInfo *MMI = nullptr);
+ virtual bool addPassesToEmitFile(PassManagerBase &, raw_pwrite_stream &,
+ CodeGenFileType,
+ bool /*DisableVerify*/ = true,
+ MachineModuleInfo *MMI = nullptr) {
+ return true;
+ }
/// Add passes to the specified pass manager to get machine code emitted with
/// the MCJIT. This method returns true if machine code is not supported. It
/// fills the MCContext Ctx pointer which can be used to build custom
/// MCStreamer.
- virtual bool addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
- raw_pwrite_stream &OS,
- bool DisableVerify = true);
+ ///
+ virtual bool addPassesToEmitMC(PassManagerBase &, MCContext *&,
+ raw_pwrite_stream &,
+ bool /*DisableVerify*/ = true) {
+ return true;
+ }
/// True if subtarget inserts the final scheduling pass on its own.
///
@@ -262,11 +265,47 @@
virtual bool useIPRA() const {
return false;
}
+};
+
+/// This class describes a target machine that is implemented with the LLVM
+/// target-independent code generator.
+///
+class LLVMTargetMachine : public TargetMachine {
+protected: // Can only create subclasses.
+ LLVMTargetMachine(const Target &T, StringRef DataLayoutString,
+ const Triple &TargetTriple, StringRef CPU, StringRef FS,
+ const TargetOptions &Options, Reloc::Model RM,
+ CodeModel::Model CM, CodeGenOpt::Level OL);
+
+ void initAsmInfo();
+
+public:
+ /// \brief Get a TargetIRAnalysis implementation for the target.
+ ///
+ /// This analysis will produce a TTI result which uses the common code
+ /// generator to answer queries about the IR.
+ TargetIRAnalysis getTargetIRAnalysis() override;
/// Create a pass configuration object to be used by addPassToEmitX methods
/// for generating a pipeline of CodeGen passes.
virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
+ /// Add passes to the specified pass manager to get the specified file
+ /// emitted. Typically this will involve several steps of code generation.
+ /// \p MMI is an optional parameter that, if set to non-nullptr,
+ /// will be used to set the MachineModuloInfofor this PM.
+ bool addPassesToEmitFile(PassManagerBase &PM, raw_pwrite_stream &Out,
+ CodeGenFileType FileType, bool DisableVerify = true,
+ MachineModuleInfo *MMI = nullptr) override;
+
+ /// Add passes to the specified pass manager to get machine code emitted with
+ /// the MCJIT. This method returns true if machine code is not supported. It
+ /// fills the MCContext Ctx pointer which can be used to build custom
+ /// MCStreamer.
+ bool addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
+ raw_pwrite_stream &OS,
+ bool DisableVerify = true) override;
+
/// Returns true if the target is expected to pass all machine verifier
/// checks. This is a stopgap measure to fix targets one by one. We will
/// remove this at some point and always enable the verifier when
diff --git a/llvm/lib/CodeGen/CMakeLists.txt b/llvm/lib/CodeGen/CMakeLists.txt
index f4949a7..7ec7fda 100644
--- a/llvm/lib/CodeGen/CMakeLists.txt
+++ b/llvm/lib/CodeGen/CMakeLists.txt
@@ -53,6 +53,7 @@
LiveRegUnits.cpp
LiveStackAnalysis.cpp
LiveVariables.cpp
+ LLVMTargetMachine.cpp
LocalStackSlotAllocation.cpp
LowLevelType.cpp
LowerEmuTLS.cpp
@@ -141,8 +142,6 @@
TargetInstrInfo.cpp
TargetLoweringBase.cpp
TargetLoweringObjectFileImpl.cpp
- TargetMachine.cpp
- TargetMachineC.cpp
TargetOptionsImpl.cpp
TargetPassConfig.cpp
TargetRegisterInfo.cpp
diff --git a/llvm/lib/CodeGen/LLVMTargetMachine.cpp b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
new file mode 100644
index 0000000..e829409f
--- /dev/null
+++ b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
@@ -0,0 +1,259 @@
+//===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements the LLVMTargetMachine class.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/Analysis/Passes.h"
+#include "llvm/CodeGen/AsmPrinter.h"
+#include "llvm/CodeGen/BasicTTIImpl.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "llvm/CodeGen/Passes.h"
+#include "llvm/CodeGen/TargetPassConfig.h"
+#include "llvm/IR/IRPrintingPasses.h"
+#include "llvm/IR/LegacyPassManager.h"
+#include "llvm/IR/Verifier.h"
+#include "llvm/MC/MCAsmBackend.h"
+#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCCodeEmitter.h"
+#include "llvm/MC/MCContext.h"
+#include "llvm/MC/MCInstrInfo.h"
+#include "llvm/MC/MCStreamer.h"
+#include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/FormattedStream.h"
+#include "llvm/Support/TargetRegistry.h"
+#include "llvm/Target/TargetLoweringObjectFile.h"
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetOptions.h"
+#include "llvm/Transforms/Scalar.h"
+using namespace llvm;
+
+void LLVMTargetMachine::initAsmInfo() {
+ MRI = TheTarget.createMCRegInfo(getTargetTriple().str());
+ MII = TheTarget.createMCInstrInfo();
+ // FIXME: Having an MCSubtargetInfo on the target machine is a hack due
+ // to some backends having subtarget feature dependent module level
+ // code generation. This is similar to the hack in the AsmPrinter for
+ // module level assembly etc.
+ STI = TheTarget.createMCSubtargetInfo(getTargetTriple().str(), getTargetCPU(),
+ getTargetFeatureString());
+
+ MCAsmInfo *TmpAsmInfo =
+ TheTarget.createMCAsmInfo(*MRI, getTargetTriple().str());
+ // TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0,
+ // and if the old one gets included then MCAsmInfo will be NULL and
+ // we'll crash later.
+ // Provide the user with a useful error message about what's wrong.
+ assert(TmpAsmInfo && "MCAsmInfo not initialized. "
+ "Make sure you include the correct TargetSelect.h"
+ "and that InitializeAllTargetMCs() is being invoked!");
+
+ if (Options.DisableIntegratedAS)
+ TmpAsmInfo->setUseIntegratedAssembler(false);
+
+ TmpAsmInfo->setPreserveAsmComments(Options.MCOptions.PreserveAsmComments);
+
+ TmpAsmInfo->setCompressDebugSections(Options.CompressDebugSections);
+
+ TmpAsmInfo->setRelaxELFRelocations(Options.RelaxELFRelocations);
+
+ if (Options.ExceptionModel != ExceptionHandling::None)
+ TmpAsmInfo->setExceptionsType(Options.ExceptionModel);
+
+ AsmInfo = TmpAsmInfo;
+}
+
+LLVMTargetMachine::LLVMTargetMachine(const Target &T,
+ StringRef DataLayoutString,
+ const Triple &TT, StringRef CPU,
+ StringRef FS, const TargetOptions &Options,
+ Reloc::Model RM, CodeModel::Model CM,
+ CodeGenOpt::Level OL)
+ : TargetMachine(T, DataLayoutString, TT, CPU, FS, Options) {
+ this->RM = RM;
+ this->CMModel = CM;
+ this->OptLevel = OL;
+}
+
+TargetIRAnalysis LLVMTargetMachine::getTargetIRAnalysis() {
+ return TargetIRAnalysis([this](const Function &F) {
+ return TargetTransformInfo(BasicTTIImpl(this, F));
+ });
+}
+
+/// addPassesToX helper drives creation and initialization of TargetPassConfig.
+static MCContext *
+addPassesToGenerateCode(LLVMTargetMachine *TM, PassManagerBase &PM,
+ bool DisableVerify, bool &WillCompleteCodeGenPipeline,
+ raw_pwrite_stream &Out, MachineModuleInfo *MMI) {
+ // Targets may override createPassConfig to provide a target-specific
+ // subclass.
+ TargetPassConfig *PassConfig = TM->createPassConfig(PM);
+ // Set PassConfig options provided by TargetMachine.
+ PassConfig->setDisableVerify(DisableVerify);
+ WillCompleteCodeGenPipeline = PassConfig->willCompleteCodeGenPipeline();
+ PM.add(PassConfig);
+ if (!MMI)
+ MMI = new MachineModuleInfo(TM);
+ PM.add(MMI);
+
+ if (PassConfig->addISelPasses())
+ return nullptr;
+ PassConfig->addMachinePasses();
+ PassConfig->setInitialized();
+ if (!WillCompleteCodeGenPipeline)
+ PM.add(createPrintMIRPass(Out));
+
+ return &MMI->getContext();
+}
+
+bool LLVMTargetMachine::addAsmPrinter(PassManagerBase &PM,
+ raw_pwrite_stream &Out, CodeGenFileType FileType,
+ MCContext &Context) {
+ if (Options.MCOptions.MCSaveTempLabels)
+ Context.setAllowTemporaryLabels(false);
+
+ const MCSubtargetInfo &STI = *getMCSubtargetInfo();
+ const MCAsmInfo &MAI = *getMCAsmInfo();
+ const MCRegisterInfo &MRI = *getMCRegisterInfo();
+ const MCInstrInfo &MII = *getMCInstrInfo();
+
+ std::unique_ptr<MCStreamer> AsmStreamer;
+
+ switch (FileType) {
+ case CGFT_AssemblyFile: {
+ MCInstPrinter *InstPrinter = getTarget().createMCInstPrinter(
+ getTargetTriple(), MAI.getAssemblerDialect(), MAI, MII, MRI);
+
+ // Create a code emitter if asked to show the encoding.
+ MCCodeEmitter *MCE = nullptr;
+ if (Options.MCOptions.ShowMCEncoding)
+ MCE = getTarget().createMCCodeEmitter(MII, MRI, Context);
+
+ MCAsmBackend *MAB =
+ getTarget().createMCAsmBackend(MRI, getTargetTriple().str(), TargetCPU,
+ Options.MCOptions);
+ auto FOut = llvm::make_unique<formatted_raw_ostream>(Out);
+ MCStreamer *S = getTarget().createAsmStreamer(
+ Context, std::move(FOut), Options.MCOptions.AsmVerbose,
+ Options.MCOptions.MCUseDwarfDirectory, InstPrinter, MCE, MAB,
+ Options.MCOptions.ShowMCInst);
+ AsmStreamer.reset(S);
+ break;
+ }
+ case CGFT_ObjectFile: {
+ // Create the code emitter for the target if it exists. If not, .o file
+ // emission fails.
+ MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(MII, MRI, Context);
+ MCAsmBackend *MAB =
+ getTarget().createMCAsmBackend(MRI, getTargetTriple().str(), TargetCPU,
+ Options.MCOptions);
+ if (!MCE || !MAB)
+ return true;
+
+ // Don't waste memory on names of temp labels.
+ Context.setUseNamesOnTempLabels(false);
+
+ Triple T(getTargetTriple().str());
+ AsmStreamer.reset(getTarget().createMCObjectStreamer(
+ T, Context, std::unique_ptr<MCAsmBackend>(MAB), Out,
+ std::unique_ptr<MCCodeEmitter>(MCE), STI, Options.MCOptions.MCRelaxAll,
+ Options.MCOptions.MCIncrementalLinkerCompatible,
+ /*DWARFMustBeAtTheEnd*/ true));
+ break;
+ }
+ case CGFT_Null:
+ // The Null output is intended for use for performance analysis and testing,
+ // not real users.
+ AsmStreamer.reset(getTarget().createNullStreamer(Context));
+ break;
+ }
+
+ // Create the AsmPrinter, which takes ownership of AsmStreamer if successful.
+ FunctionPass *Printer =
+ getTarget().createAsmPrinter(*this, std::move(AsmStreamer));
+ if (!Printer)
+ return true;
+
+ PM.add(Printer);
+ return false;
+}
+
+bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
+ raw_pwrite_stream &Out,
+ CodeGenFileType FileType,
+ bool DisableVerify,
+ MachineModuleInfo *MMI) {
+ // Add common CodeGen passes.
+ bool WillCompleteCodeGenPipeline = true;
+ MCContext *Context = addPassesToGenerateCode(
+ this, PM, DisableVerify, WillCompleteCodeGenPipeline, Out, MMI);
+ if (!Context)
+ return true;
+
+ if (WillCompleteCodeGenPipeline && addAsmPrinter(PM, Out, FileType, *Context))
+ return true;
+
+ PM.add(createFreeMachineFunctionPass());
+ return false;
+}
+
+/// addPassesToEmitMC - Add passes to the specified pass manager to get
+/// machine code emitted with the MCJIT. This method returns true if machine
+/// code is not supported. It fills the MCContext Ctx pointer which can be
+/// used to build custom MCStreamer.
+///
+bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
+ raw_pwrite_stream &Out,
+ bool DisableVerify) {
+ // Add common CodeGen passes.
+ bool WillCompleteCodeGenPipeline = true;
+ Ctx = addPassesToGenerateCode(this, PM, DisableVerify,
+ WillCompleteCodeGenPipeline, Out,
+ /*MachineModuleInfo*/ nullptr);
+ if (!Ctx)
+ return true;
+ assert(WillCompleteCodeGenPipeline && "CodeGen pipeline has been altered");
+
+ if (Options.MCOptions.MCSaveTempLabels)
+ Ctx->setAllowTemporaryLabels(false);
+
+ // Create the code emitter for the target if it exists. If not, .o file
+ // emission fails.
+ const MCRegisterInfo &MRI = *getMCRegisterInfo();
+ MCCodeEmitter *MCE =
+ getTarget().createMCCodeEmitter(*getMCInstrInfo(), MRI, *Ctx);
+ MCAsmBackend *MAB =
+ getTarget().createMCAsmBackend(MRI, getTargetTriple().str(), TargetCPU,
+ Options.MCOptions);
+ if (!MCE || !MAB)
+ return true;
+
+ const Triple &T = getTargetTriple();
+ const MCSubtargetInfo &STI = *getMCSubtargetInfo();
+ std::unique_ptr<MCStreamer> AsmStreamer(getTarget().createMCObjectStreamer(
+ T, *Ctx, std::unique_ptr<MCAsmBackend>(MAB), Out,
+ std::unique_ptr<MCCodeEmitter>(MCE), STI, Options.MCOptions.MCRelaxAll,
+ Options.MCOptions.MCIncrementalLinkerCompatible,
+ /*DWARFMustBeAtTheEnd*/ true));
+
+ // Create the AsmPrinter, which takes ownership of AsmStreamer if successful.
+ FunctionPass *Printer =
+ getTarget().createAsmPrinter(*this, std::move(AsmStreamer));
+ if (!Printer)
+ return true;
+
+ PM.add(Printer);
+ PM.add(createFreeMachineFunctionPass());
+
+ return false; // success!
+}
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index 3cfc800..0bd5c56 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -17,8 +17,10 @@
// Register live intervals: Registers must be defined only once, and must be
// defined before use.
//
-// The machine code verifier is enabled with the command-line option
-// -verify-machineinstrs.
+// The machine code verifier is enabled from LLVMTargetMachine.cpp with the
+// command-line option -verify-machineinstrs, or by defining the environment
+// variable LLVM_VERIFY_MACHINEINSTRS to the name of a file that will receive
+// the verifier errors.
//===----------------------------------------------------------------------===//
#include "llvm/ADT/BitVector.h"
diff --git a/llvm/lib/CodeGen/TargetMachine.cpp b/llvm/lib/CodeGen/TargetMachine.cpp
deleted file mode 100644
index e789273..0000000
--- a/llvm/lib/CodeGen/TargetMachine.cpp
+++ /dev/null
@@ -1,420 +0,0 @@
-//===-- TargetMachine.cpp - Implement the TargetMachine class -------------===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-/// \file Implements the TargetMachine class.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/Target/TargetMachine.h"
-
-#include "llvm/Analysis/Passes.h"
-#include "llvm/CodeGen/AsmPrinter.h"
-#include "llvm/CodeGen/BasicTTIImpl.h"
-#include "llvm/CodeGen/MachineModuleInfo.h"
-#include "llvm/CodeGen/Passes.h"
-#include "llvm/CodeGen/TargetPassConfig.h"
-#include "llvm/IR/IRPrintingPasses.h"
-#include "llvm/IR/LegacyPassManager.h"
-#include "llvm/IR/Mangler.h"
-#include "llvm/IR/Verifier.h"
-#include "llvm/MC/MCAsmBackend.h"
-#include "llvm/MC/MCAsmInfo.h"
-#include "llvm/MC/MCCodeEmitter.h"
-#include "llvm/MC/MCContext.h"
-#include "llvm/MC/MCInstrInfo.h"
-#include "llvm/MC/MCStreamer.h"
-#include "llvm/MC/MCSubtargetInfo.h"
-#include "llvm/Support/CommandLine.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/FormattedStream.h"
-#include "llvm/Support/TargetRegistry.h"
-#include "llvm/Target/TargetLoweringObjectFile.h"
-#include "llvm/Target/TargetOptions.h"
-#include "llvm/Transforms/Scalar.h"
-using namespace llvm;
-
-TargetMachine::TargetMachine(const Target &T, StringRef DataLayoutString,
- const Triple &TT, StringRef CPU, StringRef FS,
- const TargetOptions &Options, Reloc::Model RM,
- CodeModel::Model CM, CodeGenOpt::Level OL)
- : TheTarget(T), DL(DataLayoutString), TargetTriple(TT), TargetCPU(CPU),
- TargetFS(FS), RM(RM), CMModel(CM), OptLevel(OL), AsmInfo(nullptr),
- MRI(nullptr), MII(nullptr), STI(nullptr), RequireStructuredCFG(false),
- DefaultOptions(Options), Options(Options) {
-}
-
-TargetMachine::~TargetMachine() {
- delete AsmInfo;
- delete MRI;
- delete MII;
- delete STI;
-}
-
-bool TargetMachine::isPositionIndependent() const {
- return getRelocationModel() == Reloc::PIC_;
-}
-
-// FIXME: This function needs to go away for a number of reasons:
-// a) global state on the TargetMachine is terrible in general,
-// b) these target options should be passed only on the function
-// and not on the TargetMachine (via TargetOptions) at all.
-void TargetMachine::resetTargetOptions(const Function &F) const {
-#define RESET_OPTION(X, Y) \
- do { \
- if (F.hasFnAttribute(Y)) \
- Options.X = (F.getFnAttribute(Y).getValueAsString() == "true"); \
- else \
- Options.X = DefaultOptions.X; \
- } while (0)
-
- RESET_OPTION(UnsafeFPMath, "unsafe-fp-math");
- RESET_OPTION(NoInfsFPMath, "no-infs-fp-math");
- RESET_OPTION(NoNaNsFPMath, "no-nans-fp-math");
- RESET_OPTION(NoSignedZerosFPMath, "no-signed-zeros-fp-math");
- RESET_OPTION(NoTrappingFPMath, "no-trapping-math");
-
- StringRef Denormal =
- F.getFnAttribute("denormal-fp-math").getValueAsString();
- if (Denormal == "ieee")
- Options.FPDenormalMode = FPDenormal::IEEE;
- else if (Denormal == "preserve-sign")
- Options.FPDenormalMode = FPDenormal::PreserveSign;
- else if (Denormal == "positive-zero")
- Options.FPDenormalMode = FPDenormal::PositiveZero;
- else
- Options.FPDenormalMode = DefaultOptions.FPDenormalMode;
-}
-
-Reloc::Model TargetMachine::getRelocationModel() const { return RM; }
-
-CodeModel::Model TargetMachine::getCodeModel() const { return CMModel; }
-
-/// Get the IR-specified TLS model for Var.
-static TLSModel::Model getSelectedTLSModel(const GlobalValue *GV) {
- switch (GV->getThreadLocalMode()) {
- case GlobalVariable::NotThreadLocal:
- llvm_unreachable("getSelectedTLSModel for non-TLS variable");
- break;
- case GlobalVariable::GeneralDynamicTLSModel:
- return TLSModel::GeneralDynamic;
- case GlobalVariable::LocalDynamicTLSModel:
- return TLSModel::LocalDynamic;
- case GlobalVariable::InitialExecTLSModel:
- return TLSModel::InitialExec;
- case GlobalVariable::LocalExecTLSModel:
- return TLSModel::LocalExec;
- }
- llvm_unreachable("invalid TLS model");
-}
-
-bool TargetMachine::shouldAssumeDSOLocal(const Module &M,
- const GlobalValue *GV) const {
- Reloc::Model RM = getRelocationModel();
- const Triple &TT = getTargetTriple();
-
- // DLLImport explicitly marks the GV as external.
- if (GV && GV->hasDLLImportStorageClass())
- return false;
-
- // Every other GV is local on COFF.
- // Make an exception for windows OS in the triple: Some firmwares builds use
- // *-win32-macho triples. This (accidentally?) produced windows relocations
- // without GOT tables in older clang versions; Keep this behaviour.
- if (TT.isOSBinFormatCOFF() || (TT.isOSWindows() && TT.isOSBinFormatMachO()))
- return true;
-
- if (GV && (GV->hasLocalLinkage() || !GV->hasDefaultVisibility()))
- return true;
-
- if (TT.isOSBinFormatMachO()) {
- if (RM == Reloc::Static)
- return true;
- return GV && GV->isStrongDefinitionForLinker();
- }
-
- assert(TT.isOSBinFormatELF());
- assert(RM != Reloc::DynamicNoPIC);
-
- bool IsExecutable =
- RM == Reloc::Static || M.getPIELevel() != PIELevel::Default;
- if (IsExecutable) {
- // If the symbol is defined, it cannot be preempted.
- if (GV && !GV->isDeclarationForLinker())
- return true;
-
- bool IsTLS = GV && GV->isThreadLocal();
- bool IsAccessViaCopyRelocs = Options.MCOptions.MCPIECopyRelocations && GV &&
- isa<GlobalVariable>(GV) &&
- !GV->hasExternalWeakLinkage();
- Triple::ArchType Arch = TT.getArch();
- bool IsPPC =
- Arch == Triple::ppc || Arch == Triple::ppc64 || Arch == Triple::ppc64le;
- // Check if we can use copy relocations. PowerPC has no copy relocations.
- if (!IsTLS && !IsPPC && (RM == Reloc::Static || IsAccessViaCopyRelocs))
- return true;
- }
-
- // ELF supports preemption of other symbols.
- return false;
-}
-
-TLSModel::Model TargetMachine::getTLSModel(const GlobalValue *GV) const {
- bool IsPIE = GV->getParent()->getPIELevel() != PIELevel::Default;
- Reloc::Model RM = getRelocationModel();
- bool IsSharedLibrary = RM == Reloc::PIC_ && !IsPIE;
- bool IsLocal = shouldAssumeDSOLocal(*GV->getParent(), GV);
-
- TLSModel::Model Model;
- if (IsSharedLibrary) {
- if (IsLocal)
- Model = TLSModel::LocalDynamic;
- else
- Model = TLSModel::GeneralDynamic;
- } else {
- if (IsLocal)
- Model = TLSModel::LocalExec;
- else
- Model = TLSModel::InitialExec;
- }
-
- // If the user specified a more specific model, use that.
- TLSModel::Model SelectedModel = getSelectedTLSModel(GV);
- if (SelectedModel > Model)
- return SelectedModel;
-
- return Model;
-}
-
-CodeGenOpt::Level TargetMachine::getOptLevel() const { return OptLevel; }
-
-void TargetMachine::setOptLevel(CodeGenOpt::Level Level) { OptLevel = Level; }
-
-void TargetMachine::getNameWithPrefix(SmallVectorImpl<char> &Name,
- const GlobalValue *GV, Mangler &Mang,
- bool MayAlwaysUsePrivate) const {
- if (MayAlwaysUsePrivate || !GV->hasPrivateLinkage()) {
- // Simple case: If GV is not private, it is not important to find out if
- // private labels are legal in this case or not.
- Mang.getNameWithPrefix(Name, GV, false);
- return;
- }
- const TargetLoweringObjectFile *TLOF = getObjFileLowering();
- TLOF->getNameWithPrefix(Name, GV, *this);
-}
-
-MCSymbol *TargetMachine::getSymbol(const GlobalValue *GV) const {
- const TargetLoweringObjectFile *TLOF = getObjFileLowering();
- SmallString<128> NameStr;
- getNameWithPrefix(NameStr, GV, TLOF->getMangler());
- return TLOF->getContext().getOrCreateSymbol(NameStr);
-}
-
-void TargetMachine::initAsmInfo() {
- MRI = TheTarget.createMCRegInfo(getTargetTriple().str());
- MII = TheTarget.createMCInstrInfo();
- // FIXME: Having an MCSubtargetInfo on the target machine is a hack due
- // to some backends having subtarget feature dependent module level
- // code generation. This is similar to the hack in the AsmPrinter for
- // module level assembly etc.
- STI = TheTarget.createMCSubtargetInfo(getTargetTriple().str(), getTargetCPU(),
- getTargetFeatureString());
-
- MCAsmInfo *TmpAsmInfo =
- TheTarget.createMCAsmInfo(*MRI, getTargetTriple().str());
- // TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0,
- // and if the old one gets included then MCAsmInfo will be NULL and
- // we'll crash later.
- // Provide the user with a useful error message about what's wrong.
- assert(TmpAsmInfo && "MCAsmInfo not initialized. "
- "Make sure you include the correct TargetSelect.h"
- "and that InitializeAllTargetMCs() is being invoked!");
-
- if (Options.DisableIntegratedAS)
- TmpAsmInfo->setUseIntegratedAssembler(false);
-
- TmpAsmInfo->setPreserveAsmComments(Options.MCOptions.PreserveAsmComments);
-
- TmpAsmInfo->setCompressDebugSections(Options.CompressDebugSections);
-
- TmpAsmInfo->setRelaxELFRelocations(Options.RelaxELFRelocations);
-
- if (Options.ExceptionModel != ExceptionHandling::None)
- TmpAsmInfo->setExceptionsType(Options.ExceptionModel);
-
- AsmInfo = TmpAsmInfo;
-}
-
-TargetIRAnalysis TargetMachine::getTargetIRAnalysis() {
- return TargetIRAnalysis([this](const Function &F) {
- return TargetTransformInfo(BasicTTIImpl(this, F));
- });
-}
-
-/// addPassesToX helper drives creation and initialization of TargetPassConfig.
-static MCContext *
-addPassesToGenerateCode(TargetMachine *TM, PassManagerBase &PM,
- bool DisableVerify, bool &WillCompleteCodeGenPipeline,
- raw_pwrite_stream &Out, MachineModuleInfo *MMI) {
- // Targets may override createPassConfig to provide a target-specific
- // subclass.
- TargetPassConfig *PassConfig = TM->createPassConfig(PM);
- // Set PassConfig options provided by TargetMachine.
- PassConfig->setDisableVerify(DisableVerify);
- WillCompleteCodeGenPipeline = PassConfig->willCompleteCodeGenPipeline();
- PM.add(PassConfig);
- if (!MMI)
- MMI = new MachineModuleInfo(TM);
- PM.add(MMI);
-
- if (PassConfig->addISelPasses())
- return nullptr;
- PassConfig->addMachinePasses();
- PassConfig->setInitialized();
- if (!WillCompleteCodeGenPipeline)
- PM.add(createPrintMIRPass(Out));
-
- return &MMI->getContext();
-}
-
-bool TargetMachine::addAsmPrinter(PassManagerBase &PM,
- raw_pwrite_stream &Out, CodeGenFileType FileType,
- MCContext &Context) {
- if (Options.MCOptions.MCSaveTempLabels)
- Context.setAllowTemporaryLabels(false);
-
- const MCSubtargetInfo &STI = *getMCSubtargetInfo();
- const MCAsmInfo &MAI = *getMCAsmInfo();
- const MCRegisterInfo &MRI = *getMCRegisterInfo();
- const MCInstrInfo &MII = *getMCInstrInfo();
-
- std::unique_ptr<MCStreamer> AsmStreamer;
-
- switch (FileType) {
- case CGFT_AssemblyFile: {
- MCInstPrinter *InstPrinter = getTarget().createMCInstPrinter(
- getTargetTriple(), MAI.getAssemblerDialect(), MAI, MII, MRI);
-
- // Create a code emitter if asked to show the encoding.
- MCCodeEmitter *MCE = nullptr;
- if (Options.MCOptions.ShowMCEncoding)
- MCE = getTarget().createMCCodeEmitter(MII, MRI, Context);
-
- MCAsmBackend *MAB =
- getTarget().createMCAsmBackend(MRI, getTargetTriple().str(), TargetCPU,
- Options.MCOptions);
- auto FOut = llvm::make_unique<formatted_raw_ostream>(Out);
- MCStreamer *S = getTarget().createAsmStreamer(
- Context, std::move(FOut), Options.MCOptions.AsmVerbose,
- Options.MCOptions.MCUseDwarfDirectory, InstPrinter, MCE, MAB,
- Options.MCOptions.ShowMCInst);
- AsmStreamer.reset(S);
- break;
- }
- case CGFT_ObjectFile: {
- // Create the code emitter for the target if it exists. If not, .o file
- // emission fails.
- MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(MII, MRI, Context);
- MCAsmBackend *MAB =
- getTarget().createMCAsmBackend(MRI, getTargetTriple().str(), TargetCPU,
- Options.MCOptions);
- if (!MCE || !MAB)
- return true;
-
- // Don't waste memory on names of temp labels.
- Context.setUseNamesOnTempLabels(false);
-
- Triple T(getTargetTriple().str());
- AsmStreamer.reset(getTarget().createMCObjectStreamer(
- T, Context, std::unique_ptr<MCAsmBackend>(MAB), Out,
- std::unique_ptr<MCCodeEmitter>(MCE), STI, Options.MCOptions.MCRelaxAll,
- Options.MCOptions.MCIncrementalLinkerCompatible,
- /*DWARFMustBeAtTheEnd*/ true));
- break;
- }
- case CGFT_Null:
- // The Null output is intended for use for performance analysis and testing,
- // not real users.
- AsmStreamer.reset(getTarget().createNullStreamer(Context));
- break;
- }
-
- // Create the AsmPrinter, which takes ownership of AsmStreamer if successful.
- FunctionPass *Printer =
- getTarget().createAsmPrinter(*this, std::move(AsmStreamer));
- if (!Printer)
- return true;
-
- PM.add(Printer);
- return false;
-}
-
-bool TargetMachine::addPassesToEmitFile(PassManagerBase &PM,
- raw_pwrite_stream &Out,
- CodeGenFileType FileType,
- bool DisableVerify,
- MachineModuleInfo *MMI) {
- // Add common CodeGen passes.
- bool WillCompleteCodeGenPipeline = true;
- MCContext *Context = addPassesToGenerateCode(
- this, PM, DisableVerify, WillCompleteCodeGenPipeline, Out, MMI);
- if (!Context)
- return true;
-
- if (WillCompleteCodeGenPipeline && addAsmPrinter(PM, Out, FileType, *Context))
- return true;
-
- PM.add(createFreeMachineFunctionPass());
- return false;
-}
-
-bool TargetMachine::addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
- raw_pwrite_stream &Out,
- bool DisableVerify) {
- // Add common CodeGen passes.
- bool WillCompleteCodeGenPipeline = true;
- Ctx = addPassesToGenerateCode(this, PM, DisableVerify,
- WillCompleteCodeGenPipeline, Out,
- /*MachineModuleInfo*/ nullptr);
- if (!Ctx)
- return true;
- assert(WillCompleteCodeGenPipeline && "CodeGen pipeline has been altered");
-
- if (Options.MCOptions.MCSaveTempLabels)
- Ctx->setAllowTemporaryLabels(false);
-
- // Create the code emitter for the target if it exists. If not, .o file
- // emission fails.
- const MCRegisterInfo &MRI = *getMCRegisterInfo();
- MCCodeEmitter *MCE =
- getTarget().createMCCodeEmitter(*getMCInstrInfo(), MRI, *Ctx);
- MCAsmBackend *MAB =
- getTarget().createMCAsmBackend(MRI, getTargetTriple().str(), TargetCPU,
- Options.MCOptions);
- if (!MCE || !MAB)
- return true;
-
- const Triple &T = getTargetTriple();
- const MCSubtargetInfo &STI = *getMCSubtargetInfo();
- std::unique_ptr<MCStreamer> AsmStreamer(getTarget().createMCObjectStreamer(
- T, *Ctx, std::unique_ptr<MCAsmBackend>(MAB), Out,
- std::unique_ptr<MCCodeEmitter>(MCE), STI, Options.MCOptions.MCRelaxAll,
- Options.MCOptions.MCIncrementalLinkerCompatible,
- /*DWARFMustBeAtTheEnd*/ true));
-
- // Create the AsmPrinter, which takes ownership of AsmStreamer if successful.
- FunctionPass *Printer =
- getTarget().createAsmPrinter(*this, std::move(AsmStreamer));
- if (!Printer)
- return true;
-
- PM.add(Printer);
- PM.add(createFreeMachineFunctionPass());
-
- return false; // success!
-}
diff --git a/llvm/lib/CodeGen/TargetPassConfig.cpp b/llvm/lib/CodeGen/TargetPassConfig.cpp
index 0f6d152..c5101b1 100644
--- a/llvm/lib/CodeGen/TargetPassConfig.cpp
+++ b/llvm/lib/CodeGen/TargetPassConfig.cpp
@@ -355,7 +355,7 @@
// Out of line constructor provides default values for pass options and
// registers all common codegen passes.
-TargetPassConfig::TargetPassConfig(TargetMachine &TM, PassManagerBase &pm)
+TargetPassConfig::TargetPassConfig(LLVMTargetMachine &TM, PassManagerBase &pm)
: ImmutablePass(ID), PM(&pm), TM(&TM) {
Impl = new PassConfigImpl();
@@ -408,7 +408,7 @@
/// addPassToEmitX methods for generating a pipeline of CodeGen passes.
///
/// Targets may override this to extend TargetPassConfig.
-TargetPassConfig *TargetMachine::createPassConfig(PassManagerBase &PM) {
+TargetPassConfig *LLVMTargetMachine::createPassConfig(PassManagerBase &PM) {
return new TargetPassConfig(*this, PM);
}
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
index 882065e..1762475 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -237,9 +237,10 @@
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT,
bool LittleEndian)
- : TargetMachine(T, computeDataLayout(TT, Options.MCOptions, LittleEndian),
- TT, CPU, FS, Options, getEffectiveRelocModel(TT, RM),
- getEffectiveCodeModel(TT, CM, JIT), OL),
+ : LLVMTargetMachine(T,
+ computeDataLayout(TT, Options.MCOptions, LittleEndian),
+ TT, CPU, FS, Options, getEffectiveRelocModel(TT, RM),
+ getEffectiveCodeModel(TT, CM, JIT), OL),
TLOF(createTLOF(getTargetTriple())), isLittle(LittleEndian) {
initAsmInfo();
}
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.h b/llvm/lib/Target/AArch64/AArch64TargetMachine.h
index fb41e3c..2bbfb2d 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.h
+++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.h
@@ -23,7 +23,7 @@
class AArch64RegisterBankInfo;
-class AArch64TargetMachine : public TargetMachine {
+class AArch64TargetMachine : public LLVMTargetMachine {
protected:
std::unique_ptr<TargetLoweringObjectFile> TLOF;
mutable StringMap<std::unique_ptr<AArch64Subtarget>> SubtargetMap;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index 54d43d4..f20dba8 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -290,9 +290,9 @@
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OptLevel)
- : TargetMachine(T, computeDataLayout(TT), TT, getGPUOrDefault(TT, CPU),
- FS, Options, getEffectiveRelocModel(RM),
- getEffectiveCodeModel(CM), OptLevel),
+ : LLVMTargetMachine(T, computeDataLayout(TT), TT, getGPUOrDefault(TT, CPU),
+ FS, Options, getEffectiveRelocModel(RM),
+ getEffectiveCodeModel(CM), OptLevel),
TLOF(createTLOF(getTargetTriple())) {
AS = AMDGPU::getAMDGPUAS(TT);
initAsmInfo();
@@ -471,7 +471,7 @@
class AMDGPUPassConfig : public TargetPassConfig {
public:
- AMDGPUPassConfig(TargetMachine &TM, PassManagerBase &PM)
+ AMDGPUPassConfig(LLVMTargetMachine &TM, PassManagerBase &PM)
: TargetPassConfig(TM, PM) {
// Exceptions and StackMaps are not supported, so these passes will never do
// anything.
@@ -502,7 +502,7 @@
class R600PassConfig final : public AMDGPUPassConfig {
public:
- R600PassConfig(TargetMachine &TM, PassManagerBase &PM)
+ R600PassConfig(LLVMTargetMachine &TM, PassManagerBase &PM)
: AMDGPUPassConfig(TM, PM) {}
ScheduleDAGInstrs *createMachineScheduler(
@@ -519,7 +519,7 @@
class GCNPassConfig final : public AMDGPUPassConfig {
public:
- GCNPassConfig(TargetMachine &TM, PassManagerBase &PM)
+ GCNPassConfig(LLVMTargetMachine &TM, PassManagerBase &PM)
: AMDGPUPassConfig(TM, PM) {
// It is necessary to know the register usage of the entire call graph. We
// allow calls without EnableAMDGPUFunctionCalls if they are marked
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
index 770c097..34114bf 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
@@ -31,7 +31,7 @@
// AMDGPU Target Machine (R600+)
//===----------------------------------------------------------------------===//
-class AMDGPUTargetMachine : public TargetMachine {
+class AMDGPUTargetMachine : public LLVMTargetMachine {
protected:
std::unique_ptr<TargetLoweringObjectFile> TLOF;
AMDGPUIntrinsicInfo IntrinsicInfo;
diff --git a/llvm/lib/Target/ARC/ARCTargetMachine.cpp b/llvm/lib/Target/ARC/ARCTargetMachine.cpp
index 65f3ce0..d2512c2 100644
--- a/llvm/lib/Target/ARC/ARCTargetMachine.cpp
+++ b/llvm/lib/Target/ARC/ARCTargetMachine.cpp
@@ -39,10 +39,11 @@
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
- : TargetMachine(T, "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
- "f32:32:32-i64:32-f64:32-a:0:32-n32",
- TT, CPU, FS, Options, getRelocModel(RM),
- getEffectiveCodeModel(CM), OL),
+ : LLVMTargetMachine(T,
+ "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
+ "f32:32:32-i64:32-f64:32-a:0:32-n32",
+ TT, CPU, FS, Options, getRelocModel(RM),
+ getEffectiveCodeModel(CM), OL),
TLOF(make_unique<TargetLoweringObjectFileELF>()),
Subtarget(TT, CPU, FS, *this) {
initAsmInfo();
diff --git a/llvm/lib/Target/ARC/ARCTargetMachine.h b/llvm/lib/Target/ARC/ARCTargetMachine.h
index df911b5..98021b3 100644
--- a/llvm/lib/Target/ARC/ARCTargetMachine.h
+++ b/llvm/lib/Target/ARC/ARCTargetMachine.h
@@ -21,7 +21,7 @@
class TargetPassConfig;
-class ARCTargetMachine : public TargetMachine {
+class ARCTargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
ARCSubtarget Subtarget;
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index bc8f299..9a191e4 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -205,9 +205,9 @@
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool isLittle)
- : TargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
- CPU, FS, Options, getEffectiveRelocModel(TT, RM),
- getEffectiveCodeModel(CM), OL),
+ : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
+ CPU, FS, Options, getEffectiveRelocModel(TT, RM),
+ getEffectiveCodeModel(CM), OL),
TargetABI(computeTargetABI(TT, CPU, Options)),
TLOF(createTLOF(getTargetTriple())), isLittle(isLittle) {
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.h b/llvm/lib/Target/ARM/ARMTargetMachine.h
index dcd4f68..655ec32 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.h
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.h
@@ -25,7 +25,7 @@
namespace llvm {
-class ARMBaseTargetMachine : public TargetMachine {
+class ARMBaseTargetMachine : public LLVMTargetMachine {
public:
enum ARMABI {
ARM_ABI_UNKNOWN,
diff --git a/llvm/lib/Target/AVR/AVRTargetMachine.cpp b/llvm/lib/Target/AVR/AVRTargetMachine.cpp
index 1fbabe0..f9a738b 100644
--- a/llvm/lib/Target/AVR/AVRTargetMachine.cpp
+++ b/llvm/lib/Target/AVR/AVRTargetMachine.cpp
@@ -52,8 +52,9 @@
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
- : TargetMachine(T, AVRDataLayout, TT, getCPU(CPU), FS, Options,
- getEffectiveRelocModel(RM), getEffectiveCodeModel(CM), OL),
+ : LLVMTargetMachine(T, AVRDataLayout, TT, getCPU(CPU), FS, Options,
+ getEffectiveRelocModel(RM), getEffectiveCodeModel(CM),
+ OL),
SubTarget(TT, getCPU(CPU), FS, *this) {
this->TLOF = make_unique<AVRTargetObjectFile>();
initAsmInfo();
diff --git a/llvm/lib/Target/AVR/AVRTargetMachine.h b/llvm/lib/Target/AVR/AVRTargetMachine.h
index 123ee31..ffcf435 100644
--- a/llvm/lib/Target/AVR/AVRTargetMachine.h
+++ b/llvm/lib/Target/AVR/AVRTargetMachine.h
@@ -26,11 +26,12 @@
namespace llvm {
/// A generic AVR implementation.
-class AVRTargetMachine : public TargetMachine {
+class AVRTargetMachine : public LLVMTargetMachine {
public:
AVRTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
- Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
+ Optional<Reloc::Model> RM,
+ Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
const AVRSubtarget *getSubtargetImpl() const;
diff --git a/llvm/lib/Target/BPF/BPFTargetMachine.cpp b/llvm/lib/Target/BPF/BPFTargetMachine.cpp
index 7a189bb..60672fa 100644
--- a/llvm/lib/Target/BPF/BPFTargetMachine.cpp
+++ b/llvm/lib/Target/BPF/BPFTargetMachine.cpp
@@ -55,8 +55,9 @@
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
- : TargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
- getEffectiveRelocModel(RM), getEffectiveCodeModel(CM), OL),
+ : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
+ getEffectiveRelocModel(RM), getEffectiveCodeModel(CM),
+ OL),
TLOF(make_unique<TargetLoweringObjectFileELF>()),
Subtarget(TT, CPU, FS, *this) {
initAsmInfo();
diff --git a/llvm/lib/Target/BPF/BPFTargetMachine.h b/llvm/lib/Target/BPF/BPFTargetMachine.h
index 746d788..a560dd2 100644
--- a/llvm/lib/Target/BPF/BPFTargetMachine.h
+++ b/llvm/lib/Target/BPF/BPFTargetMachine.h
@@ -18,7 +18,7 @@
#include "llvm/Target/TargetMachine.h"
namespace llvm {
-class BPFTargetMachine : public TargetMachine {
+class BPFTargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
BPFSubtarget Subtarget;
diff --git a/llvm/lib/Target/CMakeLists.txt b/llvm/lib/Target/CMakeLists.txt
index c56e04e..1e6abfa 100644
--- a/llvm/lib/Target/CMakeLists.txt
+++ b/llvm/lib/Target/CMakeLists.txt
@@ -6,6 +6,8 @@
Target.cpp
TargetIntrinsicInfo.cpp
TargetLoweringObjectFile.cpp
+ TargetMachine.cpp
+ TargetMachineC.cpp
ADDITIONAL_HEADER_DIRS
${LLVM_MAIN_INCLUDE_DIR}/llvm/Target
diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
index 33439a7..7b2774f 100644
--- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
@@ -194,7 +194,7 @@
// Specify the vector alignment explicitly. For v512x1, the calculated
// alignment would be 512*alignment(i1), which is 512 bytes, instead of
// the required minimum of 64 bytes.
- : TargetMachine(
+ : LLVMTargetMachine(
T,
"e-m:e-p:32:32:32-a:0-n16:32-"
"i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-"
diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.h b/llvm/lib/Target/Hexagon/HexagonTargetMachine.h
index f916066..acd41f9 100644
--- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.h
+++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.h
@@ -23,7 +23,7 @@
class Module;
-class HexagonTargetMachine : public TargetMachine {
+class HexagonTargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
mutable StringMap<std::unique_ptr<HexagonSubtarget>> SubtargetMap;
diff --git a/llvm/lib/Target/Lanai/LanaiTargetMachine.cpp b/llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
index ec358e9..9a73c95 100644
--- a/llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
+++ b/llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
@@ -65,9 +65,9 @@
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CodeModel,
CodeGenOpt::Level OptLevel, bool JIT)
- : TargetMachine(T, computeDataLayout(), TT, Cpu, FeatureString, Options,
- getEffectiveRelocModel(RM),
- getEffectiveCodeModel(CodeModel), OptLevel),
+ : LLVMTargetMachine(T, computeDataLayout(), TT, Cpu, FeatureString, Options,
+ getEffectiveRelocModel(RM),
+ getEffectiveCodeModel(CodeModel), OptLevel),
Subtarget(TT, Cpu, FeatureString, *this, Options, getCodeModel(),
OptLevel),
TLOF(new LanaiTargetObjectFile()) {
diff --git a/llvm/lib/Target/Lanai/LanaiTargetMachine.h b/llvm/lib/Target/Lanai/LanaiTargetMachine.h
index 5f12bd3..ce1271d 100644
--- a/llvm/lib/Target/Lanai/LanaiTargetMachine.h
+++ b/llvm/lib/Target/Lanai/LanaiTargetMachine.h
@@ -25,7 +25,7 @@
namespace llvm {
class formatted_raw_ostream;
-class LanaiTargetMachine : public TargetMachine {
+class LanaiTargetMachine : public LLVMTargetMachine {
LanaiSubtarget Subtarget;
std::unique_ptr<TargetLoweringObjectFile> TLOF;
diff --git a/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp b/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
index 44f1694..01f44e2 100644
--- a/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
+++ b/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
@@ -49,9 +49,9 @@
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
- : TargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS,
- Options, getEffectiveRelocModel(RM),
- getEffectiveCodeModel(CM), OL),
+ : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS,
+ Options, getEffectiveRelocModel(RM),
+ getEffectiveCodeModel(CM), OL),
TLOF(make_unique<TargetLoweringObjectFileELF>()),
Subtarget(TT, CPU, FS, *this) {
initAsmInfo();
diff --git a/llvm/lib/Target/MSP430/MSP430TargetMachine.h b/llvm/lib/Target/MSP430/MSP430TargetMachine.h
index bd32004..97b5e81 100644
--- a/llvm/lib/Target/MSP430/MSP430TargetMachine.h
+++ b/llvm/lib/Target/MSP430/MSP430TargetMachine.h
@@ -23,7 +23,7 @@
/// MSP430TargetMachine
///
-class MSP430TargetMachine : public TargetMachine {
+class MSP430TargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
MSP430Subtarget Subtarget;
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
index 0aa4114..f01a800 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
@@ -686,7 +686,7 @@
MCAssembler &MCA = getStreamer().getAssembler();
// It's possible that MCObjectFileInfo isn't fully initialized at this point
- // due to an initialization order problem where TargetMachine creates the
+ // due to an initialization order problem where LLVMTargetMachine creates the
// target streamer before TargetLoweringObjectFile calls
// InitializeMCObjectFileInfo. There doesn't seem to be a single place that
// covers all cases so this statement covers most cases and direct object
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
index 179971b..6199ffd 100644
--- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
@@ -109,9 +109,9 @@
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT,
bool isLittle)
- : TargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
- CPU, FS, Options, getEffectiveRelocModel(JIT, RM),
- getEffectiveCodeModel(CM), OL),
+ : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
+ CPU, FS, Options, getEffectiveRelocModel(JIT, RM),
+ getEffectiveCodeModel(CM), OL),
isLittle(isLittle), TLOF(llvm::make_unique<MipsTargetObjectFile>()),
ABI(MipsABIInfo::computeTargetABI(TT, CPU, Options.MCOptions)),
Subtarget(nullptr), DefaultSubtarget(TT, CPU, FS, isLittle, *this,
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.h b/llvm/lib/Target/Mips/MipsTargetMachine.h
index 20627c3..ccfc9a9 100644
--- a/llvm/lib/Target/Mips/MipsTargetMachine.h
+++ b/llvm/lib/Target/Mips/MipsTargetMachine.h
@@ -25,7 +25,7 @@
namespace llvm {
-class MipsTargetMachine : public TargetMachine {
+class MipsTargetMachine : public LLVMTargetMachine {
bool isLittle;
std::unique_ptr<TargetLoweringObjectFile> TLOF;
// Selected ABI
diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
index 393d256..85f7578 100644
--- a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
@@ -100,8 +100,8 @@
CodeGenOpt::Level OL, bool is64bit)
// The pic relocation model is used regardless of what the client has
// specified, as it is the only relocation model currently supported.
- : TargetMachine(T, computeDataLayout(is64bit), TT, CPU, FS, Options,
- Reloc::PIC_, getEffectiveCodeModel(CM), OL),
+ : LLVMTargetMachine(T, computeDataLayout(is64bit), TT, CPU, FS, Options,
+ Reloc::PIC_, getEffectiveCodeModel(CM), OL),
is64bit(is64bit), TLOF(llvm::make_unique<NVPTXTargetObjectFile>()),
Subtarget(TT, CPU, FS, *this) {
if (TT.getOS() == Triple::NVCL)
diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.h b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.h
index 8bea331..7674135 100644
--- a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.h
+++ b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.h
@@ -24,7 +24,7 @@
/// NVPTXTargetMachine
///
-class NVPTXTargetMachine : public TargetMachine {
+class NVPTXTargetMachine : public LLVMTargetMachine {
bool is64bit;
std::unique_ptr<TargetLoweringObjectFile> TLOF;
NVPTX::DrvInterface drvInterface;
diff --git a/llvm/lib/Target/Nios2/Nios2TargetMachine.cpp b/llvm/lib/Target/Nios2/Nios2TargetMachine.cpp
index 6155d0b..7370dac 100644
--- a/llvm/lib/Target/Nios2/Nios2TargetMachine.cpp
+++ b/llvm/lib/Target/Nios2/Nios2TargetMachine.cpp
@@ -42,8 +42,8 @@
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
- : TargetMachine(T, computeDataLayout(), TT, CPU, FS, Options,
- getEffectiveRelocModel(RM), *CM, OL) {}
+ : LLVMTargetMachine(T, computeDataLayout(), TT, CPU, FS, Options,
+ getEffectiveRelocModel(RM), *CM, OL) {}
Nios2TargetMachine::~Nios2TargetMachine() {}
diff --git a/llvm/lib/Target/Nios2/Nios2TargetMachine.h b/llvm/lib/Target/Nios2/Nios2TargetMachine.h
index 5412e87..5031877 100644
--- a/llvm/lib/Target/Nios2/Nios2TargetMachine.h
+++ b/llvm/lib/Target/Nios2/Nios2TargetMachine.h
@@ -18,7 +18,7 @@
#include "llvm/Target/TargetMachine.h"
namespace llvm {
-class Nios2TargetMachine : public TargetMachine {
+class Nios2TargetMachine : public LLVMTargetMachine {
mutable StringMap<std::unique_ptr<Nios2Subtarget>> SubtargetMap;
public:
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
index eafa877..9e14678 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -225,7 +225,7 @@
// The FeatureString here is a little subtle. We are modifying the feature
// string with what are (currently) non-function specific overrides as it goes
-// into the TargetMachine constructor and then using the stored value in the
+// into the LLVMTargetMachine constructor and then using the stored value in the
// Subtarget constructor below it.
PPCTargetMachine::PPCTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
@@ -233,10 +233,10 @@
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
- : TargetMachine(T, getDataLayoutString(TT), TT, CPU,
- computeFSAdditions(FS, OL, TT), Options,
- getEffectiveRelocModel(TT, RM),
- getEffectiveCodeModel(TT, CM, JIT), OL),
+ : LLVMTargetMachine(T, getDataLayoutString(TT), TT, CPU,
+ computeFSAdditions(FS, OL, TT), Options,
+ getEffectiveRelocModel(TT, RM),
+ getEffectiveCodeModel(TT, CM, JIT), OL),
TLOF(createTLOF(getTargetTriple())),
TargetABI(computeTargetABI(TT, Options)) {
initAsmInfo();
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.h b/llvm/lib/Target/PowerPC/PPCTargetMachine.h
index d3be1ee..102bf7c 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.h
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.h
@@ -23,7 +23,7 @@
/// Common code between 32-bit and 64-bit PowerPC targets.
///
-class PPCTargetMachine final : public TargetMachine {
+class PPCTargetMachine final : public LLVMTargetMachine {
public:
enum PPCABI { PPC_ABI_UNKNOWN, PPC_ABI_ELFv1, PPC_ABI_ELFv2 };
private:
diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
index aa67c0e..78d9cf5 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
@@ -55,9 +55,9 @@
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
- : TargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
- getEffectiveRelocModel(TT, RM),
- getEffectiveCodeModel(CM), OL),
+ : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
+ getEffectiveRelocModel(TT, RM),
+ getEffectiveCodeModel(CM), OL),
TLOF(make_unique<TargetLoweringObjectFileELF>()) {
initAsmInfo();
}
diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.h b/llvm/lib/Target/RISCV/RISCVTargetMachine.h
index ea24573..5c2ec95 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetMachine.h
+++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.h
@@ -20,7 +20,7 @@
#include "llvm/Target/TargetMachine.h"
namespace llvm {
-class RISCVTargetMachine : public TargetMachine {
+class RISCVTargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
public:
diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
index b3142c4..a0d4065 100644
--- a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
+++ b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
@@ -88,7 +88,7 @@
const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
const TargetOptions &Options, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT, bool is64bit)
- : TargetMachine(
+ : LLVMTargetMachine(
T, computeDataLayout(TT, is64bit), TT, CPU, FS, Options,
getEffectiveRelocModel(RM),
getEffectiveCodeModel(CM, getEffectiveRelocModel(RM), is64bit, JIT),
diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.h b/llvm/lib/Target/Sparc/SparcTargetMachine.h
index 69f8ba7..b0d76ab 100644
--- a/llvm/lib/Target/Sparc/SparcTargetMachine.h
+++ b/llvm/lib/Target/Sparc/SparcTargetMachine.h
@@ -20,7 +20,7 @@
namespace llvm {
-class SparcTargetMachine : public TargetMachine {
+class SparcTargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
SparcSubtarget Subtarget;
bool is64Bit;
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp b/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
index d3f24c9..aa76a96 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
@@ -143,7 +143,7 @@
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
- : TargetMachine(
+ : LLVMTargetMachine(
T, computeDataLayout(TT, CPU, FS), TT, CPU, FS, Options,
getEffectiveRelocModel(RM),
getEffectiveCodeModel(CM, getEffectiveRelocModel(RM), JIT), OL),
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetMachine.h b/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
index 723944d..95ad5e3 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
+++ b/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
@@ -25,7 +25,7 @@
namespace llvm {
-class SystemZTargetMachine : public TargetMachine {
+class SystemZTargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
SystemZSubtarget Subtarget;
@@ -42,7 +42,7 @@
return &Subtarget;
}
- // Override TargetMachine
+ // Override LLVMTargetMachine
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
TargetIRAnalysis getTargetIRAnalysis() override;
diff --git a/llvm/lib/Target/TargetMachine.cpp b/llvm/lib/Target/TargetMachine.cpp
new file mode 100644
index 0000000..3b16dee
--- /dev/null
+++ b/llvm/lib/Target/TargetMachine.cpp
@@ -0,0 +1,222 @@
+//===-- TargetMachine.cpp - General Target Information ---------------------==//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file describes the general parts of a Target machine.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Analysis/TargetTransformInfo.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/IR/Function.h"
+#include "llvm/IR/GlobalAlias.h"
+#include "llvm/IR/GlobalValue.h"
+#include "llvm/IR/GlobalVariable.h"
+#include "llvm/IR/LegacyPassManager.h"
+#include "llvm/IR/Mangler.h"
+#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCContext.h"
+#include "llvm/MC/MCInstrInfo.h"
+#include "llvm/MC/MCSectionMachO.h"
+#include "llvm/MC/MCTargetOptions.h"
+#include "llvm/MC/SectionKind.h"
+#include "llvm/Target/TargetLowering.h"
+#include "llvm/Target/TargetLoweringObjectFile.h"
+#include "llvm/Target/TargetSubtargetInfo.h"
+using namespace llvm;
+
+//---------------------------------------------------------------------------
+// TargetMachine Class
+//
+
+TargetMachine::TargetMachine(const Target &T, StringRef DataLayoutString,
+ const Triple &TT, StringRef CPU, StringRef FS,
+ const TargetOptions &Options)
+ : TheTarget(T), DL(DataLayoutString), TargetTriple(TT), TargetCPU(CPU),
+ TargetFS(FS), AsmInfo(nullptr), MRI(nullptr), MII(nullptr), STI(nullptr),
+ RequireStructuredCFG(false), DefaultOptions(Options), Options(Options) {
+}
+
+TargetMachine::~TargetMachine() {
+ delete AsmInfo;
+ delete MRI;
+ delete MII;
+ delete STI;
+}
+
+bool TargetMachine::isPositionIndependent() const {
+ return getRelocationModel() == Reloc::PIC_;
+}
+
+/// \brief Reset the target options based on the function's attributes.
+// FIXME: This function needs to go away for a number of reasons:
+// a) global state on the TargetMachine is terrible in general,
+// b) these target options should be passed only on the function
+// and not on the TargetMachine (via TargetOptions) at all.
+void TargetMachine::resetTargetOptions(const Function &F) const {
+#define RESET_OPTION(X, Y) \
+ do { \
+ if (F.hasFnAttribute(Y)) \
+ Options.X = (F.getFnAttribute(Y).getValueAsString() == "true"); \
+ else \
+ Options.X = DefaultOptions.X; \
+ } while (0)
+
+ RESET_OPTION(UnsafeFPMath, "unsafe-fp-math");
+ RESET_OPTION(NoInfsFPMath, "no-infs-fp-math");
+ RESET_OPTION(NoNaNsFPMath, "no-nans-fp-math");
+ RESET_OPTION(NoSignedZerosFPMath, "no-signed-zeros-fp-math");
+ RESET_OPTION(NoTrappingFPMath, "no-trapping-math");
+
+ StringRef Denormal =
+ F.getFnAttribute("denormal-fp-math").getValueAsString();
+ if (Denormal == "ieee")
+ Options.FPDenormalMode = FPDenormal::IEEE;
+ else if (Denormal == "preserve-sign")
+ Options.FPDenormalMode = FPDenormal::PreserveSign;
+ else if (Denormal == "positive-zero")
+ Options.FPDenormalMode = FPDenormal::PositiveZero;
+ else
+ Options.FPDenormalMode = DefaultOptions.FPDenormalMode;
+}
+
+/// Returns the code generation relocation model. The choices are static, PIC,
+/// and dynamic-no-pic.
+Reloc::Model TargetMachine::getRelocationModel() const { return RM; }
+
+/// Returns the code model. The choices are small, kernel, medium, large, and
+/// target default.
+CodeModel::Model TargetMachine::getCodeModel() const { return CMModel; }
+
+/// Get the IR-specified TLS model for Var.
+static TLSModel::Model getSelectedTLSModel(const GlobalValue *GV) {
+ switch (GV->getThreadLocalMode()) {
+ case GlobalVariable::NotThreadLocal:
+ llvm_unreachable("getSelectedTLSModel for non-TLS variable");
+ break;
+ case GlobalVariable::GeneralDynamicTLSModel:
+ return TLSModel::GeneralDynamic;
+ case GlobalVariable::LocalDynamicTLSModel:
+ return TLSModel::LocalDynamic;
+ case GlobalVariable::InitialExecTLSModel:
+ return TLSModel::InitialExec;
+ case GlobalVariable::LocalExecTLSModel:
+ return TLSModel::LocalExec;
+ }
+ llvm_unreachable("invalid TLS model");
+}
+
+bool TargetMachine::shouldAssumeDSOLocal(const Module &M,
+ const GlobalValue *GV) const {
+ Reloc::Model RM = getRelocationModel();
+ const Triple &TT = getTargetTriple();
+
+ // DLLImport explicitly marks the GV as external.
+ if (GV && GV->hasDLLImportStorageClass())
+ return false;
+
+ // Every other GV is local on COFF.
+ // Make an exception for windows OS in the triple: Some firmwares builds use
+ // *-win32-macho triples. This (accidentally?) produced windows relocations
+ // without GOT tables in older clang versions; Keep this behaviour.
+ if (TT.isOSBinFormatCOFF() || (TT.isOSWindows() && TT.isOSBinFormatMachO()))
+ return true;
+
+ if (GV && (GV->hasLocalLinkage() || !GV->hasDefaultVisibility()))
+ return true;
+
+ if (TT.isOSBinFormatMachO()) {
+ if (RM == Reloc::Static)
+ return true;
+ return GV && GV->isStrongDefinitionForLinker();
+ }
+
+ assert(TT.isOSBinFormatELF());
+ assert(RM != Reloc::DynamicNoPIC);
+
+ bool IsExecutable =
+ RM == Reloc::Static || M.getPIELevel() != PIELevel::Default;
+ if (IsExecutable) {
+ // If the symbol is defined, it cannot be preempted.
+ if (GV && !GV->isDeclarationForLinker())
+ return true;
+
+ bool IsTLS = GV && GV->isThreadLocal();
+ bool IsAccessViaCopyRelocs = Options.MCOptions.MCPIECopyRelocations && GV &&
+ isa<GlobalVariable>(GV) &&
+ !GV->hasExternalWeakLinkage();
+ Triple::ArchType Arch = TT.getArch();
+ bool IsPPC =
+ Arch == Triple::ppc || Arch == Triple::ppc64 || Arch == Triple::ppc64le;
+ // Check if we can use copy relocations. PowerPC has no copy relocations.
+ if (!IsTLS && !IsPPC && (RM == Reloc::Static || IsAccessViaCopyRelocs))
+ return true;
+ }
+
+ // ELF supports preemption of other symbols.
+ return false;
+}
+
+TLSModel::Model TargetMachine::getTLSModel(const GlobalValue *GV) const {
+ bool IsPIE = GV->getParent()->getPIELevel() != PIELevel::Default;
+ Reloc::Model RM = getRelocationModel();
+ bool IsSharedLibrary = RM == Reloc::PIC_ && !IsPIE;
+ bool IsLocal = shouldAssumeDSOLocal(*GV->getParent(), GV);
+
+ TLSModel::Model Model;
+ if (IsSharedLibrary) {
+ if (IsLocal)
+ Model = TLSModel::LocalDynamic;
+ else
+ Model = TLSModel::GeneralDynamic;
+ } else {
+ if (IsLocal)
+ Model = TLSModel::LocalExec;
+ else
+ Model = TLSModel::InitialExec;
+ }
+
+ // If the user specified a more specific model, use that.
+ TLSModel::Model SelectedModel = getSelectedTLSModel(GV);
+ if (SelectedModel > Model)
+ return SelectedModel;
+
+ return Model;
+}
+
+/// Returns the optimization level: None, Less, Default, or Aggressive.
+CodeGenOpt::Level TargetMachine::getOptLevel() const { return OptLevel; }
+
+void TargetMachine::setOptLevel(CodeGenOpt::Level Level) { OptLevel = Level; }
+
+TargetIRAnalysis TargetMachine::getTargetIRAnalysis() {
+ return TargetIRAnalysis([](const Function &F) {
+ return TargetTransformInfo(F.getParent()->getDataLayout());
+ });
+}
+
+void TargetMachine::getNameWithPrefix(SmallVectorImpl<char> &Name,
+ const GlobalValue *GV, Mangler &Mang,
+ bool MayAlwaysUsePrivate) const {
+ if (MayAlwaysUsePrivate || !GV->hasPrivateLinkage()) {
+ // Simple case: If GV is not private, it is not important to find out if
+ // private labels are legal in this case or not.
+ Mang.getNameWithPrefix(Name, GV, false);
+ return;
+ }
+ const TargetLoweringObjectFile *TLOF = getObjFileLowering();
+ TLOF->getNameWithPrefix(Name, GV, *this);
+}
+
+MCSymbol *TargetMachine::getSymbol(const GlobalValue *GV) const {
+ const TargetLoweringObjectFile *TLOF = getObjFileLowering();
+ SmallString<128> NameStr;
+ getNameWithPrefix(NameStr, GV, TLOF->getMangler());
+ return TLOF->getContext().getOrCreateSymbol(NameStr);
+}
diff --git a/llvm/lib/CodeGen/TargetMachineC.cpp b/llvm/lib/Target/TargetMachineC.cpp
similarity index 100%
rename from llvm/lib/CodeGen/TargetMachineC.cpp
rename to llvm/lib/Target/TargetMachineC.cpp
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
index ad779c1..8ad74d9 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
@@ -69,10 +69,11 @@
const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
const TargetOptions &Options, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
- : TargetMachine(T, TT.isArch64Bit() ? "e-m:e-p:64:64-i64:64-n32:64-S128"
- : "e-m:e-p:32:32-i64:64-n32:64-S128",
- TT, CPU, FS, Options, getEffectiveRelocModel(RM),
- CM ? *CM : CodeModel::Large, OL),
+ : LLVMTargetMachine(T,
+ TT.isArch64Bit() ? "e-m:e-p:64:64-i64:64-n32:64-S128"
+ : "e-m:e-p:32:32-i64:64-n32:64-S128",
+ TT, CPU, FS, Options, getEffectiveRelocModel(RM),
+ CM ? *CM : CodeModel::Large, OL),
TLOF(TT.isOSBinFormatELF() ?
static_cast<TargetLoweringObjectFile*>(
new WebAssemblyTargetObjectFileELF()) :
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
index 4bb7fb0..2248495 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
@@ -21,7 +21,7 @@
namespace llvm {
-class WebAssemblyTargetMachine final : public TargetMachine {
+class WebAssemblyTargetMachine final : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
mutable StringMap<std::unique_ptr<WebAssemblySubtarget>> SubtargetMap;
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index b4ab877..51ae377 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -200,7 +200,7 @@
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
- : TargetMachine(
+ : LLVMTargetMachine(
T, computeDataLayout(TT), TT, CPU, FS, Options,
getEffectiveRelocModel(TT, RM),
getEffectiveCodeModel(CM, JIT, TT.getArch() == Triple::x86_64), OL),
diff --git a/llvm/lib/Target/X86/X86TargetMachine.h b/llvm/lib/Target/X86/X86TargetMachine.h
index 25a51ff..952bd13 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.h
+++ b/llvm/lib/Target/X86/X86TargetMachine.h
@@ -28,7 +28,7 @@
class X86Subtarget;
class X86RegisterBankInfo;
-class X86TargetMachine final : public TargetMachine {
+class X86TargetMachine final : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
mutable StringMap<std::unique_ptr<X86Subtarget>> SubtargetMap;
diff --git a/llvm/lib/Target/XCore/XCoreTargetMachine.cpp b/llvm/lib/Target/XCore/XCoreTargetMachine.cpp
index 2e932b9..3aa7187 100644
--- a/llvm/lib/Target/XCore/XCoreTargetMachine.cpp
+++ b/llvm/lib/Target/XCore/XCoreTargetMachine.cpp
@@ -48,7 +48,7 @@
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
- : TargetMachine(
+ : LLVMTargetMachine(
T, "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:32-f64:32-a:0:32-n32",
TT, CPU, FS, Options, getEffectiveRelocModel(RM),
getEffectiveCodeModel(CM), OL),
diff --git a/llvm/lib/Target/XCore/XCoreTargetMachine.h b/llvm/lib/Target/XCore/XCoreTargetMachine.h
index 8e6dde5..5baa352 100644
--- a/llvm/lib/Target/XCore/XCoreTargetMachine.h
+++ b/llvm/lib/Target/XCore/XCoreTargetMachine.h
@@ -24,7 +24,7 @@
namespace llvm {
-class XCoreTargetMachine : public TargetMachine {
+class XCoreTargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
XCoreSubtarget Subtarget;
diff --git a/llvm/tools/llc/llc.cpp b/llvm/tools/llc/llc.cpp
index 923095a..fe6b97e 100644
--- a/llvm/tools/llc/llc.cpp
+++ b/llvm/tools/llc/llc.cpp
@@ -511,7 +511,8 @@
}
const char *argv0 = argv[0];
- MachineModuleInfo *MMI = new MachineModuleInfo(Target.get());
+ LLVMTargetMachine &LLVMTM = static_cast<LLVMTargetMachine&>(*Target);
+ MachineModuleInfo *MMI = new MachineModuleInfo(&LLVMTM);
// Construct a custom pass pipeline that starts after instruction
// selection.
@@ -520,7 +521,7 @@
errs() << argv0 << ": run-pass is for .mir file only.\n";
return 1;
}
- TargetPassConfig &TPC = *Target->createPassConfig(PM);
+ TargetPassConfig &TPC = *LLVMTM.createPassConfig(PM);
if (TPC.hasLimitedCodeGenPipeline()) {
errs() << argv0 << ": run-pass cannot be used with "
<< TPC.getLimitedCodeGenPipelineReason(" and ") << ".\n";
diff --git a/llvm/tools/opt/opt.cpp b/llvm/tools/opt/opt.cpp
index a736107..73f89c0 100644
--- a/llvm/tools/opt/opt.cpp
+++ b/llvm/tools/opt/opt.cpp
@@ -593,9 +593,10 @@
}
if (TM) {
- Pass *TPC = TM->createPassConfig(Passes);
- if (TPC)
- Passes.add(TPC);
+ // FIXME: We should dyn_cast this when supported.
+ auto <M = static_cast<LLVMTargetMachine &>(*TM);
+ Pass *TPC = LTM.createPassConfig(Passes);
+ Passes.add(TPC);
}
// Create a new optimization pass for each one specified on the command line
diff --git a/llvm/unittests/CodeGen/MachineInstrTest.cpp b/llvm/unittests/CodeGen/MachineInstrTest.cpp
index bd61bf0..89041e2 100644
--- a/llvm/unittests/CodeGen/MachineInstrTest.cpp
+++ b/llvm/unittests/CodeGen/MachineInstrTest.cpp
@@ -62,11 +62,11 @@
TargetInstrInfo TII;
};
-class BogusTargetMachine : public TargetMachine {
+class BogusTargetMachine : public LLVMTargetMachine {
public:
BogusTargetMachine()
- : TargetMachine(Target(), "", Triple(""), "", "", TargetOptions(),
- Reloc::Static, CodeModel::Small, CodeGenOpt::Default),
+ : LLVMTargetMachine(Target(), "", Triple(""), "", "", TargetOptions(),
+ Reloc::Static, CodeModel::Small, CodeGenOpt::Default),
ST(*this) {}
~BogusTargetMachine() override {}