commit bcaca87d5350f86350f444a2f783d7bf05bcfbad
author Tim Northover <Tim.Northover@arm.com> Tue Feb 05 13:24:56 2013 +0000
committer Tim Northover <Tim.Northover@arm.com> Tue Feb 05 13:24:56 2013 +0000
tree b671590b8874047ca3f12646a11897f25e504bce
parent 969afbec64dceaf6100d656bd78c3ed4693ccf06

Fix formatting in AArch64 backend.

This should fix three purely whitespace issues:
    + 80 column violations.
    + Tab characters.
    + TableGen brace placement.

No functional changes.

llvm-svn: 174370

llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index bc0f396..e15d135 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -53,7 +53,7 @@
 
   // These are the public interface of the MCTargetAsmParser
   bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
-  bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, 
+  bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
                         SMLoc NameLoc,
                         SmallVectorImpl<MCParsedAsmOperand*> &Operands);
 
@@ -116,7 +116,7 @@
   ParseSysRegOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands);
 
   bool validateInstruction(MCInst &Inst,
-                           const SmallVectorImpl<MCParsedAsmOperand*> &Operands);
+                          const SmallVectorImpl<MCParsedAsmOperand*> &Operands);
 
   /// Scan the next token (which had better be an identifier) and determine
   /// whether it represents a general-purpose or vector register. It returns
@@ -1674,7 +1674,8 @@
     if (Parser.getTok().is(AsmToken::Comma) ||
         Parser.getTok().is(AsmToken::EndOfStatement) ||
         Parser.getTok().is(AsmToken::RBrac)) {
-      Operands.push_back(AArch64Operand::CreateShiftExtend(Spec, 0, true, S, E));
+      Operands.push_back(AArch64Operand::CreateShiftExtend(Spec, 0, true,
+                                                           S, E));
       return MatchOperand_Success;
     }
   }
@@ -1697,7 +1698,8 @@
   Parser.Lex();
   E = Parser.getTok().getLoc();
 
-  Operands.push_back(AArch64Operand::CreateShiftExtend(Spec, Amount, false, S, E));
+  Operands.push_back(AArch64Operand::CreateShiftExtend(Spec, Amount, false,
+                                                       S, E));
 
   return MatchOperand_Success;
 }
@@ -1942,7 +1944,7 @@
                                  bool MatchingInlineAsm) {
   MCInst Inst;
   unsigned MatchResult;
-  MatchResult = MatchInstructionImpl(Operands, Inst, ErrorInfo, 
+  MatchResult = MatchInstructionImpl(Operands, Inst, ErrorInfo,
                                      MatchingInlineAsm);
   switch (MatchResult) {
   default: break;