[PowerPC] Disable shrink-wrapping when getting PC address through the LR
The instruction sequence used to get the address of the PC into a GPR requires
that we clobber the link register. Doing so without having first saved it in
the prologue leaves the function unable to return. Currently, this sequence is
emitted into the entry block. To ensure the prologue is inserted before this
sequence, disable shrink-wrapping.
This fixes PR33547.
Differential Revision: https://reviews.llvm.org/D43677
llvm-svn: 325972
diff --git a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
index a9b6073..24426af 100644
--- a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
+++ b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
@@ -45,6 +45,11 @@
/// PEI.
bool MustSaveLR;
+ /// Do we have to disable shrink-wrapping? This has to be set if we emit any
+ /// instructions that clobber LR in the entry block because discovering this
+ /// in PEI is too late (happens after shrink-wrapping);
+ bool ShrinkWrapDisabled = false;
+
/// Does this function have any stack spills.
bool HasSpills = false;
@@ -147,6 +152,12 @@
void setMustSaveLR(bool U) { MustSaveLR = U; }
bool mustSaveLR() const { return MustSaveLR; }
+ /// We certainly don't want to shrink wrap functions if we've emitted a
+ /// MovePCtoLR8 as that has to go into the entry, so the prologue definitely
+ /// has to go into the entry block.
+ void setShrinkWrapDisabled(bool U) { ShrinkWrapDisabled = U; }
+ bool shrinkWrapDisabled() const { return ShrinkWrapDisabled; }
+
void setHasSpills() { HasSpills = true; }
bool hasSpills() const { return HasSpills; }