Add a hybrid bottom up scheduler that reduce register usage while avoiding
pipeline stall. It's useful for targets like ARM cortex-a8. NEON has a lot
of long latency instructions so a strict register pressure reduction
scheduler does not work well.
Early experiments show this speeds up some NEON loops by over 30%.

llvm-svn: 104216
8 files changed
tree: 4622fd6ccaeacd89ac38f69a12a317d31cf3f31e
  1. clang/
  2. compiler-rt/
  3. libcxx/
  4. llvm/