VMOVQQQQs pseudo instructions are only created by ARMBaseInstrInfo::copyPhysReg.
Therefore, rather then generate a pseudo instruction, which is later expanded,
generate the necessary instructions in place.
llvm-svn: 138163
diff --git a/llvm/test/CodeGen/ARM/2011-08-12-vmovqqqq-pseudo.ll b/llvm/test/CodeGen/ARM/2011-08-12-vmovqqqq-pseudo.ll
index f8e6a4e..a7cdb4d 100644
--- a/llvm/test/CodeGen/ARM/2011-08-12-vmovqqqq-pseudo.ll
+++ b/llvm/test/CodeGen/ARM/2011-08-12-vmovqqqq-pseudo.ll
@@ -1,7 +1,6 @@
; RUN: llc %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a9 -O0 -o -
-; The following test is supposed to produce a VMOVQQQQ pseudo instruction.
-; Make sure that it gets expanded; otherwise, the compile fails when trying
-; to print the pseudo-instruction.
+; Make sure that the VMOVQQQQ pseudo instruction is handled properly
+; by codegen.
define void @test_vmovqqqq_pseudo() nounwind ssp {
entry: