[Hexagon] Generate more hardware loops
Refactored parts of the hardware loop pass to generate
more. Also, added more tests.
Differential Revision: http://reviews.llvm.org/D9568
llvm-svn: 236896
diff --git a/llvm/test/CodeGen/Hexagon/hwloop-lt.ll b/llvm/test/CodeGen/Hexagon/hwloop-lt.ll
index 804f764..7e2ad2a 100644
--- a/llvm/test/CodeGen/Hexagon/hwloop-lt.ll
+++ b/llvm/test/CodeGen/Hexagon/hwloop-lt.ll
@@ -1,7 +1,6 @@
; RUN: llc -march=hexagon -mcpu=hexagonv4 -O3 < %s | FileCheck %s
-
-; CHECK: test_pos1_ir_slt
+; CHECK-LABEL: @test_pos1_ir_slt
; CHECK: loop0
; a < b
define void @test_pos1_ir_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
@@ -9,10 +8,10 @@
%cmp3 = icmp slt i32 8531, %b
br i1 %cmp3, label %for.body.lr.ph, label %for.end
-for.body.lr.ph: ; preds = %entry
+for.body.lr.ph:
br label %for.body
-for.body: ; preds = %for.body.lr.ph, %for.body
+for.body:
%i.04 = phi i32 [ 8531, %for.body.lr.ph ], [ %inc, %for.body ]
%arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04
%0 = load i8, i8* %arrayidx, align 1
@@ -24,13 +23,11 @@
%cmp = icmp slt i32 %inc, %b
br i1 %cmp, label %for.body, label %for.end
-for.end: ; preds = %for.body, %entry
+for.end:
ret void
}
-
-
-; CHECK: test_pos2_ir_slt
+; CHECK-LABEL: @test_pos2_ir_slt
; CHECK: loop0
; a < b
define void @test_pos2_ir_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
@@ -38,10 +35,10 @@
%cmp3 = icmp slt i32 9152, %b
br i1 %cmp3, label %for.body.lr.ph, label %for.end
-for.body.lr.ph: ; preds = %entry
+for.body.lr.ph:
br label %for.body
-for.body: ; preds = %for.body.lr.ph, %for.body
+for.body:
%i.04 = phi i32 [ 9152, %for.body.lr.ph ], [ %inc, %for.body ]
%arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04
%0 = load i8, i8* %arrayidx, align 1
@@ -53,13 +50,11 @@
%cmp = icmp slt i32 %inc, %b
br i1 %cmp, label %for.body, label %for.end
-for.end: ; preds = %for.body, %entry
+for.end:
ret void
}
-
-
-; CHECK: test_pos4_ir_slt
+; CHECK-LABEL: @test_pos4_ir_slt
; CHECK: loop0
; a < b
define void @test_pos4_ir_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
@@ -67,10 +62,10 @@
%cmp3 = icmp slt i32 18851, %b
br i1 %cmp3, label %for.body.lr.ph, label %for.end
-for.body.lr.ph: ; preds = %entry
+for.body.lr.ph:
br label %for.body
-for.body: ; preds = %for.body.lr.ph, %for.body
+for.body:
%i.04 = phi i32 [ 18851, %for.body.lr.ph ], [ %inc, %for.body ]
%arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04
%0 = load i8, i8* %arrayidx, align 1
@@ -82,13 +77,11 @@
%cmp = icmp slt i32 %inc, %b
br i1 %cmp, label %for.body, label %for.end
-for.end: ; preds = %for.body, %entry
+for.end:
ret void
}
-
-
-; CHECK: test_pos8_ir_slt
+; CHECK-LABEL: @test_pos8_ir_slt
; CHECK: loop0
; a < b
define void @test_pos8_ir_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
@@ -96,10 +89,10 @@
%cmp3 = icmp slt i32 25466, %b
br i1 %cmp3, label %for.body.lr.ph, label %for.end
-for.body.lr.ph: ; preds = %entry
+for.body.lr.ph:
br label %for.body
-for.body: ; preds = %for.body.lr.ph, %for.body
+for.body:
%i.04 = phi i32 [ 25466, %for.body.lr.ph ], [ %inc, %for.body ]
%arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04
%0 = load i8, i8* %arrayidx, align 1
@@ -111,13 +104,11 @@
%cmp = icmp slt i32 %inc, %b
br i1 %cmp, label %for.body, label %for.end
-for.end: ; preds = %for.body, %entry
+for.end:
ret void
}
-
-
-; CHECK: test_pos16_ir_slt
+; CHECK-LABEL: @test_pos16_ir_slt
; CHECK: loop0
; a < b
define void @test_pos16_ir_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
@@ -125,10 +116,10 @@
%cmp3 = icmp slt i32 9295, %b
br i1 %cmp3, label %for.body.lr.ph, label %for.end
-for.body.lr.ph: ; preds = %entry
+for.body.lr.ph:
br label %for.body
-for.body: ; preds = %for.body.lr.ph, %for.body
+for.body:
%i.04 = phi i32 [ 9295, %for.body.lr.ph ], [ %inc, %for.body ]
%arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04
%0 = load i8, i8* %arrayidx, align 1
@@ -140,13 +131,11 @@
%cmp = icmp slt i32 %inc, %b
br i1 %cmp, label %for.body, label %for.end
-for.end: ; preds = %for.body, %entry
+for.end:
ret void
}
-
-
-; CHECK: test_pos1_ri_slt
+; CHECK-LABEL: @test_pos1_ri_slt
; CHECK: loop0
; a < b
define void @test_pos1_ri_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
@@ -154,10 +143,10 @@
%cmp3 = icmp slt i32 %a, 31236
br i1 %cmp3, label %for.body.lr.ph, label %for.end
-for.body.lr.ph: ; preds = %entry
+for.body.lr.ph:
br label %for.body
-for.body: ; preds = %for.body.lr.ph, %for.body
+for.body:
%i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
%arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04
%0 = load i8, i8* %arrayidx, align 1
@@ -169,13 +158,11 @@
%cmp = icmp slt i32 %inc, 31236
br i1 %cmp, label %for.body, label %for.end
-for.end: ; preds = %for.body, %entry
+for.end:
ret void
}
-
-
-; CHECK: test_pos2_ri_slt
+; CHECK-LABEL: @test_pos2_ri_slt
; CHECK: loop0
; a < b
define void @test_pos2_ri_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
@@ -183,10 +170,10 @@
%cmp3 = icmp slt i32 %a, 22653
br i1 %cmp3, label %for.body.lr.ph, label %for.end
-for.body.lr.ph: ; preds = %entry
+for.body.lr.ph:
br label %for.body
-for.body: ; preds = %for.body.lr.ph, %for.body
+for.body:
%i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
%arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04
%0 = load i8, i8* %arrayidx, align 1
@@ -198,13 +185,11 @@
%cmp = icmp slt i32 %inc, 22653
br i1 %cmp, label %for.body, label %for.end
-for.end: ; preds = %for.body, %entry
+for.end:
ret void
}
-
-
-; CHECK: test_pos4_ri_slt
+; CHECK-LABEL: @test_pos4_ri_slt
; CHECK: loop0
; a < b
define void @test_pos4_ri_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
@@ -212,10 +197,10 @@
%cmp3 = icmp slt i32 %a, 1431
br i1 %cmp3, label %for.body.lr.ph, label %for.end
-for.body.lr.ph: ; preds = %entry
+for.body.lr.ph:
br label %for.body
-for.body: ; preds = %for.body.lr.ph, %for.body
+for.body:
%i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
%arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04
%0 = load i8, i8* %arrayidx, align 1
@@ -227,13 +212,11 @@
%cmp = icmp slt i32 %inc, 1431
br i1 %cmp, label %for.body, label %for.end
-for.end: ; preds = %for.body, %entry
+for.end:
ret void
}
-
-
-; CHECK: test_pos8_ri_slt
+; CHECK-LABEL: @test_pos8_ri_slt
; CHECK: loop0
; a < b
define void @test_pos8_ri_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
@@ -241,10 +224,10 @@
%cmp3 = icmp slt i32 %a, 22403
br i1 %cmp3, label %for.body.lr.ph, label %for.end
-for.body.lr.ph: ; preds = %entry
+for.body.lr.ph:
br label %for.body
-for.body: ; preds = %for.body.lr.ph, %for.body
+for.body:
%i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
%arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04
%0 = load i8, i8* %arrayidx, align 1
@@ -256,13 +239,11 @@
%cmp = icmp slt i32 %inc, 22403
br i1 %cmp, label %for.body, label %for.end
-for.end: ; preds = %for.body, %entry
+for.end:
ret void
}
-
-
-; CHECK: test_pos16_ri_slt
+; CHECK-LABEL: @test_pos16_ri_slt
; CHECK: loop0
; a < b
define void @test_pos16_ri_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
@@ -270,10 +251,10 @@
%cmp3 = icmp slt i32 %a, 21715
br i1 %cmp3, label %for.body.lr.ph, label %for.end
-for.body.lr.ph: ; preds = %entry
+for.body.lr.ph:
br label %for.body
-for.body: ; preds = %for.body.lr.ph, %for.body
+for.body:
%i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
%arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04
%0 = load i8, i8* %arrayidx, align 1
@@ -285,13 +266,11 @@
%cmp = icmp slt i32 %inc, 21715
br i1 %cmp, label %for.body, label %for.end
-for.end: ; preds = %for.body, %entry
+for.end:
ret void
}
-
-
-; CHECK: test_pos1_rr_slt
+; CHECK-LABEL: @test_pos1_rr_slt
; CHECK: loop0
; a < b
define void @test_pos1_rr_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
@@ -299,10 +278,10 @@
%cmp3 = icmp slt i32 %a, %b
br i1 %cmp3, label %for.body.lr.ph, label %for.end
-for.body.lr.ph: ; preds = %entry
+for.body.lr.ph:
br label %for.body
-for.body: ; preds = %for.body.lr.ph, %for.body
+for.body:
%i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
%arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04
%0 = load i8, i8* %arrayidx, align 1
@@ -314,13 +293,11 @@
%cmp = icmp slt i32 %inc, %b
br i1 %cmp, label %for.body, label %for.end
-for.end: ; preds = %for.body, %entry
+for.end:
ret void
}
-
-
-; CHECK: test_pos2_rr_slt
+; CHECK-LABEL: @test_pos2_rr_slt
; CHECK: loop0
; a < b
define void @test_pos2_rr_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
@@ -328,10 +305,10 @@
%cmp3 = icmp slt i32 %a, %b
br i1 %cmp3, label %for.body.lr.ph, label %for.end
-for.body.lr.ph: ; preds = %entry
+for.body.lr.ph:
br label %for.body
-for.body: ; preds = %for.body.lr.ph, %for.body
+for.body:
%i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
%arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04
%0 = load i8, i8* %arrayidx, align 1
@@ -343,13 +320,11 @@
%cmp = icmp slt i32 %inc, %b
br i1 %cmp, label %for.body, label %for.end
-for.end: ; preds = %for.body, %entry
+for.end:
ret void
}
-
-
-; CHECK: test_pos4_rr_slt
+; CHECK-LABEL: @test_pos4_rr_slt
; CHECK: loop0
; a < b
define void @test_pos4_rr_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
@@ -357,10 +332,10 @@
%cmp3 = icmp slt i32 %a, %b
br i1 %cmp3, label %for.body.lr.ph, label %for.end
-for.body.lr.ph: ; preds = %entry
+for.body.lr.ph:
br label %for.body
-for.body: ; preds = %for.body.lr.ph, %for.body
+for.body:
%i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
%arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04
%0 = load i8, i8* %arrayidx, align 1
@@ -372,13 +347,11 @@
%cmp = icmp slt i32 %inc, %b
br i1 %cmp, label %for.body, label %for.end
-for.end: ; preds = %for.body, %entry
+for.end:
ret void
}
-
-
-; CHECK: test_pos8_rr_slt
+; CHECK-LABEL: @test_pos8_rr_slt
; CHECK: loop0
; a < b
define void @test_pos8_rr_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
@@ -386,10 +359,10 @@
%cmp3 = icmp slt i32 %a, %b
br i1 %cmp3, label %for.body.lr.ph, label %for.end
-for.body.lr.ph: ; preds = %entry
+for.body.lr.ph:
br label %for.body
-for.body: ; preds = %for.body.lr.ph, %for.body
+for.body:
%i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
%arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04
%0 = load i8, i8* %arrayidx, align 1
@@ -401,13 +374,11 @@
%cmp = icmp slt i32 %inc, %b
br i1 %cmp, label %for.body, label %for.end
-for.end: ; preds = %for.body, %entry
+for.end:
ret void
}
-
-
-; CHECK: test_pos16_rr_slt
+; CHECK-LABEL: @test_pos16_rr_slt
; CHECK: loop0
; a < b
define void @test_pos16_rr_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
@@ -415,10 +386,10 @@
%cmp3 = icmp slt i32 %a, %b
br i1 %cmp3, label %for.body.lr.ph, label %for.end
-for.body.lr.ph: ; preds = %entry
+for.body.lr.ph:
br label %for.body
-for.body: ; preds = %for.body.lr.ph, %for.body
+for.body:
%i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
%arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04
%0 = load i8, i8* %arrayidx, align 1
@@ -430,7 +401,7 @@
%cmp = icmp slt i32 %inc, %b
br i1 %cmp, label %for.body, label %for.end
-for.end: ; preds = %for.body, %entry
+for.end:
ret void
}
diff --git a/llvm/test/CodeGen/Hexagon/hwloop-missed.ll b/llvm/test/CodeGen/Hexagon/hwloop-missed.ll
new file mode 100644
index 0000000..bcc8006
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/hwloop-missed.ll
@@ -0,0 +1,49 @@
+; RUN: llc -march=hexagon -hexagon-hwloop-preheader < %s | FileCheck %s
+
+; Generate hardware loops when we also need to add a new preheader.
+; we should generate two hardware loops for this test case.
+
+; CHECK: loop0
+; CHECK: endloop0
+; CHECK: loop0
+; CHECK: endloop0
+
+@g = external global i32
+
+define void @test(i32* nocapture %a, i32* nocapture %b, i32 %n) nounwind {
+entry:
+ %tobool = icmp eq i32 %n, 0
+ br i1 %tobool, label %for.body4.preheader, label %for.body.preheader
+
+for.body.preheader:
+ br label %for.body
+
+for.body:
+ %arrayidx.phi = phi i32* [ %arrayidx.inc, %for.body ], [ %a, %for.body.preheader ]
+ %i.014 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ]
+ %0 = load i32, i32* @g, align 4
+ store i32 %0, i32* %arrayidx.phi, align 4
+ %inc = add nsw i32 %i.014, 1
+ %exitcond15 = icmp eq i32 %inc, 3
+ %arrayidx.inc = getelementptr i32, i32* %arrayidx.phi, i32 1
+ br i1 %exitcond15, label %for.body4.preheader.loopexit, label %for.body
+
+for.body4.preheader.loopexit:
+ br label %for.body4.preheader
+
+for.body4.preheader:
+ br label %for.body4
+
+for.body4:
+ %arrayidx5.phi = phi i32* [ %arrayidx5.inc, %for.body4 ], [ %b, %for.body4.preheader ]
+ %i1.013 = phi i32 [ %inc7, %for.body4 ], [ 0, %for.body4.preheader ]
+ %1 = load i32, i32* @g, align 4
+ store i32 %1, i32* %arrayidx5.phi, align 4
+ %inc7 = add nsw i32 %i1.013, 1
+ %exitcond = icmp eq i32 %inc7, 3
+ %arrayidx5.inc = getelementptr i32, i32* %arrayidx5.phi, i32 1
+ br i1 %exitcond, label %for.end8, label %for.body4
+
+for.end8:
+ ret void
+}
diff --git a/llvm/test/CodeGen/Hexagon/hwloop-preheader.ll b/llvm/test/CodeGen/Hexagon/hwloop-preheader.ll
new file mode 100644
index 0000000..66efd20
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/hwloop-preheader.ll
@@ -0,0 +1,40 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv5 -hexagon-hwloop-preheader < %s
+; REQUIRES: asserts
+
+; Test that the preheader is added to the parent loop, otherwise
+; we generate an invalid hardware loop.
+
+; Function Attrs: nounwind readonly
+define void @test(i16 signext %n) #0 {
+entry:
+ br i1 undef, label %for.cond4.preheader.preheader.split.us, label %for.end22
+
+for.cond4.preheader.preheader.split.us:
+ %0 = sext i16 %n to i32
+ br label %for.body9.preheader.us
+
+for.body9.us:
+ %indvars.iv = phi i32 [ %indvars.iv.next.7, %for.body9.us ], [ 0, %for.body9.preheader.us ]
+ %indvars.iv.next.7 = add i32 %indvars.iv, 8
+ %lftr.wideiv.7 = trunc i32 %indvars.iv.next.7 to i16
+ %exitcond.7 = icmp slt i16 %lftr.wideiv.7, 0
+ br i1 %exitcond.7, label %for.body9.us, label %for.body9.us.ur
+
+for.body9.preheader.us:
+ %i.030.us.pmt = phi i32 [ %inc21.us.pmt, %for.end.loopexit.us ], [ 0, %for.cond4.preheader.preheader.split.us ]
+ br i1 undef, label %for.body9.us, label %for.body9.us.ur
+
+for.body9.us.ur:
+ %exitcond.ur.old = icmp eq i16 undef, %n
+ br i1 %exitcond.ur.old, label %for.end.loopexit.us, label %for.body9.us.ur
+
+for.end.loopexit.us:
+ %inc21.us.pmt = add i32 %i.030.us.pmt, 1
+ %exitcond33 = icmp eq i32 %inc21.us.pmt, %0
+ br i1 %exitcond33, label %for.end22, label %for.body9.preheader.us
+
+for.end22:
+ ret void
+}
+
+attributes #0 = { nounwind readonly "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
diff --git a/llvm/test/CodeGen/Hexagon/hwloop1.ll b/llvm/test/CodeGen/Hexagon/hwloop1.ll
new file mode 100644
index 0000000..97b779c
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/hwloop1.ll
@@ -0,0 +1,161 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+; Check that we generate hardware loop instructions.
+
+; Case 1 : Loop with a constant number of iterations.
+; CHECK-LABEL: @hwloop1
+; CHECK: loop0(.LBB{{.}}_{{.}}, #10)
+; CHECK: endloop0
+
+@a = common global [10 x i32] zeroinitializer, align 4
+define i32 @hwloop1() nounwind {
+entry:
+ br label %for.body
+for.body:
+ %i.01 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds [10 x i32], [10 x i32]* @a, i32 0, i32 %i.01
+ store i32 %i.01, i32* %arrayidx, align 4
+ %inc = add nsw i32 %i.01, 1
+ %exitcond = icmp eq i32 %inc, 10
+ br i1 %exitcond, label %for.end, label %for.body
+for.end:
+ ret i32 0
+}
+
+; Case 2 : Loop with a run-time number of iterations.
+; CHECK-LABEL: @hwloop2
+; CHECK: loop0(.LBB{{.}}_{{.}}, r{{[0-9]+}})
+; CHECK: endloop0
+
+define i32 @hwloop2(i32 %n, i32* nocapture %b) nounwind {
+entry:
+ %cmp1 = icmp sgt i32 %n, 0
+ br i1 %cmp1, label %for.body.preheader, label %for.end
+
+for.body.preheader:
+ br label %for.body
+
+for.body:
+ %a.03 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]
+ %i.02 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ]
+ %arrayidx = getelementptr inbounds i32, i32* %b, i32 %i.02
+ %0 = load i32, i32* %arrayidx, align 4
+ %add = add nsw i32 %0, %a.03
+ %inc = add nsw i32 %i.02, 1
+ %exitcond = icmp eq i32 %inc, %n
+ br i1 %exitcond, label %for.end.loopexit, label %for.body
+
+for.end.loopexit:
+ br label %for.end
+
+for.end:
+ %a.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.end.loopexit ]
+ ret i32 %a.0.lcssa
+}
+
+; Case 3 : Induction variable increment more than 1.
+; CHECK-LABEL: @hwloop3
+; CHECK: lsr(r{{[0-9]+}}, #2)
+; CHECK: loop0(.LBB{{.}}_{{.}}, r{{[0-9]+}})
+; CHECK: endloop0
+
+define i32 @hwloop3(i32 %n, i32* nocapture %b) nounwind {
+entry:
+ %cmp1 = icmp sgt i32 %n, 0
+ br i1 %cmp1, label %for.body.preheader, label %for.end
+
+for.body.preheader:
+ br label %for.body
+
+for.body:
+ %a.03 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]
+ %i.02 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ]
+ %arrayidx = getelementptr inbounds i32, i32* %b, i32 %i.02
+ %0 = load i32, i32* %arrayidx, align 4
+ %add = add nsw i32 %0, %a.03
+ %inc = add nsw i32 %i.02, 4
+ %exitcond = icmp eq i32 %inc, %n
+ br i1 %exitcond, label %for.end.loopexit, label %for.body
+
+for.end.loopexit:
+ br label %for.end
+
+for.end:
+ %a.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.end.loopexit ]
+ ret i32 %a.0.lcssa
+}
+
+; Case 4 : Loop exit compare uses register instead of immediate value.
+; CHECK-LABEL: @hwloop4
+; CHECK: loop0(.LBB{{.}}_{{.}}, r{{[0-9]+}})
+; CHECK: endloop0
+
+define i32 @hwloop4(i32 %n, i32* nocapture %b) nounwind {
+entry:
+ %cmp1 = icmp sgt i32 %n, 0
+ br i1 %cmp1, label %for.body.preheader, label %for.end
+
+for.body.preheader:
+ br label %for.body
+
+for.body:
+ %i.02 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ]
+ %arrayidx = getelementptr inbounds i32, i32* %b, i32 %i.02
+ store i32 %i.02, i32* %arrayidx, align 4
+ %inc = add nsw i32 %i.02, 1
+ %exitcond = icmp eq i32 %inc, %n
+ br i1 %exitcond, label %for.end.loopexit, label %for.body
+
+for.end.loopexit:
+ br label %for.end
+
+for.end:
+ ret i32 0
+}
+
+; Case 5: After LSR, the initial value is 100 and the iv decrements to 0.
+; CHECK-LABEL: @hwloop5
+; CHECK: loop0(.LBB{{.}}_{{.}}, #100)
+; CHECK: endloop0
+
+define void @hwloop5(i32* nocapture %a, i32* nocapture %res) nounwind {
+entry:
+ br label %for.body
+
+for.body:
+ %i.03 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i32, i32* %a, i32 %i.03
+ %0 = load i32, i32* %arrayidx, align 4
+ %mul = mul nsw i32 %0, %0
+ %arrayidx2 = getelementptr inbounds i32, i32* %res, i32 %i.03
+ store i32 %mul, i32* %arrayidx2, align 4
+ %inc = add nsw i32 %i.03, 1
+ %exitcond = icmp eq i32 %inc, 100
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+; Case 6: Large immediate offset
+; CHECK-LABEL: @hwloop6
+; CHECK-NOT: loop0(.LBB{{.}}_{{.}}, #1024)
+; CHECK: loop0(.LBB{{.}}_{{.}}, r{{[0-9]+}})
+; CHECK: endloop0
+
+define void @hwloop6(i32* nocapture %a, i32* nocapture %res) nounwind {
+entry:
+ br label %for.body
+
+for.body:
+ %i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i32, i32* %a, i32 %i.02
+ %0 = load i32, i32* %arrayidx, align 4
+ %arrayidx1 = getelementptr inbounds i32, i32* %res, i32 %i.02
+ store i32 %0, i32* %arrayidx1, align 4
+ %inc = add nsw i32 %i.02, 1
+ %exitcond = icmp eq i32 %inc, 1024
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
diff --git a/llvm/test/CodeGen/Hexagon/hwloop2.ll b/llvm/test/CodeGen/Hexagon/hwloop2.ll
new file mode 100644
index 0000000..d411d97
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/hwloop2.ll
@@ -0,0 +1,37 @@
+; RUN: llc -disable-lsr -march=hexagon < %s | FileCheck %s
+
+; Test for multiple phis with induction variables.
+
+; CHECK: loop0(.LBB{{.}}_{{.}}, r{{[0-9]+}})
+; CHECK: endloop0
+
+define i32 @hwloop4(i32* nocapture %s, i32* nocapture %a, i32 %n) {
+entry:
+ %cmp3 = icmp eq i32 %n, 0
+ br i1 %cmp3, label %for.end, label %for.body.lr.ph
+
+for.body.lr.ph:
+ %.pre = load i32, i32* %s, align 4
+ br label %for.body
+
+for.body:
+ %0 = phi i32 [ %.pre, %for.body.lr.ph ], [ %add1, %for.body ]
+ %j.05 = phi i32 [ 0, %for.body.lr.ph ], [ %add2, %for.body ]
+ %lsr.iv = phi i32 [ %lsr.iv.next, %for.body ], [ %n, %for.body.lr.ph ]
+ %lsr.iv1 = phi i32* [ %scevgep, %for.body ], [ %a, %for.body.lr.ph ]
+ %1 = load i32, i32* %lsr.iv1, align 4
+ %add1 = add nsw i32 %0, %1
+ store i32 %add1, i32* %s, align 4
+ %add2 = add nsw i32 %j.05, 1
+ %lsr.iv.next = add i32 %lsr.iv, -1
+ %scevgep = getelementptr i32, i32* %lsr.iv1, i32 1
+ %cmp = icmp eq i32 %lsr.iv.next, 0
+ br i1 %cmp, label %for.end.loopexit, label %for.body
+
+for.end.loopexit:
+ br label %for.end
+
+for.end:
+ %j.0.lcssa = phi i32 [ 0, %entry ], [ %add2, %for.end.loopexit ]
+ ret i32 %j.0.lcssa
+}
diff --git a/llvm/test/CodeGen/Hexagon/hwloop3.ll b/llvm/test/CodeGen/Hexagon/hwloop3.ll
new file mode 100644
index 0000000..1135e06
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/hwloop3.ll
@@ -0,0 +1,27 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+;
+; Remove the unconditional jump to following instruction.
+
+; CHECK: endloop0
+; CHECK-NOT: jump [[L1:.]]
+; CHECK-NOT: [[L1]]
+
+define void @test(i32* nocapture %a, i32 %n) nounwind {
+entry:
+ br label %for.body
+
+for.body:
+ %arrayidx.phi = phi i32* [ %a, %entry ], [ %arrayidx.inc, %for.body ]
+ %i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
+ %0 = load i32, i32* %arrayidx.phi, align 4
+ %add = add nsw i32 %0, 1
+ store i32 %add, i32* %arrayidx.phi, align 4
+ %inc = add nsw i32 %i.02, 1
+ %exitcond = icmp eq i32 %inc, 100
+ %arrayidx.inc = getelementptr i32, i32* %arrayidx.phi, i32 1
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
diff --git a/llvm/test/CodeGen/Hexagon/hwloop4.ll b/llvm/test/CodeGen/Hexagon/hwloop4.ll
new file mode 100644
index 0000000..d159c45
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/hwloop4.ll
@@ -0,0 +1,76 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s
+;
+; Remove the unnecessary 'add' instruction used for the hardware loop setup.
+
+; CHECK: [[OP0:r[0-9]+]] = add([[OP1:r[0-9]+]], #-[[OP2:[0-9]+]]
+; CHECK-NOT: add([[OP0]], #[[OP2]])
+; CHECK: lsr([[OP1]], #{{[0-9]+}})
+; CHECK: loop0
+
+define void @matrix_mul_matrix(i32 %N, i32* nocapture %C, i16* nocapture readnone %A, i16* nocapture readnone %B) #0 {
+entry:
+ %cmp4 = icmp eq i32 %N, 0
+ br i1 %cmp4, label %for.end, label %for.body.preheader
+
+for.body.preheader:
+ %maxval = add i32 %N, -7
+ %0 = icmp sgt i32 %maxval, 0
+ br i1 %0, label %for.body.preheader9, label %for.body.ur.preheader
+
+for.body.preheader9:
+ br label %for.body
+
+for.body:
+ %arrayidx.phi = phi i32* [ %arrayidx.inc.7, %for.body ], [ %C, %for.body.preheader9 ]
+ %i.05 = phi i32 [ %inc.7, %for.body ], [ 0, %for.body.preheader9 ]
+ store i32 %i.05, i32* %arrayidx.phi, align 4
+ %inc = add i32 %i.05, 1
+ %arrayidx.inc = getelementptr i32, i32* %arrayidx.phi, i32 1
+ store i32 %inc, i32* %arrayidx.inc, align 4
+ %inc.1 = add i32 %i.05, 2
+ %arrayidx.inc.1 = getelementptr i32, i32* %arrayidx.phi, i32 2
+ store i32 %inc.1, i32* %arrayidx.inc.1, align 4
+ %inc.2 = add i32 %i.05, 3
+ %arrayidx.inc.2 = getelementptr i32, i32* %arrayidx.phi, i32 3
+ store i32 %inc.2, i32* %arrayidx.inc.2, align 4
+ %inc.3 = add i32 %i.05, 4
+ %arrayidx.inc.3 = getelementptr i32, i32* %arrayidx.phi, i32 4
+ store i32 %inc.3, i32* %arrayidx.inc.3, align 4
+ %inc.4 = add i32 %i.05, 5
+ %arrayidx.inc.4 = getelementptr i32, i32* %arrayidx.phi, i32 5
+ store i32 %inc.4, i32* %arrayidx.inc.4, align 4
+ %inc.5 = add i32 %i.05, 6
+ %arrayidx.inc.5 = getelementptr i32, i32* %arrayidx.phi, i32 6
+ store i32 %inc.5, i32* %arrayidx.inc.5, align 4
+ %inc.6 = add i32 %i.05, 7
+ %arrayidx.inc.6 = getelementptr i32, i32* %arrayidx.phi, i32 7
+ store i32 %inc.6, i32* %arrayidx.inc.6, align 4
+ %inc.7 = add i32 %i.05, 8
+ %exitcond.7 = icmp slt i32 %inc.7, %maxval
+ %arrayidx.inc.7 = getelementptr i32, i32* %arrayidx.phi, i32 8
+ br i1 %exitcond.7, label %for.body, label %for.end.loopexit.ur-lcssa
+
+for.end.loopexit.ur-lcssa:
+ %1 = icmp eq i32 %inc.7, %N
+ br i1 %1, label %for.end, label %for.body.ur.preheader
+
+for.body.ur.preheader:
+ %arrayidx.phi.ur.ph = phi i32* [ %C, %for.body.preheader ], [ %arrayidx.inc.7, %for.end.loopexit.ur-lcssa ]
+ %i.05.ur.ph = phi i32 [ 0, %for.body.preheader ], [ %inc.7, %for.end.loopexit.ur-lcssa ]
+ br label %for.body.ur
+
+for.body.ur:
+ %arrayidx.phi.ur = phi i32* [ %arrayidx.inc.ur, %for.body.ur ], [ %arrayidx.phi.ur.ph, %for.body.ur.preheader ]
+ %i.05.ur = phi i32 [ %inc.ur, %for.body.ur ], [ %i.05.ur.ph, %for.body.ur.preheader ]
+ store i32 %i.05.ur, i32* %arrayidx.phi.ur, align 4
+ %inc.ur = add i32 %i.05.ur, 1
+ %exitcond.ur = icmp eq i32 %inc.ur, %N
+ %arrayidx.inc.ur = getelementptr i32, i32* %arrayidx.phi.ur, i32 1
+ br i1 %exitcond.ur, label %for.end.loopexit, label %for.body.ur
+
+for.end.loopexit:
+ br label %for.end
+
+for.end:
+ ret void
+}