Relax fast register allocator related test cases; NFC
- Relex hard coded registers and stack frame sizes
- Some test cleanups
- Change phi-dbg.ll to match on mir output after phi elimination instead
of going through the whole codegen pipeline.
This is in preparation for https://reviews.llvm.org/D52010
I'm committing all the test changes upfront that work before and after
independently.
llvm-svn: 345532
diff --git a/llvm/test/DebugInfo/X86/sdag-split-arg.ll b/llvm/test/DebugInfo/X86/sdag-split-arg.ll
index 31cb678..745c1c3 100644
--- a/llvm/test/DebugInfo/X86/sdag-split-arg.ll
+++ b/llvm/test/DebugInfo/X86/sdag-split-arg.ll
@@ -1,10 +1,10 @@
; RUN: llc -O0 -filetype=asm %s -o - | FileCheck %s
; Test large integral function arguments passed in multiple registers.
-; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 64 16] $ax
-; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 48 16] $r9w
-; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 32 16] $r10w
-; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 16 16] $r11w
-; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 0 16] $bx
+; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 64 16] ${{([a-d]x)|(si)|(di)|(bp)|(r[0-9]+w)}}
+; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 48 16] ${{([a-d]x)|(si)|(di)|(bp)|(r[0-9]+w)}}
+; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 32 16] ${{([a-d]x)|(si)|(di)|(bp)|(r[0-9]+w)}}
+; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 16 16] ${{([a-d]x)|(si)|(di)|(bp)|(r[0-9]+w)}}
+; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 0 16] ${{([a-d]x)|(si)|(di)|(bp)|(r[0-9]+w)}}
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"