MIR: Support MachineMemOperands without associated value
This is allowed (though used rarely) and useful to keep your tests
short.
llvm-svn: 271752
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index 95b58b7..703c99d 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -883,11 +883,12 @@
assert(Op.isStore() && "Non load machine operand must be a store");
OS << "store ";
}
- OS << Op.getSize() << (Op.isLoad() ? " from " : " into ");
+ OS << Op.getSize();
if (const Value *Val = Op.getValue()) {
+ OS << (Op.isLoad() ? " from " : " into ");
printIRValueReference(*Val);
- } else {
- const PseudoSourceValue *PVal = Op.getPseudoValue();
+ } else if (const PseudoSourceValue *PVal = Op.getPseudoValue()) {
+ OS << (Op.isLoad() ? " from " : " into ");
assert(PVal && "Expected a pseudo source value");
switch (PVal->kind()) {
case PseudoSourceValue::Stack: