Revert "[X86][BMI1] X86DAGToDAGISel: select BEXTR from x << (32 - y) >> (32 - y) pattern"
*Seems* to be breaking sanitizer-x86_64-linux-fast buildbot,
the ELF/relocatable-versioned.s test:
==17758==MemorySanitizer CHECK failed: /b/sanitizer-x86_64-linux-fast/build/llvm/projects/compiler-rt/lib/sanitizer_common/sanitizer_allocator.cc:191 "((kBlockMagic)) == ((((u64*)addr)[0]))" (0x6a6cb03abcebc041, 0x0)
#0 0x59716b in MsanCheckFailed(char const*, int, char const*, unsigned long long, unsigned long long) /b/sanitizer-x86_64-linux-fast/build/llvm/projects/compiler-rt/lib/msan/msan.cc:393
#1 0x586635 in __sanitizer::CheckFailed(char const*, int, char const*, unsigned long long, unsigned long long) /b/sanitizer-x86_64-linux-fast/build/llvm/projects/compiler-rt/lib/sanitizer_common/sanitizer_termination.cc:79
#2 0x57d5ff in __sanitizer::InternalFree(void*, __sanitizer::SizeClassAllocatorLocalCache<__sanitizer::SizeClassAllocator32<__sanitizer::AP32> >*) /b/sanitizer-x86_64-linux-fast/build/llvm/projects/compiler-rt/lib/sanitizer_common/sanitizer_allocator.cc:191
#3 0x7fc21b24193f (/lib/x86_64-linux-gnu/libc.so.6+0x3593f)
#4 0x7fc21b241999 in exit (/lib/x86_64-linux-gnu/libc.so.6+0x35999)
#5 0x7fc21b22c2e7 in __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x202e7)
#6 0x57c039 in _start (/b/sanitizer-x86_64-linux-fast/build/llvm_build_msan/bin/lld+0x57c039)
This reverts commit r345014.
llvm-svn: 345017
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
index 288d87a..d3aa5c8 100644
--- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -2688,10 +2688,6 @@
// c) x & (-1 >> (32 - y))
// d) x << (32 - y) >> (32 - y)
bool X86DAGToDAGISel::matchBitExtract(SDNode *Node) {
- assert(
- (Node->getOpcode() == ISD::AND || Node->getOpcode() == ISD::SRL) &&
- "Should be either an and-mask, or right-shift after clearing high bits.");
-
// BEXTR is BMI instruction, BZHI is BMI2 instruction. We need at least one.
if (!Subtarget->hasBMI() && !Subtarget->hasBMI2())
return false;
@@ -2702,16 +2698,13 @@
if (NVT != MVT::i32 && NVT != MVT::i64)
return false;
- unsigned Size = NVT.getSizeInBits();
-
SDValue NBits;
// If we have BMI2's BZHI, we are ok with muti-use patterns.
// Else, if we only have BMI1's BEXTR, we require one-use.
const bool CanHaveExtraUses = Subtarget->hasBMI2();
- auto checkOneUse = [CanHaveExtraUses](SDValue Op, unsigned NUses = 1) {
- return CanHaveExtraUses ||
- Op.getNode()->hasNUsesOfValue(NUses, Op.getResNo());
+ auto checkOneUse = [CanHaveExtraUses](SDValue Op) {
+ return CanHaveExtraUses || Op.hasOneUse();
};
// a) x & ((1 << nbits) + (-1))
@@ -2747,73 +2740,31 @@
return true;
};
- SDValue X;
-
- // d) x << (32 - y) >> (32 - y)
- auto matchPatternD = [&checkOneUse, Size, &X, &NBits](SDNode *Node) -> bool {
- if (Node->getOpcode() != ISD::SRL)
- return false;
- SDValue N0 = Node->getOperand(0);
- if (N0->getOpcode() != ISD::SHL || !checkOneUse(N0))
- return false;
- SDValue N1 = Node->getOperand(1);
- SDValue N01 = N0->getOperand(1);
- // Both of the shifts must be by the exact same value.
- // There should not be any uses of the shift amount outside of the pattern.
- if (N1 != N01 || !checkOneUse(N1, 2))
- return false;
- // Skip over a truncate of the shift amount.
- if (N1->getOpcode() == ISD::TRUNCATE) {
- N1 = N1->getOperand(0);
- // The trunc should have been the only user of the real shift amount.
- if (!checkOneUse(N1))
- return false;
- }
- // Match the shift amount as: (bitwidth - y). It should go away, too.
- if (N1.getOpcode() != ISD::SUB)
- return false;
- auto N10 = dyn_cast<ConstantSDNode>(N1.getOperand(0));
- if (!N10 || N10->getZExtValue() != Size)
- return false;
- X = N0->getOperand(0);
- NBits = N1.getOperand(1);
- return true;
- };
-
auto matchLowBitMask = [&matchPatternA,
&matchPatternB](SDValue Mask) -> bool {
- // FIXME: pattern c.
+ // FIXME: patterns c, d.
return matchPatternA(Mask) || matchPatternB(Mask);
};
- if (Node->getOpcode() == ISD::AND) {
- X = Node->getOperand(0);
- SDValue Mask = Node->getOperand(1);
+ SDValue X = Node->getOperand(0);
+ SDValue Mask = Node->getOperand(1);
- if (matchLowBitMask(Mask)) {
- // Great.
- } else {
- std::swap(X, Mask);
- if (!matchLowBitMask(Mask))
- return false;
- }
- } else if (!matchPatternD(Node))
- return false;
+ if (matchLowBitMask(Mask)) {
+ // Great.
+ } else {
+ std::swap(X, Mask);
+ if (!matchLowBitMask(Mask))
+ return false;
+ }
SDLoc DL(Node);
- SDValue OrigNBits = NBits;
- // Do we need to truncate the shift amount?
- if (NBits.getValueType() != MVT::i8) {
- NBits = CurDAG->getNode(ISD::TRUNCATE, DL, MVT::i8, NBits);
- insertDAGNode(*CurDAG, OrigNBits, NBits);
- }
-
// Insert 8-bit NBits into lowest 8 bits of NVT-sized (32 or 64-bit) register.
// All the other bits are undefined, we do not care about them.
SDValue ImplDef =
SDValue(CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, DL, NVT), 0);
insertDAGNode(*CurDAG, NBits, ImplDef);
+ SDValue OrigNBits = NBits;
NBits = CurDAG->getTargetInsertSubreg(X86::sub_8bit, DL, NVT, ImplDef, NBits);
insertDAGNode(*CurDAG, OrigNBits, NBits);
@@ -3012,8 +2963,17 @@
if (ShiftAmt->getOpcode() == ISD::TRUNCATE)
ShiftAmt = ShiftAmt->getOperand(0);
- // This function is called after X86DAGToDAGISel::matchBitExtract(),
- // so we are not afraid that we might mess up BZHI/BEXTR pattern.
+ // Special case to avoid messing up a BZHI pattern.
+ // Look for (srl (shl X, (size - y)), (size - y)
+ if (Subtarget->hasBMI2() && (VT == MVT::i32 || VT == MVT::i64) &&
+ N->getOpcode() == ISD::SRL && N->getOperand(0).getOpcode() == ISD::SHL &&
+ // Shift amounts the same?
+ N->getOperand(1) == N->getOperand(0).getOperand(1) &&
+ // Shift amounts size - y?
+ ShiftAmt.getOpcode() == ISD::SUB &&
+ isa<ConstantSDNode>(ShiftAmt.getOperand(0)) &&
+ cast<ConstantSDNode>(ShiftAmt.getOperand(0))->getZExtValue() == Size)
+ return false;
SDValue NewShiftAmt;
if (ShiftAmt->getOpcode() == ISD::ADD || ShiftAmt->getOpcode() == ISD::SUB) {
@@ -3212,9 +3172,6 @@
}
case ISD::SRL:
- if (matchBitExtract(Node))
- return;
- LLVM_FALLTHROUGH;
case ISD::SRA:
case ISD::SHL:
if (tryShiftAmountMod(Node))