commit c2f8911114c82c8c29a17c2516635cd9ef627785
author Vikram S. Adve <vadve@cs.uiuc.edu> Thu Nov 08 05:15:08 2001 +0000
committer Vikram S. Adve <vadve@cs.uiuc.edu> Thu Nov 08 05:15:08 2001 +0000
tree 788fe1ff22ac382ebf88b3ef7e67fcc030d92fe5
parent 81908213ae2b1213441c448fd66d24e06f888f10

Add handle to TargetMachine object in all Machine...Info classes.

llvm-svn: 1197

llvm/lib/Target/TargetSchedInfo.cpp

diff --git a/llvm/lib/Target/TargetSchedInfo.cpp b/llvm/lib/Target/TargetSchedInfo.cpp
index 14ac057..f9dca29 100644
--- a/llvm/lib/Target/TargetSchedInfo.cpp
+++ b/llvm/lib/Target/TargetSchedInfo.cpp
@@ -78,14 +78,15 @@
 //	Interface to machine description for instruction scheduling
 //---------------------------------------------------------------------------
 
-MachineSchedInfo::MachineSchedInfo(int                     NumSchedClasses,
-                                   const MachineInstrInfo* Mii,
+MachineSchedInfo::MachineSchedInfo(const TargetMachine&    tgt,
+                                   int                     NumSchedClasses,
                                    const InstrClassRUsage* ClassRUsages,
                                    const InstrRUsageDelta* UsageDeltas,
                                    const InstrIssueDelta*  IssueDeltas,
                                    unsigned int		   NumUsageDeltas,
                                    unsigned int		   NumIssueDeltas)
-  : numSchedClasses(NumSchedClasses), mii(Mii),
+  : target(tgt),
+    numSchedClasses(NumSchedClasses), mii(& tgt.getInstrInfo()),
     classRUsages(ClassRUsages), usageDeltas(UsageDeltas),
     issueDeltas(IssueDeltas), numUsageDeltas(NumUsageDeltas),
     numIssueDeltas(NumIssueDeltas)