Bug fixes and updates for CellSPU, syncing up with trunk. Most notable
fixes are target-specific lowering of frame indices, fix constants generated
for the FSMBI instruction, and fixing SPUTargetLowering::computeMaskedBitsFor-
TargetNode().
llvm-svn: 50462
diff --git a/llvm/lib/Target/CellSPU/SPUFrameInfo.h b/llvm/lib/Target/CellSPU/SPUFrameInfo.h
index 99136c2..e8ca333 100644
--- a/llvm/lib/Target/CellSPU/SPUFrameInfo.h
+++ b/llvm/lib/Target/CellSPU/SPUFrameInfo.h
@@ -57,6 +57,10 @@
static int fullSpillSize() {
return (SPURegisterInfo::getNumArgRegs() * stackSlotSize());
}
+ //! Convert frame index to stack offset
+ static int FItoStackOffset(int frame_index) {
+ return frame_index * stackSlotSize();
+ }
//! Number of instructions required to overcome hint-for-branch latency
/*!
HBR (hint-for-branch) instructions can be inserted when, for example,