commit c40de480418dae6cd11df64528c0074229e83769
author Daniel Sanders <daniel.sanders@imgtec.com> Tue Sep 15 13:46:21 2015 +0000
committer Daniel Sanders <daniel.sanders@imgtec.com> Tue Sep 15 13:46:21 2015 +0000
tree b6ad2b016790cd1963f00068aa8a75f2a0990cea
parent d1062bbd893a43004a19a65c414b0453cf3ca04d

Revert r247684 - Replace Triple with a new TargetTuple ...

LLDB needs to be updated in the same commit.

llvm-svn: 247686

llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp

diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
index 16dbd2b..b729156 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
@@ -309,9 +309,8 @@
   // Return the thread-pointer register's encoding.
   Fixups.push_back(MCFixup::create(0, MO.getExpr(),
                                    (MCFixupKind)PPC::fixup_ppc_nofixup));
-  const TargetTuple &TT = STI.getTargetTuple();
-  bool isPPC64 = TT.getArch() == TargetTuple::ppc64 ||
-                 TT.getArch() == TargetTuple::ppc64le;
+  const Triple &TT = STI.getTargetTriple();
+  bool isPPC64 = TT.getArch() == Triple::ppc64 || TT.getArch() == Triple::ppc64le;
   return CTX.getRegisterInfo()->getEncodingValue(isPPC64 ? PPC::X13 : PPC::R2);
 }