| commit | 02772499551ada7e72fa83515e563e770020ba55 | [log] [tgz] |
|---|---|---|
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | Mon Jul 15 21:15:20 2019 +0000 |
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | Mon Jul 15 21:15:20 2019 +0000 |
| tree | ca73b781bf05c2e937d98a6d1a7b97d39b8f73dc | |
| parent | d00d8578016520a4113c6930a2a6053785e66eac [diff] |
TableGen/GlobalISel: Fix handling of truncstore patterns This was failing to import the AMDGPU truncstore patterns. The truncating stores from 32-bit to 8/16 were then somehow being incorrectly selected to a 4-byte store. A separate check is emitted for the LLT size in comparison to the specific memory VT, which looks strange to me but makes sense based on the hierarchy of PatFrags used for the default truncstore PatFrags. llvm-svn: 366129