commit c544cb0ecab3a54eec7e385b7b9458e40dc49bfd
author Evan Cheng <evan.cheng@apple.com> Tue Jan 20 19:12:24 2009 +0000
committer Evan Cheng <evan.cheng@apple.com> Tue Jan 20 19:12:24 2009 +0000
tree de996c960e7e54b9d08871e3d9f1cccff77debff
parent 1ce41edd8da47d7c438c18a819ced3237a2f49f7

Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well.

llvm-svn: 62600

llvm/lib/Target/IA64/IA64InstrInfo.cpp

diff --git a/llvm/lib/Target/IA64/IA64InstrInfo.cpp b/llvm/lib/Target/IA64/IA64InstrInfo.cpp
index 0a13c68..a3009b2 100644
--- a/llvm/lib/Target/IA64/IA64InstrInfo.cpp
+++ b/llvm/lib/Target/IA64/IA64InstrInfo.cpp
@@ -26,8 +26,11 @@
 
 
 bool IA64InstrInfo::isMoveInstr(const MachineInstr& MI,
-                               unsigned& sourceReg,
-                               unsigned& destReg) const {
+                                unsigned& sourceReg,
+                                unsigned& destReg,
+                                unsigned& SrcSR, unsigned& DstSR) const {
+  SrcSR = DstSR = 0;  // No sub-registers.
+
   unsigned oc = MI.getOpcode();
   if (oc == IA64::MOV || oc == IA64::FMOV) {
   // TODO: this doesn't detect predicate moves