commit c59a2d0529e289400ad57a8ae25c11272f07a13d
author Lang Hames <lhames@gmail.com> Wed Apr 02 23:57:49 2014 +0000
committer Lang Hames <lhames@gmail.com> Wed Apr 02 23:57:49 2014 +0000
tree 77c823c1f4d636785a3dab5b0dcc8e7e9f8ebe64
parent 987cbaa09b0f93ae5765947ed5c99e84a8936941

[X86] As per suggestion from Craig Topper and Hal Finkel, override
TargetInstrInfo::findCommutedOpIndices to enable VFMA*231 commutation, rather
than abusing commuteInstruction.

Thanks very much for the suggestion guys!

llvm-svn: 205489

llvm/lib/Target/X86/X86InstrInfo.cpp

diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 10c62ad..6450f2a 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -2457,52 +2457,48 @@
       NewMI = false;
     }
     MI->setDesc(get(Opc));
-    return TargetInstrInfo::commuteInstruction(MI, NewMI);
-  }
-  case X86::VFMADDPDr231r:
-  case X86::VFMADDPSr231r:
-  case X86::VFMADDSDr231r:
-  case X86::VFMADDSSr231r:
-  case X86::VFMSUBPDr231r:
-  case X86::VFMSUBPSr231r:
-  case X86::VFMSUBSDr231r:
-  case X86::VFMSUBSSr231r:
-  case X86::VFNMADDPDr231r:
-  case X86::VFNMADDPSr231r:
-  case X86::VFNMADDSDr231r:
-  case X86::VFNMADDSSr231r:
-  case X86::VFNMSUBPDr231r:
-  case X86::VFNMSUBPSr231r:
-  case X86::VFNMSUBSDr231r:
-  case X86::VFNMSUBSSr231r:
-  case X86::VFMADDPDr231rY:
-  case X86::VFMADDPSr231rY:
-  case X86::VFMSUBPDr231rY:
-  case X86::VFMSUBPSr231rY:
-  case X86::VFNMADDPDr231rY:
-  case X86::VFNMADDPSr231rY:
-  case X86::VFNMSUBPDr231rY:
-  case X86::VFNMSUBPSr231rY: {
-    MachineOperand &O2 = MI->getOperand(2);
-    MachineOperand &O3 = MI->getOperand(3);
-    assert(O2.isReg() && O3.isReg() &&
-           "Can't commute memory operands.");
-    unsigned O2Reg = O2.getReg();
-    unsigned O2SubReg = O2.getSubReg();
-    bool O2IsKill = O2.isKill();
-    O2.setReg(O3.getReg());
-    O2.setSubReg(O3.getSubReg());
-    O2.setIsKill(O3.isKill());
-    O3.setReg(O2Reg);
-    O3.setSubReg(O2SubReg);
-    O3.setIsKill(O2IsKill);
-    return MI;
+    // Fallthrough intended.
   }
   default:
     return TargetInstrInfo::commuteInstruction(MI, NewMI);
   }
 }
 
+bool X86InstrInfo::findCommutedOpIndices(MachineInstr *MI, unsigned &SrcOpIdx1,
+                                         unsigned &SrcOpIdx2) const {
+  switch (MI->getOpcode()) {
+    case X86::VFMADDPDr231r:
+    case X86::VFMADDPSr231r:
+    case X86::VFMADDSDr231r:
+    case X86::VFMADDSSr231r:
+    case X86::VFMSUBPDr231r:
+    case X86::VFMSUBPSr231r:
+    case X86::VFMSUBSDr231r:
+    case X86::VFMSUBSSr231r:
+    case X86::VFNMADDPDr231r:
+    case X86::VFNMADDPSr231r:
+    case X86::VFNMADDSDr231r:
+    case X86::VFNMADDSSr231r:
+    case X86::VFNMSUBPDr231r:
+    case X86::VFNMSUBPSr231r:
+    case X86::VFNMSUBSDr231r:
+    case X86::VFNMSUBSSr231r:
+    case X86::VFMADDPDr231rY:
+    case X86::VFMADDPSr231rY:
+    case X86::VFMSUBPDr231rY:
+    case X86::VFMSUBPSr231rY:
+    case X86::VFNMADDPDr231rY:
+    case X86::VFNMADDPSr231rY:
+    case X86::VFNMSUBPDr231rY:
+    case X86::VFNMSUBPSr231rY:
+      SrcOpIdx1 = 2;
+      SrcOpIdx2 = 3;
+      return true;
+    default:
+      return TargetInstrInfo::findCommutedOpIndices(MI, SrcOpIdx1, SrcOpIdx2);
+  }
+}
+
 static X86::CondCode getCondFromBranchOpc(unsigned BrOpc) {
   switch (BrOpc) {
   default: return X86::COND_INVALID;

llvm/lib/Target/X86/X86InstrInfo.h

diff --git a/llvm/lib/Target/X86/X86InstrInfo.h b/llvm/lib/Target/X86/X86InstrInfo.h
index 9eaf6c1..156291e 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.h
+++ b/llvm/lib/Target/X86/X86InstrInfo.h
@@ -229,6 +229,9 @@
   ///
   MachineInstr *commuteInstruction(MachineInstr *MI, bool NewMI) const override;
 
+  bool findCommutedOpIndices(MachineInstr *MI, unsigned &SrcOpIdx1,
+                             unsigned &SrcOpIdx2) const override;
+
   // Branch analysis.
   bool isUnpredicatedTerminator(const MachineInstr* MI) const override;
   bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,