[WebAssembly][NFC] Remove WebAssemblyStackifier TableGen backend
Summary:
Replace its functionality with a TableGen InstrInfo relational
instruction mapping. Although arguably more complex than the TableGen
backend, the relational mapping is a smaller maintenance burden than a
TableGen backend.
Reviewers: aardappel, aheejin, dschuff
Subscribers: mgorny, sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D53307
llvm-svn: 344962
diff --git a/llvm/utils/TableGen/CMakeLists.txt b/llvm/utils/TableGen/CMakeLists.txt
index 5ac3eca..0428249 100644
--- a/llvm/utils/TableGen/CMakeLists.txt
+++ b/llvm/utils/TableGen/CMakeLists.txt
@@ -46,7 +46,6 @@
X86ModRMFilters.cpp
X86RecognizableInstr.cpp
WebAssemblyDisassemblerEmitter.cpp
- WebAssemblyStackifierEmitter.cpp
CTagsEmitter.cpp
)
set_target_properties(llvm-tblgen PROPERTIES FOLDER "Tablegenning")
diff --git a/llvm/utils/TableGen/TableGen.cpp b/llvm/utils/TableGen/TableGen.cpp
index 9e526b6..b782606 100644
--- a/llvm/utils/TableGen/TableGen.cpp
+++ b/llvm/utils/TableGen/TableGen.cpp
@@ -53,7 +53,6 @@
GenX86EVEX2VEXTables,
GenX86FoldTables,
GenRegisterBank,
- GenWebAssemblyStackifier,
};
namespace {
@@ -118,9 +117,7 @@
clEnumValN(GenX86FoldTables, "gen-x86-fold-tables",
"Generate X86 fold tables"),
clEnumValN(GenRegisterBank, "gen-register-bank",
- "Generate registers bank descriptions"),
- clEnumValN(GenWebAssemblyStackifier, "gen-wasm-stackifier",
- "Generate WebAssembly stackification cases")));
+ "Generate registers bank descriptions")));
cl::OptionCategory PrintEnumsCat("Options for -print-enums");
cl::opt<std::string>
@@ -234,9 +231,6 @@
case GenX86FoldTables:
EmitX86FoldTables(Records, OS);
break;
- case GenWebAssemblyStackifier:
- EmitWebAssemblyStackifier(Records, OS);
- break;
}
return false;
diff --git a/llvm/utils/TableGen/TableGenBackends.h b/llvm/utils/TableGen/TableGenBackends.h
index f7ed5cc..1329a6d 100644
--- a/llvm/utils/TableGen/TableGenBackends.h
+++ b/llvm/utils/TableGen/TableGenBackends.h
@@ -89,7 +89,6 @@
void EmitX86EVEX2VEXTables(RecordKeeper &RK, raw_ostream &OS);
void EmitX86FoldTables(RecordKeeper &RK, raw_ostream &OS);
void EmitRegisterBank(RecordKeeper &RK, raw_ostream &OS);
-void EmitWebAssemblyStackifier(RecordKeeper &RK, raw_ostream &OS);
} // End llvm namespace
diff --git a/llvm/utils/TableGen/WebAssemblyDisassemblerEmitter.cpp b/llvm/utils/TableGen/WebAssemblyDisassemblerEmitter.cpp
index f9c3cb1..a8edfdc 100644
--- a/llvm/utils/TableGen/WebAssemblyDisassemblerEmitter.cpp
+++ b/llvm/utils/TableGen/WebAssemblyDisassemblerEmitter.cpp
@@ -42,12 +42,13 @@
auto Prefix = Opc >> 8;
Opc = Opc & 0xFF;
auto &CGIP = OpcodeTable[Prefix][Opc];
- // All wasm instructions have a StackBased fieldof type bit, we only want
- // the instructions for which this is 1.
- auto Bit = Def.getValue("StackBased")->getValue()->
- getCastTo(BitRecTy::get());
- auto IsStackBased = Bit && reinterpret_cast<const BitInit *>(Bit)
- ->getValue();
+ // All wasm instructions have a StackBased field of type string, we only
+ // want the instructions for which this is "true".
+ auto StackString =
+ Def.getValue("StackBased")->getValue()->getCastTo(StringRecTy::get());
+ auto IsStackBased =
+ StackString &&
+ reinterpret_cast<const StringInit *>(StackString)->getValue() == "true";
if (IsStackBased && !CGIP.second) {
// this picks the first of many typed variants, which is
// currently the except_ref one, though this shouldn't matter for
diff --git a/llvm/utils/TableGen/WebAssemblyStackifierEmitter.cpp b/llvm/utils/TableGen/WebAssemblyStackifierEmitter.cpp
deleted file mode 100644
index 0b9741d..0000000
--- a/llvm/utils/TableGen/WebAssemblyStackifierEmitter.cpp
+++ /dev/null
@@ -1,44 +0,0 @@
-//===- WebAssemblyStackifierEmitter.cpp - Stackifier cases ------*- C++ -*-===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file emits the switch statement cases to translate WebAssembly
-// instructions to their stack forms.
-//
-//===----------------------------------------------------------------------===//
-
-#include "WebAssemblyDisassemblerEmitter.h"
-#include "llvm/TableGen/Record.h"
-
-namespace llvm {
-
-// Find all register WebAssembly instructions and their corresponding stack
-// instructions. For each pair, emit a switch case of the form
-//
-// case WebAssembly::RegisterInstr: return WebAssembly::StackInstr;
-//
-// For example,
-//
-// case WebAssembly::ADD_I32: return WebAssembly::ADD_I32_S;
-//
-// This is useful for converting instructions from their register form to their
-// equivalent stack form.
-void EmitWebAssemblyStackifier(RecordKeeper &RK, raw_ostream &OS) {
- Record *InstrClass = RK.getClass("WebAssemblyInst");
- for (auto &RecordPair : RK.getDefs()) {
- if (!RecordPair.second->isSubClassOf(InstrClass))
- continue;
- bool IsStackBased = RecordPair.second->getValueAsBit("StackBased");
- if (IsStackBased)
- continue;
- OS << " case WebAssembly::" << RecordPair.first << ": return "
- << "WebAssembly::" << RecordPair.first << "_S;\n";
- }
-}
-
-} // namespace llvm