When printing MIR, output to errs() rather than outs().
Summary:
Without this, this command
$ llvm-run llc -stop-after machine-cp -o - <( echo '' )
outputs an error, because we close stdout twice -- once when closing the
file opened for "-o", and again when closing outs().
Also clarify in the outs() definition that you can't ever call it if you
want to open your own raw_fd_ostream on stdout.
Reviewers: jroelofs, tstellarAMD
Subscribers: jholewinski, qcolombet, dsanders, llvm-commits
Differential Revision: http://reviews.llvm.org/D17422
llvm-svn: 261286
diff --git a/llvm/test/CodeGen/AArch64/branch-folder-merge-mmos.ll b/llvm/test/CodeGen/AArch64/branch-folder-merge-mmos.ll
index 3f9c023..bca3696 100644
--- a/llvm/test/CodeGen/AArch64/branch-folder-merge-mmos.ll
+++ b/llvm/test/CodeGen/AArch64/branch-folder-merge-mmos.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=aarch64 -mtriple=aarch64-none-linux-gnu -stop-after branch-folder -o /dev/null < %s | FileCheck %s
+; RUN: llc -march=aarch64 -mtriple=aarch64-none-linux-gnu -stop-after branch-folder -o /dev/null < %s 2>&1 | FileCheck %s
target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
; Function Attrs: norecurse nounwind
diff --git a/llvm/test/CodeGen/AArch64/stackmap-frame-setup.ll b/llvm/test/CodeGen/AArch64/stackmap-frame-setup.ll
index 4712012..83d56c1 100644
--- a/llvm/test/CodeGen/AArch64/stackmap-frame-setup.ll
+++ b/llvm/test/CodeGen/AArch64/stackmap-frame-setup.ll
@@ -1,5 +1,5 @@
-; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=aarch64-apple-darwin -stop-after machine-sink %s | FileCheck %s --check-prefix=ISEL
-; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s | FileCheck %s --check-prefix=FAST-ISEL
+; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=aarch64-apple-darwin -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=ISEL
+; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=FAST-ISEL
define void @caller_meta_leaf() {
entry:
diff --git a/llvm/test/CodeGen/ARM/thumb1-ldst-opt.ll b/llvm/test/CodeGen/ARM/thumb1-ldst-opt.ll
index eb82385..bb55d2ac 100644
--- a/llvm/test/CodeGen/ARM/thumb1-ldst-opt.ll
+++ b/llvm/test/CodeGen/ARM/thumb1-ldst-opt.ll
@@ -1,4 +1,4 @@
-; RUN: llc -stop-after block-placement -o /dev/null %s | FileCheck %s
+; RUN: llc -stop-after block-placement -o /dev/null %s 2>&1 | FileCheck %s
target triple = "thumbv6m-none-none"
diff --git a/llvm/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir b/llvm/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir
index cf7572e..38bf615 100644
--- a/llvm/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir
+++ b/llvm/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the .cfi_def_cfa operands
# correctly.
diff --git a/llvm/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir b/llvm/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir
index e23a352..a67595b 100644
--- a/llvm/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir
+++ b/llvm/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser can parse multiple register machine
# operands before '='.
diff --git a/llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir b/llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir
index 9471516..0ed2d78 100644
--- a/llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir
+++ b/llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
--- |
@var = global i64 0
diff --git a/llvm/test/CodeGen/MIR/AArch64/target-flags.mir b/llvm/test/CodeGen/MIR/AArch64/target-flags.mir
index e96fce7..b5b001e 100644
--- a/llvm/test/CodeGen/MIR/AArch64/target-flags.mir
+++ b/llvm/test/CodeGen/MIR/AArch64/target-flags.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
--- |
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/target-index-operands.mir b/llvm/test/CodeGen/MIR/AMDGPU/target-index-operands.mir
index 839fd32..d06040c 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/target-index-operands.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/target-index-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=amdgcn -mcpu=SI -start-after postrapseudos -stop-after postrapseudos -o /dev/null %s | FileCheck %s
+# RUN: llc -march=amdgcn -mcpu=SI -start-after postrapseudos -stop-after postrapseudos -o /dev/null %s 2>&1 | FileCheck %s
# This test verifies that the MIR parser can parse target index operands.
--- |
diff --git a/llvm/test/CodeGen/MIR/ARM/bundled-instructions.mir b/llvm/test/CodeGen/MIR/ARM/bundled-instructions.mir
index 814c4e1..d8086ae 100644
--- a/llvm/test/CodeGen/MIR/ARM/bundled-instructions.mir
+++ b/llvm/test/CodeGen/MIR/ARM/bundled-instructions.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple thumbv7-apple-ios -start-after block-placement -stop-after block-placement -o /dev/null %s | FileCheck %s
+# RUN: llc -mtriple thumbv7-apple-ios -start-after block-placement -stop-after block-placement -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the bundled machine instructions
# and 'internal' register flags correctly.
diff --git a/llvm/test/CodeGen/MIR/ARM/cfi-same-value.mir b/llvm/test/CodeGen/MIR/ARM/cfi-same-value.mir
index f9850ab..df2a817 100644
--- a/llvm/test/CodeGen/MIR/ARM/cfi-same-value.mir
+++ b/llvm/test/CodeGen/MIR/ARM/cfi-same-value.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=arm-linux-unknown-gnueabi -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -mtriple=arm-linux-unknown-gnueabi -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
--- |
declare void @dummy_use(i32*, i32)
diff --git a/llvm/test/CodeGen/MIR/Generic/basic-blocks.mir b/llvm/test/CodeGen/MIR/Generic/basic-blocks.mir
index 22f8d28..fed2af7 100644
--- a/llvm/test/CodeGen/MIR/Generic/basic-blocks.mir
+++ b/llvm/test/CodeGen/MIR/Generic/basic-blocks.mir
@@ -1,4 +1,4 @@
-# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses machine functions correctly.
--- |
diff --git a/llvm/test/CodeGen/MIR/Generic/frame-info.mir b/llvm/test/CodeGen/MIR/Generic/frame-info.mir
index 6e4e395..d6424fb 100644
--- a/llvm/test/CodeGen/MIR/Generic/frame-info.mir
+++ b/llvm/test/CodeGen/MIR/Generic/frame-info.mir
@@ -1,4 +1,4 @@
-# RUN: llc -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s
+# RUN: llc -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses machine frame info properties
# correctly.
diff --git a/llvm/test/CodeGen/MIR/Generic/llvmIR.mir b/llvm/test/CodeGen/MIR/Generic/llvmIR.mir
index c7a220a..293da9f 100644
--- a/llvm/test/CodeGen/MIR/Generic/llvmIR.mir
+++ b/llvm/test/CodeGen/MIR/Generic/llvmIR.mir
@@ -1,4 +1,4 @@
-# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the LLVM IR that's embedded with MIR is parsed
# correctly.
diff --git a/llvm/test/CodeGen/MIR/Generic/llvmIRMissing.mir b/llvm/test/CodeGen/MIR/Generic/llvmIRMissing.mir
index afa9601..78c8786 100644
--- a/llvm/test/CodeGen/MIR/Generic/llvmIRMissing.mir
+++ b/llvm/test/CodeGen/MIR/Generic/llvmIRMissing.mir
@@ -1,4 +1,4 @@
-# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 2>&1 | FileCheck %s
# This test ensures that the MIR parser accepts files without the LLVM IR.
---
diff --git a/llvm/test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir b/llvm/test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir
index d6ecd5d..26834bb 100644
--- a/llvm/test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir
+++ b/llvm/test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir
@@ -1,4 +1,4 @@
-# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 2>&1 | FileCheck %s
# This test ensures that the MIR parser preserves unnamed LLVM IR block
# references.
diff --git a/llvm/test/CodeGen/MIR/Generic/machine-function.mir b/llvm/test/CodeGen/MIR/Generic/machine-function.mir
index 1c4ca3d..702c498 100644
--- a/llvm/test/CodeGen/MIR/Generic/machine-function.mir
+++ b/llvm/test/CodeGen/MIR/Generic/machine-function.mir
@@ -1,4 +1,4 @@
-# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses machine functions correctly.
--- |
diff --git a/llvm/test/CodeGen/MIR/Generic/register-info.mir b/llvm/test/CodeGen/MIR/Generic/register-info.mir
index 229cf0f..14ca734 100644
--- a/llvm/test/CodeGen/MIR/Generic/register-info.mir
+++ b/llvm/test/CodeGen/MIR/Generic/register-info.mir
@@ -1,4 +1,4 @@
-# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses machine register info properties
# correctly.
diff --git a/llvm/test/CodeGen/MIR/Mips/memory-operands.mir b/llvm/test/CodeGen/MIR/Mips/memory-operands.mir
index d4206b0..deb312f 100644
--- a/llvm/test/CodeGen/MIR/Mips/memory-operands.mir
+++ b/llvm/test/CodeGen/MIR/Mips/memory-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the call entry pseudo source
# values in memory operands correctly.
diff --git a/llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir b/llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
index 18866d5..00051ab 100644
--- a/llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
+++ b/llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=nvptx -mcpu=sm_20 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=nvptx -mcpu=sm_20 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses floating point constant operands
# correctly.
diff --git a/llvm/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir b/llvm/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir
index 39d14e7..eee8ca5 100644
--- a/llvm/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir
+++ b/llvm/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=powerpc64-unknown-linux-gnu -start-after machine-combiner -stop-after machine-combiner -o /dev/null %s | FileCheck %s
+# RUN: llc -mtriple=powerpc64-unknown-linux-gnu -start-after machine-combiner -stop-after machine-combiner -o /dev/null %s 2>&1 | FileCheck %s
# PR24724
--- |
diff --git a/llvm/test/CodeGen/MIR/X86/basic-block-liveins.mir b/llvm/test/CodeGen/MIR/X86/basic-block-liveins.mir
index 0073297..20d2ff3 100644
--- a/llvm/test/CodeGen/MIR/X86/basic-block-liveins.mir
+++ b/llvm/test/CodeGen/MIR/X86/basic-block-liveins.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses basic block liveins correctly.
--- |
diff --git a/llvm/test/CodeGen/MIR/X86/block-address-operands.mir b/llvm/test/CodeGen/MIR/X86/block-address-operands.mir
index 3c2d2ae..7af8997 100644
--- a/llvm/test/CodeGen/MIR/X86/block-address-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/block-address-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the block address operands
# correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/callee-saved-info.mir b/llvm/test/CodeGen/MIR/X86/callee-saved-info.mir
index 17c7739..772d03b 100644
--- a/llvm/test/CodeGen/MIR/X86/callee-saved-info.mir
+++ b/llvm/test/CodeGen/MIR/X86/callee-saved-info.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after prologepilog -stop-after prologepilog -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after prologepilog -stop-after prologepilog -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses callee saved information in the
# stack objects correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir b/llvm/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir
index 47051a5..d143b37 100644
--- a/llvm/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir
+++ b/llvm/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the .cfi_def_cfa_offset operands
# correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir b/llvm/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir
index 74a33b5..fe2e32c 100644
--- a/llvm/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir
+++ b/llvm/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the .cfi_def_cfa_register
# operands correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/cfi-offset.mir b/llvm/test/CodeGen/MIR/X86/cfi-offset.mir
index fd9e605..6ad1ac2 100644
--- a/llvm/test/CodeGen/MIR/X86/cfi-offset.mir
+++ b/llvm/test/CodeGen/MIR/X86/cfi-offset.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the .cfi_offset operands
# correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/constant-pool.mir b/llvm/test/CodeGen/MIR/X86/constant-pool.mir
index 213e4e2..31bb719 100644
--- a/llvm/test/CodeGen/MIR/X86/constant-pool.mir
+++ b/llvm/test/CodeGen/MIR/X86/constant-pool.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses constant pool constants and
# constant pool operands correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/dead-register-flag.mir b/llvm/test/CodeGen/MIR/X86/dead-register-flag.mir
index 309e776..91c0716 100644
--- a/llvm/test/CodeGen/MIR/X86/dead-register-flag.mir
+++ b/llvm/test/CodeGen/MIR/X86/dead-register-flag.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the 'dead' register flags
# correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir b/llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir
index 4dc442e..463d17c 100644
--- a/llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir
+++ b/llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the 'early-clobber' register
# flags correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/external-symbol-operands.mir b/llvm/test/CodeGen/MIR/X86/external-symbol-operands.mir
index 7e85d94..231acfa 100644
--- a/llvm/test/CodeGen/MIR/X86/external-symbol-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/external-symbol-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the external symbol machine
# operands correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir b/llvm/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir
index 75d0f8a..af7d579 100644
--- a/llvm/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses fixed stack memory operands
# correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir b/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir
index 70e5a74..15cfdb6 100644
--- a/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir
+++ b/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses fixed stack objects correctly.
--- |
diff --git a/llvm/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir b/llvm/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir
index 54fa8ad..8477b1f 100644
--- a/llvm/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir
+++ b/llvm/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -enable-shrink-wrap=true -start-after shrink-wrap -stop-after shrink-wrap -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -enable-shrink-wrap=true -start-after shrink-wrap -stop-after shrink-wrap -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the save and restore points in
# the machine frame info correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir b/llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir
index c8fa3bb..bce371c 100644
--- a/llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir
+++ b/llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the stack protector stack
# object reference in the machine frame info correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir b/llvm/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
index 87c1fc6..e871841 100644
--- a/llvm/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
+++ b/llvm/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the frame setup instruction flag.
--- |
diff --git a/llvm/test/CodeGen/MIR/X86/function-liveins.mir b/llvm/test/CodeGen/MIR/X86/function-liveins.mir
index 95f8786..6da44b2 100644
--- a/llvm/test/CodeGen/MIR/X86/function-liveins.mir
+++ b/llvm/test/CodeGen/MIR/X86/function-liveins.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses machine function's liveins
# correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/global-value-operands.mir b/llvm/test/CodeGen/MIR/X86/global-value-operands.mir
index 394aa39..7287b62 100644
--- a/llvm/test/CodeGen/MIR/X86/global-value-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/global-value-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses global value operands correctly.
--- |
diff --git a/llvm/test/CodeGen/MIR/X86/immediate-operands.mir b/llvm/test/CodeGen/MIR/X86/immediate-operands.mir
index 34bd0fa..2f4c442 100644
--- a/llvm/test/CodeGen/MIR/X86/immediate-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/immediate-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses immediate machine operands.
--- |
diff --git a/llvm/test/CodeGen/MIR/X86/implicit-register-flag.mir b/llvm/test/CodeGen/MIR/X86/implicit-register-flag.mir
index b0a15ed..83e2dde 100644
--- a/llvm/test/CodeGen/MIR/X86/implicit-register-flag.mir
+++ b/llvm/test/CodeGen/MIR/X86/implicit-register-flag.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the 'implicit' and 'implicit-def'
# register flags correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir b/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir
index 3fd5658..5198511 100644
--- a/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir
+++ b/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after block-placement -stop-after block-placement -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after block-placement -stop-after block-placement -o /dev/null %s 2>&1 | FileCheck %s
--- |
define i64 @test(i64 %x, i64 %y) #0 {
diff --git a/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir b/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir
index ea2cdbf..3bd5f79 100644
--- a/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir
+++ b/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the machine instruction's
# debug location metadata correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/jump-table-info.mir b/llvm/test/CodeGen/MIR/X86/jump-table-info.mir
index a4e6f6a..1d76f2e 100644
--- a/llvm/test/CodeGen/MIR/X86/jump-table-info.mir
+++ b/llvm/test/CodeGen/MIR/X86/jump-table-info.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the jump table info and jump
# table operands correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/killed-register-flag.mir b/llvm/test/CodeGen/MIR/X86/killed-register-flag.mir
index 9e8f3ba..50e7eff 100644
--- a/llvm/test/CodeGen/MIR/X86/killed-register-flag.mir
+++ b/llvm/test/CodeGen/MIR/X86/killed-register-flag.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the 'killed' register flags
# correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/liveout-register-mask.mir b/llvm/test/CodeGen/MIR/X86/liveout-register-mask.mir
index 7ded728..06c821b 100644
--- a/llvm/test/CodeGen/MIR/X86/liveout-register-mask.mir
+++ b/llvm/test/CodeGen/MIR/X86/liveout-register-mask.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after stackmap-liveness -stop-after stackmap-liveness -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after stackmap-liveness -stop-after stackmap-liveness -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the liveout register mask
# machine operands correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/machine-basic-block-operands.mir b/llvm/test/CodeGen/MIR/X86/machine-basic-block-operands.mir
index 0d7a9f8..99258a9 100644
--- a/llvm/test/CodeGen/MIR/X86/machine-basic-block-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/machine-basic-block-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses machine basic block operands.
--- |
diff --git a/llvm/test/CodeGen/MIR/X86/machine-instructions.mir b/llvm/test/CodeGen/MIR/X86/machine-instructions.mir
index 0e46d01..3b0890e 100644
--- a/llvm/test/CodeGen/MIR/X86/machine-instructions.mir
+++ b/llvm/test/CodeGen/MIR/X86/machine-instructions.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses X86 machine instructions
# correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/memory-operands.mir b/llvm/test/CodeGen/MIR/X86/memory-operands.mir
index 3c9463d..1f295df 100644
--- a/llvm/test/CodeGen/MIR/X86/memory-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/memory-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the machine memory operands
# correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/metadata-operands.mir b/llvm/test/CodeGen/MIR/X86/metadata-operands.mir
index 89a1e6f..a7be2e3 100644
--- a/llvm/test/CodeGen/MIR/X86/metadata-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/metadata-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the metadata machine operands
# correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/named-registers.mir b/llvm/test/CodeGen/MIR/X86/named-registers.mir
index e547c32..e2dd814 100644
--- a/llvm/test/CodeGen/MIR/X86/named-registers.mir
+++ b/llvm/test/CodeGen/MIR/X86/named-registers.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses X86 registers correctly.
--- |
diff --git a/llvm/test/CodeGen/MIR/X86/newline-handling.mir b/llvm/test/CodeGen/MIR/X86/newline-handling.mir
index bce06d5..6e81540 100644
--- a/llvm/test/CodeGen/MIR/X86/newline-handling.mir
+++ b/llvm/test/CodeGen/MIR/X86/newline-handling.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
--- |
diff --git a/llvm/test/CodeGen/MIR/X86/null-register-operands.mir b/llvm/test/CodeGen/MIR/X86/null-register-operands.mir
index 5563ef8..6672fd0 100644
--- a/llvm/test/CodeGen/MIR/X86/null-register-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/null-register-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses null register operands correctly.
--- |
diff --git a/llvm/test/CodeGen/MIR/X86/register-mask-operands.mir b/llvm/test/CodeGen/MIR/X86/register-mask-operands.mir
index 9fa4e6e..3b01e58 100644
--- a/llvm/test/CodeGen/MIR/X86/register-mask-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/register-mask-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses register mask operands correctly.
--- |
diff --git a/llvm/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir b/llvm/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir
index d7e7632..6ed7709 100644
--- a/llvm/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir
+++ b/llvm/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-scheduler -stop-after machine-scheduler -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-scheduler -stop-after machine-scheduler -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses simple register allocation hints
# correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
index 7e13a26..b7fb4e0 100644
--- a/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
+++ b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses fixed stack objects correctly.
--- |
diff --git a/llvm/test/CodeGen/MIR/X86/stack-object-debug-info.mir b/llvm/test/CodeGen/MIR/X86/stack-object-debug-info.mir
index 8074f76..bc09cf9 100644
--- a/llvm/test/CodeGen/MIR/X86/stack-object-debug-info.mir
+++ b/llvm/test/CodeGen/MIR/X86/stack-object-debug-info.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the stack object's debug info
# correctly.
--- |
diff --git a/llvm/test/CodeGen/MIR/X86/stack-object-operands.mir b/llvm/test/CodeGen/MIR/X86/stack-object-operands.mir
index fce5bf7..050cde7 100644
--- a/llvm/test/CodeGen/MIR/X86/stack-object-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/stack-object-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses stack object machine operands
# correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/stack-objects.mir b/llvm/test/CodeGen/MIR/X86/stack-objects.mir
index bdd9110..7e2bcd2 100644
--- a/llvm/test/CodeGen/MIR/X86/stack-objects.mir
+++ b/llvm/test/CodeGen/MIR/X86/stack-objects.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses stack objects correctly.
--- |
diff --git a/llvm/test/CodeGen/MIR/X86/subregister-operands.mir b/llvm/test/CodeGen/MIR/X86/subregister-operands.mir
index 8a3fcf6..a02af76 100644
--- a/llvm/test/CodeGen/MIR/X86/subregister-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/subregister-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses subregisters in register operands
# correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir b/llvm/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir
index 64af6121..d8ce836 100644
--- a/llvm/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir
+++ b/llvm/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses basic block successors and
# probabilities correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/successor-basic-blocks.mir b/llvm/test/CodeGen/MIR/X86/successor-basic-blocks.mir
index a6c14f7..655019b 100644
--- a/llvm/test/CodeGen/MIR/X86/successor-basic-blocks.mir
+++ b/llvm/test/CodeGen/MIR/X86/successor-basic-blocks.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses basic block successors correctly.
--- |
diff --git a/llvm/test/CodeGen/MIR/X86/undef-register-flag.mir b/llvm/test/CodeGen/MIR/X86/undef-register-flag.mir
index 0b26c52..03af027 100644
--- a/llvm/test/CodeGen/MIR/X86/undef-register-flag.mir
+++ b/llvm/test/CodeGen/MIR/X86/undef-register-flag.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the 'undef' register flags
# correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/used-physical-register-info.mir b/llvm/test/CodeGen/MIR/X86/used-physical-register-info.mir
index 9a81578..05bb089 100644
--- a/llvm/test/CodeGen/MIR/X86/used-physical-register-info.mir
+++ b/llvm/test/CodeGen/MIR/X86/used-physical-register-info.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the callee saved register mask
# correctly and that the MIR parser can infer it as well.
diff --git a/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir b/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
index a58be69..be363f8 100644
--- a/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
+++ b/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses variable sized stack objects
# correctly.
diff --git a/llvm/test/CodeGen/MIR/X86/virtual-registers.mir b/llvm/test/CodeGen/MIR/X86/virtual-registers.mir
index 93c2fea..0fd860b 100644
--- a/llvm/test/CodeGen/MIR/X86/virtual-registers.mir
+++ b/llvm/test/CodeGen/MIR/X86/virtual-registers.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses virtual register definitions and
# references correctly.
diff --git a/llvm/test/CodeGen/PowerPC/stackmap-frame-setup.ll b/llvm/test/CodeGen/PowerPC/stackmap-frame-setup.ll
index 487da00..b83375e 100644
--- a/llvm/test/CodeGen/PowerPC/stackmap-frame-setup.ll
+++ b/llvm/test/CodeGen/PowerPC/stackmap-frame-setup.ll
@@ -1,5 +1,5 @@
-; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -stop-after machine-sink %s | FileCheck %s --check-prefix=ISEL
-; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s | FileCheck %s --check-prefix=FAST-ISEL
+; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=ISEL
+; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=FAST-ISEL
define void @caller_meta_leaf() {
entry:
diff --git a/llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir b/llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir
index 8ce1c7e..5ee5847 100644
--- a/llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir
+++ b/llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir
@@ -1,4 +1,4 @@
-# RUN: llc -run-pass postrapseudos -mtriple=x86_64-unknown-unknown -mattr=+3dnow -o /dev/null %s | FileCheck %s
+# RUN: llc -run-pass postrapseudos -mtriple=x86_64-unknown-unknown -mattr=+3dnow -o /dev/null %s 2>&1 | FileCheck %s
# This test verifies that the ExpandPostRA pass expands the GR64 <-> VR64
# copies into appropriate MMX_MOV instructions.
diff --git a/llvm/test/CodeGen/X86/stackmap-frame-setup.ll b/llvm/test/CodeGen/X86/stackmap-frame-setup.ll
index 076e248..a451f90 100644
--- a/llvm/test/CodeGen/X86/stackmap-frame-setup.ll
+++ b/llvm/test/CodeGen/X86/stackmap-frame-setup.ll
@@ -1,5 +1,5 @@
-; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -stop-after machine-sink %s | FileCheck %s --check-prefix=ISEL
-; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s | FileCheck %s --check-prefix=FAST-ISEL
+; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=ISEL
+; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=FAST-ISEL
define void @caller_meta_leaf() {
entry:
diff --git a/llvm/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll b/llvm/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll
index 2ff8c3a..c8f7f70 100644
--- a/llvm/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll
+++ b/llvm/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown -o /dev/null -stop-after machine-scheduler %s | FileCheck %s --check-prefix=PRE-RA
-; RUN: llc -mtriple=x86_64-unknown-unknown -o /dev/null -stop-after prologepilog %s | FileCheck %s --check-prefix=POST-RA
+; RUN: llc -mtriple=x86_64-unknown-unknown -o /dev/null -stop-after machine-scheduler %s 2>&1 | FileCheck %s --check-prefix=PRE-RA
+; RUN: llc -mtriple=x86_64-unknown-unknown -o /dev/null -stop-after prologepilog %s 2>&1 | FileCheck %s --check-prefix=POST-RA
; This test verifies that the virtual register references in machine function's
; liveins are cleared after register allocation.
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
index 84be910..b9313d3 100644
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
@@ -1,4 +1,4 @@
-# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o /dev/null %s | FileCheck %s
+# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o /dev/null %s 2>&1 | FileCheck %s
# Test the extension of debug ranges from 3 predecessors.
# Generated from the source file LiveDebugValues-3preds.c:
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir
index 0af408a6..80f3952 100644
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir
@@ -1,4 +1,4 @@
-# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o /dev/null %s | FileCheck %s
+# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o /dev/null %s 2>&1 | FileCheck %s
# Test the extension of debug ranges from predecessors.
# Generated from the source file LiveDebugValues.c:
diff --git a/llvm/test/DebugInfo/X86/bbjoin.ll b/llvm/test/DebugInfo/X86/bbjoin.ll
index 385cb6c..fea7491 100644
--- a/llvm/test/DebugInfo/X86/bbjoin.ll
+++ b/llvm/test/DebugInfo/X86/bbjoin.ll
@@ -1,5 +1,5 @@
; RUN: llc -mtriple=x86_64-apple-macosx10.9.0 %s -stop-after=livedebugvars \
-; RUN: -o %t.s | FileCheck %s
+; RUN: -o %t.s 2>&1 | FileCheck %s
; Generated from:
; void g(int *);
; int f() {
diff --git a/llvm/test/DebugInfo/X86/safestack-byval.ll b/llvm/test/DebugInfo/X86/safestack-byval.ll
index f1f6b6c..073ea2f 100644
--- a/llvm/test/DebugInfo/X86/safestack-byval.ll
+++ b/llvm/test/DebugInfo/X86/safestack-byval.ll
@@ -1,7 +1,7 @@
; Test dwarf codegen for DILocalVariable of a byval function argument that
; points to neither an argument nor an alloca. This kind of IR is generated by
; SafeStack for unsafe byval arguments.
-; RUN: llc -mtriple=x86_64-unknown-unknown -stop-after expand-isel-pseudos %s -o /dev/null | FileCheck %s
+; RUN: llc -mtriple=x86_64-unknown-unknown -stop-after expand-isel-pseudos %s -o /dev/null 2>&1 | FileCheck %s
; This was built by compiling the following source with SafeStack and
; simplifying the result a little.