diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td
index 8e2173b..ecbe48b 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.td
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.td
@@ -129,6 +129,11 @@
 		       "mov $dst, $a, asr $b",
 		       [(set IntRegs:$dst, (sra IntRegs:$a, IntRegs:$b))]>;
 
+def SRL : InstARM<(ops IntRegs:$dst, IntRegs:$a, IntRegs:$b),
+		       "mov $dst, $a, lsr $b",
+		       [(set IntRegs:$dst, (srl IntRegs:$a, IntRegs:$b))]>;
+
+
 def EOR     : InstARM<(ops IntRegs:$dst, IntRegs:$a, op_addr_mode1:$b),
                        "eor $dst, $a, $b",
 		       [(set IntRegs:$dst, (xor IntRegs:$a, addr_mode1:$b))]>;
@@ -145,6 +150,10 @@
 			   IntRegs:$false, imm:$cc))]>;
 }
 
+def MUL     : InstARM<(ops IntRegs:$dst, IntRegs:$a, IntRegs:$b),
+                       "mul $dst, $a, $b",
+		       [(set IntRegs:$dst, (mul IntRegs:$a, IntRegs:$b))]>;
+
 def bcond      : InstARM<(ops brtarget:$dst, CCOp:$cc),
 		         "b$cc $dst",
 		         [(armbr bb:$dst, imm:$cc)]>;