commit c7bc5fbc5c3d60b347e6eb9d85b85ee656db5c69
author Jakob Stoklund Olesen <stoklund@2pi.dk> Mon May 20 00:53:25 2013 +0000
committer Jakob Stoklund Olesen <stoklund@2pi.dk> Mon May 20 00:53:25 2013 +0000
tree 01b072cdba0dee9e4f9ae01844d416ccd4cd707f
parent 751e9b84077dd3b5cf6f5d5812f2054071a5179c

Implement spill and fill of I64Regs.

llvm-svn: 182228

llvm/test/CodeGen/SPARC/64bit.ll

diff --git a/llvm/test/CodeGen/SPARC/64bit.ll b/llvm/test/CodeGen/SPARC/64bit.ll
index e10237b..c9413b7 100644
--- a/llvm/test/CodeGen/SPARC/64bit.ll
+++ b/llvm/test/CodeGen/SPARC/64bit.ll
@@ -201,3 +201,11 @@
   %RV = sub i32 1, %cast2
   ret i32 %RV
 }
+
+; CHECK: spill_i64
+; CHECK: stx
+; CHECK: ldx
+define i64 @spill_i64(i64 %x) {
+  call void asm sideeffect "", "~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{o0},~{o1},~{o2},~{o3},~{o4},~{o5},~{o7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7}"()
+  ret i64 %x
+}