[AArch64] Add support for Fujitsu A64FX
A64FX is an Armv8.2-A CPU used in FUJITSU Supercomputer
PRIMEHPC FX1000, PRIMEHPC FX700, and supercomputer Fugaku.
https://www.fujitsu.com/global/products/computing/servers/supercomputer/specifications/
Differential Revision: https://reviews.llvm.org/D75594
diff --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp
index 9b9d60e..2fb0c25 100644
--- a/llvm/lib/Support/Host.cpp
+++ b/llvm/lib/Support/Host.cpp
@@ -219,6 +219,16 @@
}
}
+ if (Implementer == "0x46") { // Fujitsu Ltd.
+ for (unsigned I = 0, E = Lines.size(); I != E; ++I) {
+ if (Lines[I].startswith("CPU part")) {
+ return StringSwitch<const char *>(Lines[I].substr(8).ltrim("\t :"))
+ .Case("0x001", "a64fx")
+ .Default("generic");
+ }
+ }
+ }
+
if (Implementer == "0x48") // HiSilicon Technologies, Inc.
// Look for the CPU part line.
for (unsigned I = 0, E = Lines.size(); I != E; ++I)
diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td
index df35bb4..a6af2a1 100644
--- a/llvm/lib/Target/AArch64/AArch64.td
+++ b/llvm/lib/Target/AArch64/AArch64.td
@@ -563,6 +563,19 @@
FeatureSSBS
]>;
+def ProcA64FX : SubtargetFeature<"a64fx", "ARMProcFamily", "A64FX",
+ "Fujitsu A64FX processors", [
+ HasV8_2aOps,
+ FeatureFPARMv8,
+ FeatureNEON,
+ FeatureSHA2,
+ FeaturePerfMon,
+ FeatureFullFP16,
+ FeatureSVE,
+ FeaturePostRAScheduler,
+ FeatureComplxNum
+ ]>;
+
// Note that cyclone does not fuse AES instructions, but newer apple chips do
// perform the fusion and cyclone is used by default when targetting apple OSes.
def ProcAppleA7 : SubtargetFeature<"apple-a7", "ARMProcFamily", "AppleA7",
@@ -901,6 +914,10 @@
// Alias for the latest Apple processor model supported by LLVM.
def : ProcessorModel<"apple-latest", CycloneModel, [ProcAppleA13]>;
+// Fujitsu A64FX
+// FIXME: Scheduling model is not implemented yet.
+def : ProcessorModel<"a64fx", NoSchedModel, [ProcA64FX]>;
+
//===----------------------------------------------------------------------===//
// Assembly parser
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/AArch64/AArch64Subtarget.cpp b/llvm/lib/Target/AArch64/AArch64Subtarget.cpp
index 3636d8d..dc744f5 100644
--- a/llvm/lib/Target/AArch64/AArch64Subtarget.cpp
+++ b/llvm/lib/Target/AArch64/AArch64Subtarget.cpp
@@ -88,6 +88,11 @@
case CortexA76:
PrefFunctionLogAlignment = 4;
break;
+ case A64FX:
+ CacheLineSize = 256;
+ PrefFunctionLogAlignment = 5;
+ PrefLoopLogAlignment = 5;
+ break;
case AppleA7:
case AppleA10:
case AppleA11:
diff --git a/llvm/lib/Target/AArch64/AArch64Subtarget.h b/llvm/lib/Target/AArch64/AArch64Subtarget.h
index 79c2c16..dca2b8b 100644
--- a/llvm/lib/Target/AArch64/AArch64Subtarget.h
+++ b/llvm/lib/Target/AArch64/AArch64Subtarget.h
@@ -38,6 +38,7 @@
public:
enum ARMProcFamilyEnum : uint8_t {
Others,
+ A64FX,
AppleA7,
AppleA10,
AppleA11,