[PPC] Generate positive FP zero using xor insn instead of loading from constant area
https://reviews.llvm.org/D23614
Currently we load +0.0 from constant area. That can change to be generated using
XOR instruction.
llvm-svn: 284995
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h
index 3d4ec27..2944e99 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.h
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h
@@ -769,6 +769,7 @@
bool useLoadStackGuardNode() const override;
void insertSSPDeclarations(Module &M) const override;
+ bool isFPImmLegal(const APFloat &Imm, EVT VT) const override;
private:
struct ReuseLoadInfo {
SDValue Ptr;