Remove FrameAccess struct from hasLoadFromStackSlot
This removes the FrameAccess struct that was added to the interface
in D51537, since the PseudoValue from the MachineMemoryOperand
can be safely casted to a FixedStackPseudoSourceValue.
Reviewers: MatzeB, thegameg, javed.absar
Reviewed By: thegameg
Differential Revision: https://reviews.llvm.org/D51617
llvm-svn: 341454
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index db7e751..83de2c2 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -1172,9 +1172,11 @@
unsigned ARMBaseInstrInfo::isStoreToStackSlotPostFE(const MachineInstr &MI,
int &FrameIndex) const {
- SmallVector<TargetInstrInfo::FrameAccess, 1> Accesses;
+ SmallVector<const MachineMemOperand *, 1> Accesses;
if (MI.mayStore() && hasStoreToStackSlot(MI, Accesses)) {
- FrameIndex = Accesses.begin()->FI;
+ FrameIndex =
+ cast<FixedStackPseudoSourceValue>(Accesses.front()->getPseudoValue())
+ ->getFrameIndex();
return true;
}
return false;
@@ -1390,9 +1392,11 @@
unsigned ARMBaseInstrInfo::isLoadFromStackSlotPostFE(const MachineInstr &MI,
int &FrameIndex) const {
- SmallVector<TargetInstrInfo::FrameAccess, 1> Accesses;
+ SmallVector<const MachineMemOperand *, 1> Accesses;
if (MI.mayLoad() && hasLoadFromStackSlot(MI, Accesses)) {
- FrameIndex = Accesses.begin()->FI;
+ FrameIndex =
+ cast<FixedStackPseudoSourceValue>(Accesses.front()->getPseudoValue())
+ ->getFrameIndex();
return true;
}
return false;
diff --git a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
index 20ed6a9..a3c160d 100644
--- a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
@@ -337,7 +337,7 @@
/// operand of that instruction if true.
bool HexagonInstrInfo::hasLoadFromStackSlot(
const MachineInstr &MI,
- SmallVectorImpl<TargetInstrInfo::FrameAccess> &Accesses) const {
+ SmallVectorImpl<const MachineMemOperand *> &Accesses) const {
if (MI.isBundle()) {
const MachineBasicBlock *MBB = MI.getParent();
MachineBasicBlock::const_instr_iterator MII = MI.getIterator();
@@ -355,7 +355,7 @@
/// operand of that instruction if true.
bool HexagonInstrInfo::hasStoreToStackSlot(
const MachineInstr &MI,
- SmallVectorImpl<TargetInstrInfo::FrameAccess> &Accesses) const {
+ SmallVectorImpl<const MachineMemOperand *> &Accesses) const {
if (MI.isBundle()) {
const MachineBasicBlock *MBB = MI.getParent();
MachineBasicBlock::const_instr_iterator MII = MI.getIterator();
diff --git a/llvm/lib/Target/Hexagon/HexagonInstrInfo.h b/llvm/lib/Target/Hexagon/HexagonInstrInfo.h
index d2125fc..fe4a2f3 100644
--- a/llvm/lib/Target/Hexagon/HexagonInstrInfo.h
+++ b/llvm/lib/Target/Hexagon/HexagonInstrInfo.h
@@ -71,14 +71,14 @@
/// if true.
bool hasLoadFromStackSlot(
const MachineInstr &MI,
- SmallVectorImpl<TargetInstrInfo::FrameAccess> &Accesses) const override;
+ SmallVectorImpl<const MachineMemOperand *> &Accesses) const override;
/// Check if the instruction or the bundle of instructions has
/// store to stack slots. Return the frameindex and machine memory operand
/// if true.
bool hasStoreToStackSlot(
const MachineInstr &MI,
- SmallVectorImpl<TargetInstrInfo::FrameAccess> &Accesses) const override;
+ SmallVectorImpl<const MachineMemOperand *> &Accesses) const override;
/// Analyze the branching code at the end of MBB, returning
/// true if it cannot be understood (e.g. it's a switch dispatch or isn't
diff --git a/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp b/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
index 398c84a..a183527 100644
--- a/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
+++ b/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
@@ -733,9 +733,11 @@
if ((Reg = isLoadFromStackSlot(MI, FrameIndex)))
return Reg;
// Check for post-frame index elimination operations
- SmallVector<TargetInstrInfo::FrameAccess, 1> Accesses;
+ SmallVector<const MachineMemOperand *, 1> Accesses;
if (hasLoadFromStackSlot(MI, Accesses)){
- FrameIndex = Accesses.begin()->FI;
+ FrameIndex =
+ cast<FixedStackPseudoSourceValue>(Accesses.front()->getPseudoValue())
+ ->getFrameIndex();
return 1;
}
}
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 06a4d1f..415ef7d 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -411,9 +411,11 @@
if ((Reg = isLoadFromStackSlot(MI, FrameIndex)))
return Reg;
// Check for post-frame index elimination operations
- SmallVector<TargetInstrInfo::FrameAccess, 1> Accesses;
+ SmallVector<const MachineMemOperand *, 1> Accesses;
if (hasLoadFromStackSlot(MI, Accesses)) {
- FrameIndex = Accesses.begin()->FI;
+ FrameIndex =
+ cast<FixedStackPseudoSourceValue>(Accesses.front()->getPseudoValue())
+ ->getFrameIndex();
return 1;
}
}
@@ -444,9 +446,11 @@
if ((Reg = isStoreToStackSlot(MI, FrameIndex)))
return Reg;
// Check for post-frame index elimination operations
- SmallVector<TargetInstrInfo::FrameAccess, 1> Accesses;
+ SmallVector<const MachineMemOperand *, 1> Accesses;
if (hasStoreToStackSlot(MI, Accesses)) {
- FrameIndex = Accesses.begin()->FI;
+ FrameIndex =
+ cast<FixedStackPseudoSourceValue>(Accesses.front()->getPseudoValue())
+ ->getFrameIndex();
return 1;
}
}