commit ca5b0f3f12f10c656534cb4e6d8c2d7ab98cbd23
author Dimitry Andric <dimitry@andric.com> Mon Dec 18 18:45:37 2017 +0000
committer Dimitry Andric <dimitry@andric.com> Mon Dec 18 18:45:37 2017 +0000
tree ab7678b50b28abfd0ca7256351a86418cef25314
parent 72592637907afae46a715b58b65487aa707fc64b

Fix inconsistent line endings in ARCDisassembler.cpp. NFC.

llvm-svn: 321006

llvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp

diff --git a/llvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp b/llvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp
index 82199d8..dd18176 100644
--- a/llvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp
+++ b/llvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp
@@ -273,9 +273,9 @@
                                               const void *Decoder) {
   DEBUG(dbgs() << "Decoding MOV_S h-register\n");
   using Field = decltype(Insn);
-  Field h = fieldFromInstruction(Insn, 5, 3) |

-            (fieldFromInstruction(Insn, 0, 2) << 3);

-  Field g = fieldFromInstruction(Insn, 8, 3) |

+  Field h = fieldFromInstruction(Insn, 5, 3) |
+            (fieldFromInstruction(Insn, 0, 2) << 3);
+  Field g = fieldFromInstruction(Insn, 8, 3) |
             (fieldFromInstruction(Insn, 3, 2) << 3);
 
   auto DecodeRegisterOrImm = [&Inst, Address, Decoder](Field RegNum,