| commit | cac749ac884cfab87a0b2a805b43530c26a627c8 | [log] [tgz] |
|---|---|---|
| author | Ron Lieberman <ronlieb.g@gmail.com> | Fri Nov 16 01:13:34 2018 +0000 |
| committer | Ron Lieberman <ronlieb.g@gmail.com> | Fri Nov 16 01:13:34 2018 +0000 |
| tree | 483b52cfd6f80f9842c2ce8132146e9dd1b798e0 | |
| parent | 5d14b72d5c3f5169fd896ce91378e377f464b18b [diff] |
[AMDGPU] Add FixupVectorISel pass, currently Supports SREGs in GLOBAL LD/ST
Add a pass to fixup various vector ISel issues.
Currently we handle converting GLOBAL_{LOAD|STORE}_*
and GLOBAL_Atomic_* instructions into their _SADDR variants.
This involves feeding the sreg into the saddr field of the new instruction.
llvm-svn: 347008